[Intel-gfx] [PATCH 00/14] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups

[Intel-gfx] [PATCH 00/14] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Fix some remaining issues around plane updates vs. CxSR on
gmch platforms. Also throw in a few watermark fixes/cleanups,
and finally flip on atomic for g4x since everything is ready.

Ville Syrjälä (14):
  drm/i915: s/crtc_state/new_crtc_state/ etc.
  drm/i915: Fix g4x cxsr enable condition
  drm/i915: Use u8 consistently for active_planes bitmask
  drm/i915: Apply WaUse32BppForSRWM to elk as well as ctg
  drm/i915: Fix HPLL watermark readout for g4x
  drm/i915: Split g4x_compute_pipe_wm() into two
  drm/i915: Split vlv_compute_pipe_wm() into two
  drm/i915: Simplify up g4x watermark sanitation
  drm/i915: Simplify up vlv watermark sanitation
  drm/i915: Add missing invalidate to g4x wm readout
  drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes
  drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms
  drm/i915: Write watermarks for disabled pipes on gmch platforms
  drm/i915: Enable atomic by default on ctg/elk

 drivers/gpu/drm/i915/display/intel_color.c   |   4 +
 drivers/gpu/drm/i915/display/intel_display.c |  89 ++++---
 drivers/gpu/drm/i915/i915_drv.c              |   7 +-
 drivers/gpu/drm/i915/intel_pm.c              | 232 ++++++++++---------
 4 files changed, 193 insertions(+), 139 deletions(-)

-- 
2.26.3

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[Intel-gfx] [PATCH 01/14] drm/i915: s/crtc_state/new_crtc_state/ etc.

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_plane_atomic_calc_changes() deals with both the old and
new crtc/plane states. Make the variable names reflect that
more clearly.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 38 ++++++++++----------
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 0c2b194006f8..41683c529c3d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6826,27 +6826,27 @@ static bool needs_scaling(const struct intel_plane_state *state)
 }
 
 int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_state,
-				    struct intel_crtc_state *crtc_state,
+				    struct intel_crtc_state *new_crtc_state,
 				    const struct intel_plane_state *old_plane_state,
-				    struct intel_plane_state *plane_state)
+				    struct intel_plane_state *new_plane_state)
 {
-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
+	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
-	bool mode_changed = intel_crtc_needs_modeset(crtc_state);
+	bool mode_changed = intel_crtc_needs_modeset(new_crtc_state);
 	bool was_crtc_enabled = old_crtc_state->hw.active;
-	bool is_crtc_enabled = crtc_state->hw.active;
+	bool is_crtc_enabled = new_crtc_state->hw.active;
 	bool turn_off, turn_on, visible, was_visible;
 	int ret;
 
 	if (DISPLAY_VER(dev_priv) >= 9 && plane->id != PLANE_CURSOR) {
-		ret = skl_update_scaler_plane(crtc_state, plane_state);
+		ret = skl_update_scaler_plane(new_crtc_state, new_plane_state);
 		if (ret)
 			return ret;
 	}
 
 	was_visible = old_plane_state->uapi.visible;
-	visible = plane_state->uapi.visible;
+	visible = new_plane_state->uapi.visible;
 
 	if (!was_crtc_enabled && drm_WARN_ON(&dev_priv->drm, was_visible))
 		was_visible = false;
@@ -6862,7 +6862,7 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat
 	 * only combine the results from all planes in the current place?
 	 */
 	if (!is_crtc_enabled) {
-		intel_plane_set_invisible(crtc_state, plane_state);
+		intel_plane_set_invisible(new_crtc_state, new_plane_state);
 		visible = false;
 	}
 
@@ -6881,28 +6881,28 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat
 
 	if (turn_on) {
 		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
-			crtc_state->update_wm_pre = true;
+			new_crtc_state->update_wm_pre = true;
 
 		/* must disable cxsr around plane enable/disable */
 		if (plane->id != PLANE_CURSOR)
-			crtc_state->disable_cxsr = true;
+			new_crtc_state->disable_cxsr = true;
 	} else if (turn_off) {
 		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
-			crtc_state->update_wm_post = true;
+			new_crtc_state->update_wm_post = true;
 
 		/* must disable cxsr around plane enable/disable */
 		if (plane->id != PLANE_CURSOR)
-			crtc_state->disable_cxsr = true;
-	} else if (intel_wm_need_update(old_plane_state, plane_state)) {
+			new_crtc_state->disable_cxsr = true;
+	} else if (intel_wm_need_update(old_plane_state, new_plane_state)) {
 		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) {
 			/* FIXME bollocks */
-			crtc_state->update_wm_pre = true;
-			crtc_state->update_wm_post = true;
+			new_crtc_state->update_wm_pre = true;
+			new_crtc_state->update_wm_post = true;
 		}
 	}
 
 	if (visible || was_visible)
-		crtc_state->fb_bits |= plane->frontbuffer_bit;
+		new_crtc_state->fb_bits |= plane->frontbuffer_bit;
 
 	/*
 	 * ILK/SNB DVSACNTR/Sprite Enable
@@ -6941,8 +6941,8 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat
 	    (IS_IRONLAKE(dev_priv) || IS_SANDYBRIDGE(dev_priv) ||
 	     IS_IVYBRIDGE(dev_priv)) &&
 	    (turn_on || (!needs_scaling(old_plane_state) &&
-			 needs_scaling(plane_state))))
-		crtc_state->disable_lp_wm = true;
+			 needs_scaling(new_plane_state))))
+		new_crtc_state->disable_lp_wm = true;
 
 	return 0;
 }
-- 
2.26.3

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Re: [Intel-gfx] [PATCH 01/14] drm/i915: s/crtc_state/new_crtc_state/ etc.

[Lisovskiy, Stanislav]

On Fri, May 14, 2021 at 03:57:38PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> intel_plane_atomic_calc_changes() deals with both the old and
> new crtc/plane states. Make the variable names reflect that
> more clearly.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 38 ++++++++++----------
>  1 file changed, 19 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 0c2b194006f8..41683c529c3d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6826,27 +6826,27 @@ static bool needs_scaling(const struct intel_plane_state *state)
>  }
>  
>  int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_state,
> -				    struct intel_crtc_state *crtc_state,
> +				    struct intel_crtc_state *new_crtc_state,
>  				    const struct intel_plane_state *old_plane_state,
> -				    struct intel_plane_state *plane_state)
> +				    struct intel_plane_state *new_plane_state)
>  {
> -	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> +	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
> +	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> -	bool mode_changed = intel_crtc_needs_modeset(crtc_state);
> +	bool mode_changed = intel_crtc_needs_modeset(new_crtc_state);
>  	bool was_crtc_enabled = old_crtc_state->hw.active;
> -	bool is_crtc_enabled = crtc_state->hw.active;
> +	bool is_crtc_enabled = new_crtc_state->hw.active;
>  	bool turn_off, turn_on, visible, was_visible;
>  	int ret;
>  
>  	if (DISPLAY_VER(dev_priv) >= 9 && plane->id != PLANE_CURSOR) {
> -		ret = skl_update_scaler_plane(crtc_state, plane_state);
> +		ret = skl_update_scaler_plane(new_crtc_state, new_plane_state);
>  		if (ret)
>  			return ret;
>  	}
>  
>  	was_visible = old_plane_state->uapi.visible;
> -	visible = plane_state->uapi.visible;
> +	visible = new_plane_state->uapi.visible;
>  
>  	if (!was_crtc_enabled && drm_WARN_ON(&dev_priv->drm, was_visible))
>  		was_visible = false;
> @@ -6862,7 +6862,7 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat
>  	 * only combine the results from all planes in the current place?
>  	 */
>  	if (!is_crtc_enabled) {
> -		intel_plane_set_invisible(crtc_state, plane_state);
> +		intel_plane_set_invisible(new_crtc_state, new_plane_state);
>  		visible = false;
>  	}
>  
> @@ -6881,28 +6881,28 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat
>  
>  	if (turn_on) {
>  		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
> -			crtc_state->update_wm_pre = true;
> +			new_crtc_state->update_wm_pre = true;
>  
>  		/* must disable cxsr around plane enable/disable */
>  		if (plane->id != PLANE_CURSOR)
> -			crtc_state->disable_cxsr = true;
> +			new_crtc_state->disable_cxsr = true;
>  	} else if (turn_off) {
>  		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
> -			crtc_state->update_wm_post = true;
> +			new_crtc_state->update_wm_post = true;
>  
>  		/* must disable cxsr around plane enable/disable */
>  		if (plane->id != PLANE_CURSOR)
> -			crtc_state->disable_cxsr = true;
> -	} else if (intel_wm_need_update(old_plane_state, plane_state)) {
> +			new_crtc_state->disable_cxsr = true;
> +	} else if (intel_wm_need_update(old_plane_state, new_plane_state)) {
>  		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) {
>  			/* FIXME bollocks */
> -			crtc_state->update_wm_pre = true;
> -			crtc_state->update_wm_post = true;
> +			new_crtc_state->update_wm_pre = true;
> +			new_crtc_state->update_wm_post = true;
>  		}
>  	}
>  
>  	if (visible || was_visible)
> -		crtc_state->fb_bits |= plane->frontbuffer_bit;
> +		new_crtc_state->fb_bits |= plane->frontbuffer_bit;
>  
>  	/*
>  	 * ILK/SNB DVSACNTR/Sprite Enable
> @@ -6941,8 +6941,8 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat
>  	    (IS_IRONLAKE(dev_priv) || IS_SANDYBRIDGE(dev_priv) ||
>  	     IS_IVYBRIDGE(dev_priv)) &&
>  	    (turn_on || (!needs_scaling(old_plane_state) &&
> -			 needs_scaling(plane_state))))
> -		crtc_state->disable_lp_wm = true;
> +			 needs_scaling(new_plane_state))))
> +		new_crtc_state->disable_lp_wm = true;
>  
>  	return 0;
>  }
> -- 
> 2.26.3
> 
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[Intel-gfx] [PATCH 02/14] drm/i915: Fix g4x cxsr enable condition

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The intention was to check whether the primary plane is enabled
without any sprites planes being enabled. Instead we ended up checking
whether just any one of the planes is enabled. g4x isn't vlv/chv and
cxsr only works with the primary plane. Fix the check to examine the
bitmask of active planes rather than the number of bits set in said
bitmask.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 00a5fe424c5a..2fb496fbed43 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1376,8 +1376,7 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 	struct intel_atomic_state *state =
 		to_intel_atomic_state(crtc_state->uapi.state);
 	struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
-	int num_active_planes = hweight8(crtc_state->active_planes &
-					 ~BIT(PLANE_CURSOR));
+	u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
 	const struct g4x_pipe_wm *raw;
 	const struct intel_plane_state *old_plane_state;
 	const struct intel_plane_state *new_plane_state;
@@ -1417,7 +1416,7 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 	wm_state->sr.cursor = raw->plane[PLANE_CURSOR];
 	wm_state->sr.fbc = raw->fbc;
 
-	wm_state->cxsr = num_active_planes == BIT(PLANE_PRIMARY);
+	wm_state->cxsr = active_planes == BIT(PLANE_PRIMARY);
 
 	level = G4X_WM_LEVEL_HPLL;
 	if (!g4x_raw_crtc_wm_is_valid(crtc_state, level))
-- 
2.26.3

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Re: [Intel-gfx] [PATCH 02/14] drm/i915: Fix g4x cxsr enable condition

[Lisovskiy, Stanislav]

On Fri, May 14, 2021 at 03:57:39PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The intention was to check whether the primary plane is enabled
> without any sprites planes being enabled. Instead we ended up checking
> whether just any one of the planes is enabled. g4x isn't vlv/chv and
> cxsr only works with the primary plane. Fix the check to examine the
> bitmask of active planes rather than the number of bits set in said
> bitmask.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 00a5fe424c5a..2fb496fbed43 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1376,8 +1376,7 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
>  	struct intel_atomic_state *state =
>  		to_intel_atomic_state(crtc_state->uapi.state);
>  	struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
> -	int num_active_planes = hweight8(crtc_state->active_planes &
> -					 ~BIT(PLANE_CURSOR));
> +	u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
>  	const struct g4x_pipe_wm *raw;
>  	const struct intel_plane_state *old_plane_state;
>  	const struct intel_plane_state *new_plane_state;
> @@ -1417,7 +1416,7 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
>  	wm_state->sr.cursor = raw->plane[PLANE_CURSOR];
>  	wm_state->sr.fbc = raw->fbc;
>  
> -	wm_state->cxsr = num_active_planes == BIT(PLANE_PRIMARY);
> +	wm_state->cxsr = active_planes == BIT(PLANE_PRIMARY);

Shouldn't this be "active_planes & BIT(PLANE_PRIMARY)" as we might
have other non-cursor planes enabled, which will then fail or am I missing something?

Stan

>  
>  	level = G4X_WM_LEVEL_HPLL;
>  	if (!g4x_raw_crtc_wm_is_valid(crtc_state, level))
> -- 
> 2.26.3
> 
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Re: [Intel-gfx] [PATCH 02/14] drm/i915: Fix g4x cxsr enable condition

[Ville Syrjälä]

On Thu, Sep 16, 2021 at 07:24:21PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, May 14, 2021 at 03:57:39PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > The intention was to check whether the primary plane is enabled
> > without any sprites planes being enabled. Instead we ended up checking
> > whether just any one of the planes is enabled. g4x isn't vlv/chv and
> > cxsr only works with the primary plane. Fix the check to examine the
> > bitmask of active planes rather than the number of bits set in said
> > bitmask.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 5 ++---
> >  1 file changed, 2 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 00a5fe424c5a..2fb496fbed43 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -1376,8 +1376,7 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
> >  	struct intel_atomic_state *state =
> >  		to_intel_atomic_state(crtc_state->uapi.state);
> >  	struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
> > -	int num_active_planes = hweight8(crtc_state->active_planes &
> > -					 ~BIT(PLANE_CURSOR));
> > +	u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
> >  	const struct g4x_pipe_wm *raw;
> >  	const struct intel_plane_state *old_plane_state;
> >  	const struct intel_plane_state *new_plane_state;
> > @@ -1417,7 +1416,7 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
> >  	wm_state->sr.cursor = raw->plane[PLANE_CURSOR];
> >  	wm_state->sr.fbc = raw->fbc;
> >  
> > -	wm_state->cxsr = num_active_planes == BIT(PLANE_PRIMARY);
> > +	wm_state->cxsr = active_planes == BIT(PLANE_PRIMARY);
> 
> Shouldn't this be "active_planes & BIT(PLANE_PRIMARY)" as we might
> have other non-cursor planes enabled, which will then fail or am I missing something?

CxSR is possible only when the primary plane is enabled and the
sprite plane is disabled.

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH 02/14] drm/i915: Fix g4x cxsr enable condition

[Lisovskiy, Stanislav]

On Fri, Sep 17, 2021 at 03:32:51PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 16, 2021 at 07:24:21PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 14, 2021 at 03:57:39PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > The intention was to check whether the primary plane is enabled
> > > without any sprites planes being enabled. Instead we ended up checking
> > > whether just any one of the planes is enabled. g4x isn't vlv/chv and
> > > cxsr only works with the primary plane. Fix the check to examine the
> > > bitmask of active planes rather than the number of bits set in said
> > > bitmask.
> > > 
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_pm.c | 5 ++---
> > >  1 file changed, 2 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > index 00a5fe424c5a..2fb496fbed43 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -1376,8 +1376,7 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
> > >  	struct intel_atomic_state *state =
> > >  		to_intel_atomic_state(crtc_state->uapi.state);
> > >  	struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
> > > -	int num_active_planes = hweight8(crtc_state->active_planes &
> > > -					 ~BIT(PLANE_CURSOR));
> > > +	u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
> > >  	const struct g4x_pipe_wm *raw;
> > >  	const struct intel_plane_state *old_plane_state;
> > >  	const struct intel_plane_state *new_plane_state;
> > > @@ -1417,7 +1416,7 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
> > >  	wm_state->sr.cursor = raw->plane[PLANE_CURSOR];
> > >  	wm_state->sr.fbc = raw->fbc;
> > >  
> > > -	wm_state->cxsr = num_active_planes == BIT(PLANE_PRIMARY);
> > > +	wm_state->cxsr = active_planes == BIT(PLANE_PRIMARY);
> > 
> > Shouldn't this be "active_planes & BIT(PLANE_PRIMARY)" as we might
> > have other non-cursor planes enabled, which will then fail or am I missing something?
> 
> CxSR is possible only when the primary plane is enabled and the
> sprite plane is disabled.

Ok, that explains.

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> 
> -- 
> Ville Syrjälä
> Intel

[Intel-gfx] [PATCH 03/14] drm/i915: Use u8 consistently for active_planes bitmask

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Be consistent in that active_planes bitmask fits in a u8.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2fb496fbed43..8a08a7c0e71f 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1706,7 +1706,7 @@ static int vlv_compute_fifo(struct intel_crtc_state *crtc_state)
 	const struct g4x_pipe_wm *raw =
 		&crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2];
 	struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state;
-	unsigned int active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
+	u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
 	int num_active_planes = hweight8(active_planes);
 	const int fifo_size = 511;
 	int fifo_extra, fifo_left = fifo_size;
@@ -1898,8 +1898,8 @@ static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 	struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
 	const struct vlv_fifo_state *fifo_state =
 		&crtc_state->wm.vlv.fifo_state;
-	int num_active_planes = hweight8(crtc_state->active_planes &
-					 ~BIT(PLANE_CURSOR));
+	u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
+	int num_active_planes = hweight8(active_planes);
 	bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->uapi);
 	const struct intel_plane_state *old_plane_state;
 	const struct intel_plane_state *new_plane_state;
-- 
2.26.3

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Re: [Intel-gfx] [PATCH 03/14] drm/i915: Use u8 consistently for active_planes bitmask

[Lisovskiy, Stanislav]

On Fri, May 14, 2021 at 03:57:40PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Be consistent in that active_planes bitmask fits in a u8.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 2fb496fbed43..8a08a7c0e71f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1706,7 +1706,7 @@ static int vlv_compute_fifo(struct intel_crtc_state *crtc_state)
>  	const struct g4x_pipe_wm *raw =
>  		&crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2];
>  	struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state;
> -	unsigned int active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
> +	u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
>  	int num_active_planes = hweight8(active_planes);
>  	const int fifo_size = 511;
>  	int fifo_extra, fifo_left = fifo_size;
> @@ -1898,8 +1898,8 @@ static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
>  	struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
>  	const struct vlv_fifo_state *fifo_state =
>  		&crtc_state->wm.vlv.fifo_state;
> -	int num_active_planes = hweight8(crtc_state->active_planes &
> -					 ~BIT(PLANE_CURSOR));
> +	u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
> +	int num_active_planes = hweight8(active_planes);
>  	bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->uapi);
>  	const struct intel_plane_state *old_plane_state;
>  	const struct intel_plane_state *new_plane_state;
> -- 
> 2.26.3
> 
> _______________________________________________
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> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 04/14] drm/i915: Apply WaUse32BppForSRWM to elk as well as ctg

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The w/a database lists this for both ctg and elk. So let's apply it to
elk as well. And add the w/a name.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 8a08a7c0e71f..661bc6fdf38c 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1152,17 +1152,13 @@ static u16 g4x_compute_wm(const struct intel_crtc_state *crtc_state,
 	cpp = plane_state->hw.fb->format->cpp[0];
 
 	/*
-	 * Not 100% sure which way ELK should go here as the
-	 * spec only says CL/CTG should assume 32bpp and BW
-	 * doesn't need to. But as these things followed the
-	 * mobile vs. desktop lines on gen3 as well, let's
-	 * assume ELK doesn't need this.
+	 * WaUse32BppForSRWM:ctg,elk
 	 *
-	 * The spec also fails to list such a restriction for
-	 * the HPLL watermark, which seems a little strange.
+	 * The spec fails to list this restriction for the
+	 * HPLL watermark, which seems a little strange.
 	 * Let's use 32bpp for the HPLL watermark as well.
 	 */
-	if (IS_GM45(dev_priv) && plane->id == PLANE_PRIMARY &&
+	if (plane->id == PLANE_PRIMARY &&
 	    level != G4X_WM_LEVEL_NORMAL)
 		cpp = max(cpp, 4u);
 
-- 
2.26.3

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Re: [Intel-gfx] [PATCH 04/14] drm/i915: Apply WaUse32BppForSRWM to elk as well as ctg

[Lisovskiy, Stanislav]

On Fri, May 14, 2021 at 03:57:41PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The w/a database lists this for both ctg and elk. So let's apply it to
> elk as well. And add the w/a name.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 12 ++++--------
>  1 file changed, 4 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 8a08a7c0e71f..661bc6fdf38c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1152,17 +1152,13 @@ static u16 g4x_compute_wm(const struct intel_crtc_state *crtc_state,
>  	cpp = plane_state->hw.fb->format->cpp[0];
>  
>  	/*
> -	 * Not 100% sure which way ELK should go here as the
> -	 * spec only says CL/CTG should assume 32bpp and BW
> -	 * doesn't need to. But as these things followed the
> -	 * mobile vs. desktop lines on gen3 as well, let's
> -	 * assume ELK doesn't need this.
> +	 * WaUse32BppForSRWM:ctg,elk
>  	 *
> -	 * The spec also fails to list such a restriction for
> -	 * the HPLL watermark, which seems a little strange.
> +	 * The spec fails to list this restriction for the
> +	 * HPLL watermark, which seems a little strange.
>  	 * Let's use 32bpp for the HPLL watermark as well.
>  	 */
> -	if (IS_GM45(dev_priv) && plane->id == PLANE_PRIMARY &&
> +	if (plane->id == PLANE_PRIMARY &&

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

>  	    level != G4X_WM_LEVEL_NORMAL)
>  		cpp = max(cpp, 4u);
>  
> -- 
> 2.26.3
> 
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 05/14] drm/i915: Fix HPLL watermark readout for g4x

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

If HPLL watermarks are already enabled, let's not mark them as
disabled by forgetting to bump 'level' before we call
g4x_raw_plane_wm_set().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 661bc6fdf38c..990ee5a590d3 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6468,7 +6468,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
 		for_each_plane_id_on_crtc(crtc, plane_id)
 			raw->plane[plane_id] = active->wm.plane[plane_id];
 
-		if (++level > max_level)
+		level = G4X_WM_LEVEL_SR;
+		if (level > max_level)
 			goto out;
 
 		raw = &crtc_state->wm.g4x.raw[level];
@@ -6477,7 +6478,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
 		raw->plane[PLANE_SPRITE0] = 0;
 		raw->fbc = active->sr.fbc;
 
-		if (++level > max_level)
+		level = G4X_WM_LEVEL_HPLL;
+		if (level > max_level)
 			goto out;
 
 		raw = &crtc_state->wm.g4x.raw[level];
@@ -6486,6 +6488,7 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
 		raw->plane[PLANE_SPRITE0] = 0;
 		raw->fbc = active->hpll.fbc;
 
+		level++;
 	out:
 		for_each_plane_id_on_crtc(crtc, plane_id)
 			g4x_raw_plane_wm_set(crtc_state, level,
-- 
2.26.3

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Re: [Intel-gfx] [PATCH 05/14] drm/i915: Fix HPLL watermark readout for g4x

[Lisovskiy, Stanislav]

On Fri, May 14, 2021 at 03:57:42PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> If HPLL watermarks are already enabled, let's not mark them as
> disabled by forgetting to bump 'level' before we call
> g4x_raw_plane_wm_set().
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 661bc6fdf38c..990ee5a590d3 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6468,7 +6468,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
>  		for_each_plane_id_on_crtc(crtc, plane_id)
>  			raw->plane[plane_id] = active->wm.plane[plane_id];
>  
> -		if (++level > max_level)
> +		level = G4X_WM_LEVEL_SR;
> +		if (level > max_level)

Do I understand correctly that its basically identical to what
was before, so this is done here just for it to look more explicit?

I.e we had for example max_level G4X_WM_LEVEL_SR and level G4X_WM_LEVEL_NORMAL
, after ++level it will anyway become G4X_WM_LEVEL_SR and same for next one.


>  			goto out;
>  
>  		raw = &crtc_state->wm.g4x.raw[level];
> @@ -6477,7 +6478,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
>  		raw->plane[PLANE_SPRITE0] = 0;
>  		raw->fbc = active->sr.fbc;
>  
> -		if (++level > max_level)
> +		level = G4X_WM_LEVEL_HPLL;
> +		if (level > max_level)
>  			goto out;
>  
>  		raw = &crtc_state->wm.g4x.raw[level];
> @@ -6486,6 +6488,7 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
>  		raw->plane[PLANE_SPRITE0] = 0;
>  		raw->fbc = active->hpll.fbc;
>  
> +		level++;

Hi Ville,

So if we reached here, it means level = G4X_WM_LEVEL_HPLL, which is 
the max wm level defined, why are we then incrementing it even more?

the g4x_raw_plane_wm_set will be using that value as a level:

for (; level < intel_wm_num_levels(dev_priv); level++) {
	struct g4x_pipe_wm *raw = &crtc_state->wm.g4x.raw[level];

	dirty |= raw->plane[plane_id] != value;
	raw->plane[plane_id] = value;
}

however level then will be equal to NUM_G4X_WM_LEVELS, which is actually
an illegal value, or is that an expected behaviour?

Just trying to understand, whats happening here, before stamping an r-b :)

Stan


>  	out:
>  		for_each_plane_id_on_crtc(crtc, plane_id)
>  			g4x_raw_plane_wm_set(crtc_state, level,
> -- 
> 2.26.3
> 
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Re: [Intel-gfx] [PATCH 05/14] drm/i915: Fix HPLL watermark readout for g4x

[Ville Syrjälä]

On Fri, Sep 17, 2021 at 06:34:22PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, May 14, 2021 at 03:57:42PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > If HPLL watermarks are already enabled, let's not mark them as
> > disabled by forgetting to bump 'level' before we call
> > g4x_raw_plane_wm_set().
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 7 +++++--
> >  1 file changed, 5 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 661bc6fdf38c..990ee5a590d3 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -6468,7 +6468,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
> >  		for_each_plane_id_on_crtc(crtc, plane_id)
> >  			raw->plane[plane_id] = active->wm.plane[plane_id];
> >  
> > -		if (++level > max_level)
> > +		level = G4X_WM_LEVEL_SR;
> > +		if (level > max_level)
> 
> Do I understand correctly that its basically identical to what
> was before, so this is done here just for it to look more explicit?
> 
> I.e we had for example max_level G4X_WM_LEVEL_SR and level G4X_WM_LEVEL_NORMAL
> , after ++level it will anyway become G4X_WM_LEVEL_SR and same for next one.
> 
> 
> >  			goto out;
> >  
> >  		raw = &crtc_state->wm.g4x.raw[level];
> > @@ -6477,7 +6478,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
> >  		raw->plane[PLANE_SPRITE0] = 0;
> >  		raw->fbc = active->sr.fbc;
> >  
> > -		if (++level > max_level)
> > +		level = G4X_WM_LEVEL_HPLL;
> > +		if (level > max_level)
> >  			goto out;
> >  
> >  		raw = &crtc_state->wm.g4x.raw[level];
> > @@ -6486,6 +6488,7 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
> >  		raw->plane[PLANE_SPRITE0] = 0;
> >  		raw->fbc = active->hpll.fbc;
> >  
> > +		level++;
> 
> Hi Ville,
> 
> So if we reached here, it means level = G4X_WM_LEVEL_HPLL, which is 
> the max wm level defined, why are we then incrementing it even more?
> 
> the g4x_raw_plane_wm_set will be using that value as a level:
> 
> for (; level < intel_wm_num_levels(dev_priv); level++) {
> 	struct g4x_pipe_wm *raw = &crtc_state->wm.g4x.raw[level];
> 
> 	dirty |= raw->plane[plane_id] != value;
> 	raw->plane[plane_id] = value;
> }
> 
> however level then will be equal to NUM_G4X_WM_LEVELS, which is actually
> an illegal value, or is that an expected behaviour?
> 
> Just trying to understand, whats happening here, before stamping an r-b :)
> 
> Stan
> 
> 
> >  	out:
> >  		for_each_plane_id_on_crtc(crtc, plane_id)
> >  			g4x_raw_plane_wm_set(crtc_state, level,

Right, so the code is basically this:

level = G4X_WM_LEVEL_SR;
if (level > max_level)
	goto out;
level = G4X_WM_LEVEL_HPLL;
if (level > max_level)
	goto out;
level++ /* ie. level=NUM_G4X_WM_LEVELS */
out:
invalidate_raw_watermarks_starting_from_level(level);

So if we take the first goto we want to invalidate all
watermarks starting from SR, second goto wants to invalidate
all watermarks starting from HPLL, and if we didn't take either
goto we don't want to invalidate any watermarks because we deemed
everything up to and including HPLL is ok. So we can't just
leave level==G4X_WM_LEVEL_HPLL or else the code would still invalidate
the HPLL watermarks. Instead we level++ so that the invalidate call
becomes a nop.

The other option I suppose would be to skip the invalidation stuff
if we didn't take either of the gotos, but I'm thinking that would make
the code more messy.

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH 05/14] drm/i915: Fix HPLL watermark readout for g4x

[Lisovskiy, Stanislav]

On Wed, Sep 22, 2021 at 05:05:12PM +0300, Ville Syrjälä wrote:
> On Fri, Sep 17, 2021 at 06:34:22PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 14, 2021 at 03:57:42PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > If HPLL watermarks are already enabled, let's not mark them as
> > > disabled by forgetting to bump 'level' before we call
> > > g4x_raw_plane_wm_set().
> > > 
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_pm.c | 7 +++++--
> > >  1 file changed, 5 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > index 661bc6fdf38c..990ee5a590d3 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -6468,7 +6468,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
> > >  		for_each_plane_id_on_crtc(crtc, plane_id)
> > >  			raw->plane[plane_id] = active->wm.plane[plane_id];
> > >  
> > > -		if (++level > max_level)
> > > +		level = G4X_WM_LEVEL_SR;
> > > +		if (level > max_level)
> > 
> > Do I understand correctly that its basically identical to what
> > was before, so this is done here just for it to look more explicit?
> > 
> > I.e we had for example max_level G4X_WM_LEVEL_SR and level G4X_WM_LEVEL_NORMAL
> > , after ++level it will anyway become G4X_WM_LEVEL_SR and same for next one.
> > 
> > 
> > >  			goto out;
> > >  
> > >  		raw = &crtc_state->wm.g4x.raw[level];
> > > @@ -6477,7 +6478,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
> > >  		raw->plane[PLANE_SPRITE0] = 0;
> > >  		raw->fbc = active->sr.fbc;
> > >  
> > > -		if (++level > max_level)
> > > +		level = G4X_WM_LEVEL_HPLL;
> > > +		if (level > max_level)
> > >  			goto out;
> > >  
> > >  		raw = &crtc_state->wm.g4x.raw[level];
> > > @@ -6486,6 +6488,7 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
> > >  		raw->plane[PLANE_SPRITE0] = 0;
> > >  		raw->fbc = active->hpll.fbc;
> > >  
> > > +		level++;
> > 
> > Hi Ville,
> > 
> > So if we reached here, it means level = G4X_WM_LEVEL_HPLL, which is 
> > the max wm level defined, why are we then incrementing it even more?
> > 
> > the g4x_raw_plane_wm_set will be using that value as a level:
> > 
> > for (; level < intel_wm_num_levels(dev_priv); level++) {
> > 	struct g4x_pipe_wm *raw = &crtc_state->wm.g4x.raw[level];
> > 
> > 	dirty |= raw->plane[plane_id] != value;
> > 	raw->plane[plane_id] = value;
> > }
> > 
> > however level then will be equal to NUM_G4X_WM_LEVELS, which is actually
> > an illegal value, or is that an expected behaviour?
> > 
> > Just trying to understand, whats happening here, before stamping an r-b :)
> > 
> > Stan
> > 
> > 
> > >  	out:
> > >  		for_each_plane_id_on_crtc(crtc, plane_id)
> > >  			g4x_raw_plane_wm_set(crtc_state, level,
> 
> Right, so the code is basically this:
> 
> level = G4X_WM_LEVEL_SR;
> if (level > max_level)
> 	goto out;
> level = G4X_WM_LEVEL_HPLL;
> if (level > max_level)
> 	goto out;
> level++ /* ie. level=NUM_G4X_WM_LEVELS */
> out:
> invalidate_raw_watermarks_starting_from_level(level);
> 
> So if we take the first goto we want to invalidate all
> watermarks starting from SR, second goto wants to invalidate
> all watermarks starting from HPLL, and if we didn't take either
> goto we don't want to invalidate any watermarks because we deemed
> everything up to and including HPLL is ok. So we can't just
> leave level==G4X_WM_LEVEL_HPLL or else the code would still invalidate
> the HPLL watermarks. Instead we level++ so that the invalidate call
> becomes a nop.
> 
> The other option I suppose would be to skip the invalidation stuff
> if we didn't take either of the gotos, but I'm thinking that would make
> the code more messy.

Ah ok, thought its setting wm levels, but if its actually invalidating,
makes sense. Probably that is why it uses USHRT_MAX as a value.

Thanks for the clarification.

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> 
> -- 
> Ville Syrjälä
> Intel

Re: [Intel-gfx] [PATCH 05/14] drm/i915: Fix HPLL watermark readout for g4x

[Ville Syrjälä]

On Thu, Sep 23, 2021 at 04:24:21PM +0300, Lisovskiy, Stanislav wrote:
> On Wed, Sep 22, 2021 at 05:05:12PM +0300, Ville Syrjälä wrote:
> > On Fri, Sep 17, 2021 at 06:34:22PM +0300, Lisovskiy, Stanislav wrote:
> > > On Fri, May 14, 2021 at 03:57:42PM +0300, Ville Syrjala wrote:
> > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > 
> > > > If HPLL watermarks are already enabled, let's not mark them as
> > > > disabled by forgetting to bump 'level' before we call
> > > > g4x_raw_plane_wm_set().
> > > > 
> > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/intel_pm.c | 7 +++++--
> > > >  1 file changed, 5 insertions(+), 2 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > > index 661bc6fdf38c..990ee5a590d3 100644
> > > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > > @@ -6468,7 +6468,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
> > > >  		for_each_plane_id_on_crtc(crtc, plane_id)
> > > >  			raw->plane[plane_id] = active->wm.plane[plane_id];
> > > >  
> > > > -		if (++level > max_level)
> > > > +		level = G4X_WM_LEVEL_SR;
> > > > +		if (level > max_level)
> > > 
> > > Do I understand correctly that its basically identical to what
> > > was before, so this is done here just for it to look more explicit?
> > > 
> > > I.e we had for example max_level G4X_WM_LEVEL_SR and level G4X_WM_LEVEL_NORMAL
> > > , after ++level it will anyway become G4X_WM_LEVEL_SR and same for next one.
> > > 
> > > 
> > > >  			goto out;
> > > >  
> > > >  		raw = &crtc_state->wm.g4x.raw[level];
> > > > @@ -6477,7 +6478,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
> > > >  		raw->plane[PLANE_SPRITE0] = 0;
> > > >  		raw->fbc = active->sr.fbc;
> > > >  
> > > > -		if (++level > max_level)
> > > > +		level = G4X_WM_LEVEL_HPLL;
> > > > +		if (level > max_level)
> > > >  			goto out;
> > > >  
> > > >  		raw = &crtc_state->wm.g4x.raw[level];
> > > > @@ -6486,6 +6488,7 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
> > > >  		raw->plane[PLANE_SPRITE0] = 0;
> > > >  		raw->fbc = active->hpll.fbc;
> > > >  
> > > > +		level++;
> > > 
> > > Hi Ville,
> > > 
> > > So if we reached here, it means level = G4X_WM_LEVEL_HPLL, which is 
> > > the max wm level defined, why are we then incrementing it even more?
> > > 
> > > the g4x_raw_plane_wm_set will be using that value as a level:
> > > 
> > > for (; level < intel_wm_num_levels(dev_priv); level++) {
> > > 	struct g4x_pipe_wm *raw = &crtc_state->wm.g4x.raw[level];
> > > 
> > > 	dirty |= raw->plane[plane_id] != value;
> > > 	raw->plane[plane_id] = value;
> > > }
> > > 
> > > however level then will be equal to NUM_G4X_WM_LEVELS, which is actually
> > > an illegal value, or is that an expected behaviour?
> > > 
> > > Just trying to understand, whats happening here, before stamping an r-b :)
> > > 
> > > Stan
> > > 
> > > 
> > > >  	out:
> > > >  		for_each_plane_id_on_crtc(crtc, plane_id)
> > > >  			g4x_raw_plane_wm_set(crtc_state, level,
> > 
> > Right, so the code is basically this:
> > 
> > level = G4X_WM_LEVEL_SR;
> > if (level > max_level)
> > 	goto out;
> > level = G4X_WM_LEVEL_HPLL;
> > if (level > max_level)
> > 	goto out;
> > level++ /* ie. level=NUM_G4X_WM_LEVELS */
> > out:
> > invalidate_raw_watermarks_starting_from_level(level);
> > 
> > So if we take the first goto we want to invalidate all
> > watermarks starting from SR, second goto wants to invalidate
> > all watermarks starting from HPLL, and if we didn't take either
> > goto we don't want to invalidate any watermarks because we deemed
> > everything up to and including HPLL is ok. So we can't just
> > leave level==G4X_WM_LEVEL_HPLL or else the code would still invalidate
> > the HPLL watermarks. Instead we level++ so that the invalidate call
> > becomes a nop.
> > 
> > The other option I suppose would be to skip the invalidation stuff
> > if we didn't take either of the gotos, but I'm thinking that would make
> > the code more messy.
> 
> Ah ok, thought its setting wm levels, but if its actually invalidating,
> makes sense. Probably that is why it uses USHRT_MAX as a value.

Yes. I guess it wouldn't hurt to add a tiny raw_wm_invalidate()
wrapper or something to make the code more self explanatory.

> 
> Thanks for the clarification.
> 
> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

Ta.

-- 
Ville Syrjälä
Intel

[Intel-gfx] [PATCH 06/14] drm/i915: Split g4x_compute_pipe_wm() into two

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Split g4x_compute_pipe_wm() into two halves. The first half computes
the new raw watermarks, and the second half munges those up into real
watermarks for the particular pipe.

We can reuse the second half for watermark sanitation as well.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 52 +++++++++++++++++++--------------
 1 file changed, 30 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 990ee5a590d3..59a22e1ee5bf 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1366,34 +1366,14 @@ static bool g4x_compute_fbc_en(const struct g4x_wm_state *wm_state,
 	return true;
 }
 
-static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
+static int _g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	struct intel_atomic_state *state =
-		to_intel_atomic_state(crtc_state->uapi.state);
 	struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
 	u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
 	const struct g4x_pipe_wm *raw;
-	const struct intel_plane_state *old_plane_state;
-	const struct intel_plane_state *new_plane_state;
-	struct intel_plane *plane;
 	enum plane_id plane_id;
-	int i, level;
-	unsigned int dirty = 0;
-
-	for_each_oldnew_intel_plane_in_state(state, plane,
-					     old_plane_state,
-					     new_plane_state, i) {
-		if (new_plane_state->hw.crtc != &crtc->base &&
-		    old_plane_state->hw.crtc != &crtc->base)
-			continue;
-
-		if (g4x_raw_plane_wm_compute(crtc_state, new_plane_state))
-			dirty |= BIT(plane->id);
-	}
-
-	if (!dirty)
-		return 0;
+	int level;
 
 	level = G4X_WM_LEVEL_NORMAL;
 	if (!g4x_raw_crtc_wm_is_valid(crtc_state, level))
@@ -1446,6 +1426,34 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 	return 0;
 }
 
+static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
+{
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct intel_atomic_state *state =
+		to_intel_atomic_state(crtc_state->uapi.state);
+	const struct intel_plane_state *old_plane_state;
+	const struct intel_plane_state *new_plane_state;
+	struct intel_plane *plane;
+	unsigned int dirty = 0;
+	int i;
+
+	for_each_oldnew_intel_plane_in_state(state, plane,
+					     old_plane_state,
+					     new_plane_state, i) {
+		if (new_plane_state->hw.crtc != &crtc->base &&
+		    old_plane_state->hw.crtc != &crtc->base)
+			continue;
+
+		if (g4x_raw_plane_wm_compute(crtc_state, new_plane_state))
+			dirty |= BIT(plane->id);
+	}
+
+	if (!dirty)
+		return 0;
+
+	return _g4x_compute_pipe_wm(crtc_state);
+}
+
 static int g4x_compute_intermediate_wm(struct intel_crtc_state *new_crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
-- 
2.26.3

_______________________________________________
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Re: [Intel-gfx] [PATCH 06/14] drm/i915: Split g4x_compute_pipe_wm() into two

[Lisovskiy, Stanislav]

On Fri, May 14, 2021 at 03:57:43PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Split g4x_compute_pipe_wm() into two halves. The first half computes
> the new raw watermarks, and the second half munges those up into real
> watermarks for the particular pipe.
> 
> We can reuse the second half for watermark sanitation as well.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 52 +++++++++++++++++++--------------
>  1 file changed, 30 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 990ee5a590d3..59a22e1ee5bf 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1366,34 +1366,14 @@ static bool g4x_compute_fbc_en(const struct g4x_wm_state *wm_state,
>  	return true;
>  }
>  
> -static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
> +static int _g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -	struct intel_atomic_state *state =
> -		to_intel_atomic_state(crtc_state->uapi.state);
>  	struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
>  	u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
>  	const struct g4x_pipe_wm *raw;
> -	const struct intel_plane_state *old_plane_state;
> -	const struct intel_plane_state *new_plane_state;
> -	struct intel_plane *plane;
>  	enum plane_id plane_id;
> -	int i, level;
> -	unsigned int dirty = 0;
> -
> -	for_each_oldnew_intel_plane_in_state(state, plane,
> -					     old_plane_state,
> -					     new_plane_state, i) {
> -		if (new_plane_state->hw.crtc != &crtc->base &&
> -		    old_plane_state->hw.crtc != &crtc->base)
> -			continue;
> -
> -		if (g4x_raw_plane_wm_compute(crtc_state, new_plane_state))
> -			dirty |= BIT(plane->id);
> -	}
> -
> -	if (!dirty)
> -		return 0;
> +	int level;
>  
>  	level = G4X_WM_LEVEL_NORMAL;
>  	if (!g4x_raw_crtc_wm_is_valid(crtc_state, level))
> @@ -1446,6 +1426,34 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
>  	return 0;
>  }
>  
> +static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> +	struct intel_atomic_state *state =
> +		to_intel_atomic_state(crtc_state->uapi.state);
> +	const struct intel_plane_state *old_plane_state;
> +	const struct intel_plane_state *new_plane_state;
> +	struct intel_plane *plane;
> +	unsigned int dirty = 0;
> +	int i;
> +
> +	for_each_oldnew_intel_plane_in_state(state, plane,
> +					     old_plane_state,
> +					     new_plane_state, i) {
> +		if (new_plane_state->hw.crtc != &crtc->base &&
> +		    old_plane_state->hw.crtc != &crtc->base)
> +			continue;
> +
> +		if (g4x_raw_plane_wm_compute(crtc_state, new_plane_state))
> +			dirty |= BIT(plane->id);
> +	}
> +
> +	if (!dirty)
> +		return 0;
> +
> +	return _g4x_compute_pipe_wm(crtc_state);
> +}
> +

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

>  static int g4x_compute_intermediate_wm(struct intel_crtc_state *new_crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
> -- 
> 2.26.3
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 07/14] drm/i915: Split vlv_compute_pipe_wm() into two

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Split vlv_compute_pipe_wm() into two halves. The first half computes
the new raw watermarks, and the second half munges those up into real
watermarks for the particular pipe.

We can reuse the second half for watermark sanitation as well.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 112 ++++++++++++++++++--------------
 1 file changed, 63 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 59a22e1ee5bf..115cbf4cd10f 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1893,64 +1893,17 @@ static bool vlv_raw_crtc_wm_is_valid(const struct intel_crtc_state *crtc_state,
 		vlv_raw_plane_wm_is_valid(crtc_state, PLANE_CURSOR, level);
 }
 
-static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
+static int _vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
-	struct intel_atomic_state *state =
-		to_intel_atomic_state(crtc_state->uapi.state);
 	struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
 	const struct vlv_fifo_state *fifo_state =
 		&crtc_state->wm.vlv.fifo_state;
 	u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
 	int num_active_planes = hweight8(active_planes);
-	bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->uapi);
-	const struct intel_plane_state *old_plane_state;
-	const struct intel_plane_state *new_plane_state;
-	struct intel_plane *plane;
 	enum plane_id plane_id;
-	int level, ret, i;
-	unsigned int dirty = 0;
-
-	for_each_oldnew_intel_plane_in_state(state, plane,
-					     old_plane_state,
-					     new_plane_state, i) {
-		if (new_plane_state->hw.crtc != &crtc->base &&
-		    old_plane_state->hw.crtc != &crtc->base)
-			continue;
-
-		if (vlv_raw_plane_wm_compute(crtc_state, new_plane_state))
-			dirty |= BIT(plane->id);
-	}
-
-	/*
-	 * DSPARB registers may have been reset due to the
-	 * power well being turned off. Make sure we restore
-	 * them to a consistent state even if no primary/sprite
-	 * planes are initially active.
-	 */
-	if (needs_modeset)
-		crtc_state->fifo_changed = true;
-
-	if (!dirty)
-		return 0;
-
-	/* cursor changes don't warrant a FIFO recompute */
-	if (dirty & ~BIT(PLANE_CURSOR)) {
-		const struct intel_crtc_state *old_crtc_state =
-			intel_atomic_get_old_crtc_state(state, crtc);
-		const struct vlv_fifo_state *old_fifo_state =
-			&old_crtc_state->wm.vlv.fifo_state;
-
-		ret = vlv_compute_fifo(crtc_state);
-		if (ret)
-			return ret;
-
-		if (needs_modeset ||
-		    memcmp(old_fifo_state, fifo_state,
-			   sizeof(*fifo_state)) != 0)
-			crtc_state->fifo_changed = true;
-	}
+	int level;
 
 	/* initially allow all levels */
 	wm_state->num_levels = intel_wm_num_levels(dev_priv);
@@ -1997,6 +1950,67 @@ static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 	return 0;
 }
 
+static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
+{
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct intel_atomic_state *state =
+		to_intel_atomic_state(crtc_state->uapi.state);
+	bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->uapi);
+	const struct intel_plane_state *old_plane_state;
+	const struct intel_plane_state *new_plane_state;
+	struct intel_plane *plane;
+	unsigned int dirty = 0;
+	int i;
+
+	for_each_oldnew_intel_plane_in_state(state, plane,
+					     old_plane_state,
+					     new_plane_state, i) {
+		if (new_plane_state->hw.crtc != &crtc->base &&
+		    old_plane_state->hw.crtc != &crtc->base)
+			continue;
+
+		if (vlv_raw_plane_wm_compute(crtc_state, new_plane_state))
+			dirty |= BIT(plane->id);
+	}
+
+	/*
+	 * DSPARB registers may have been reset due to the
+	 * power well being turned off. Make sure we restore
+	 * them to a consistent state even if no primary/sprite
+	 * planes are initially active. We also force a FIFO
+	 * recomputation so that we are sure to sanitize the
+	 * FIFO setting we took over from the BIOS even if there
+	 * are no active planes on the crtc.
+	 */
+	if (needs_modeset)
+		dirty = ~0;
+
+	if (!dirty)
+		return 0;
+
+	/* cursor changes don't warrant a FIFO recompute */
+	if (dirty & ~BIT(PLANE_CURSOR)) {
+		const struct intel_crtc_state *old_crtc_state =
+			intel_atomic_get_old_crtc_state(state, crtc);
+		const struct vlv_fifo_state *old_fifo_state =
+			&old_crtc_state->wm.vlv.fifo_state;
+		const struct vlv_fifo_state *new_fifo_state =
+			&crtc_state->wm.vlv.fifo_state;
+		int ret;
+
+		ret = vlv_compute_fifo(crtc_state);
+		if (ret)
+			return ret;
+
+		if (needs_modeset ||
+		    memcmp(old_fifo_state, new_fifo_state,
+			   sizeof(*new_fifo_state)) != 0)
+			crtc_state->fifo_changed = true;
+	}
+
+	return _vlv_compute_pipe_wm(crtc_state);
+}
+
 #define VLV_FIFO(plane, value) \
 	(((value) << DSPARB_ ## plane ## _SHIFT_VLV) & DSPARB_ ## plane ## _MASK_VLV)
 
-- 
2.26.3

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[Intel-gfx] [PATCH 08/14] drm/i915: Simplify up g4x watermark sanitation

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We can simplify the g4x watermark sanitation by reusing the
second half of g4x_compute_pipe_wm() to convert the sanitized
raw watermarks into the proper form to be used as the
optimal/intermediate watermarks.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 21 +++++++--------------
 1 file changed, 7 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 115cbf4cd10f..b2ebc5ff0007 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6552,37 +6552,30 @@ void g4x_wm_sanitize(struct drm_i915_private *dev_priv)
 			to_intel_crtc_state(crtc->base.state);
 		struct intel_plane_state *plane_state =
 			to_intel_plane_state(plane->base.state);
-		struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
 		enum plane_id plane_id = plane->id;
-		int level;
+		int level, num_levels = intel_wm_num_levels(dev_priv);
 
 		if (plane_state->uapi.visible)
 			continue;
 
-		for (level = 0; level < 3; level++) {
+		for (level = 0; level < num_levels; level++) {
 			struct g4x_pipe_wm *raw =
 				&crtc_state->wm.g4x.raw[level];
 
 			raw->plane[plane_id] = 0;
-			wm_state->wm.plane[plane_id] = 0;
-		}
 
-		if (plane_id == PLANE_PRIMARY) {
-			for (level = 0; level < 3; level++) {
-				struct g4x_pipe_wm *raw =
-					&crtc_state->wm.g4x.raw[level];
+			if (plane_id == PLANE_PRIMARY)
 				raw->fbc = 0;
-			}
-
-			wm_state->sr.fbc = 0;
-			wm_state->hpll.fbc = 0;
-			wm_state->fbc_en = false;
 		}
 	}
 
 	for_each_intel_crtc(&dev_priv->drm, crtc) {
 		struct intel_crtc_state *crtc_state =
 			to_intel_crtc_state(crtc->base.state);
+		int ret;
+
+		ret = _g4x_compute_pipe_wm(crtc_state);
+		drm_WARN_ON(&dev_priv->drm, ret);
 
 		crtc_state->wm.g4x.intermediate =
 			crtc_state->wm.g4x.optimal;
-- 
2.26.3

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[Intel-gfx] [PATCH 09/14] drm/i915: Simplify up vlv watermark sanitation

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We can simplify the vlv watermark sanitation by reusing the
second half of vlv_compute_pipe_wm() to convert the sanitized
raw watermarks into the proper form to be used as the
optimal/intermediate watermarks.

Also to be consistent with normal watermark computation the sanitized
watermarks should be all 0 for any disabled plane. Previously we
zeroed out the watermarks only up to the level (ie. PM2/5/DVDFS)
that was enabled.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b2ebc5ff0007..6776fe41c44d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6701,30 +6701,27 @@ void vlv_wm_sanitize(struct drm_i915_private *dev_priv)
 			to_intel_crtc_state(crtc->base.state);
 		struct intel_plane_state *plane_state =
 			to_intel_plane_state(plane->base.state);
-		struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
-		const struct vlv_fifo_state *fifo_state =
-			&crtc_state->wm.vlv.fifo_state;
 		enum plane_id plane_id = plane->id;
-		int level;
+		int level, num_levels = intel_wm_num_levels(dev_priv);
 
 		if (plane_state->uapi.visible)
 			continue;
 
-		for (level = 0; level < wm_state->num_levels; level++) {
+		for (level = 0; level < num_levels; level++) {
 			struct g4x_pipe_wm *raw =
 				&crtc_state->wm.vlv.raw[level];
 
 			raw->plane[plane_id] = 0;
-
-			wm_state->wm[level].plane[plane_id] =
-				vlv_invert_wm_value(raw->plane[plane_id],
-						    fifo_state->plane[plane_id]);
 		}
 	}
 
 	for_each_intel_crtc(&dev_priv->drm, crtc) {
 		struct intel_crtc_state *crtc_state =
 			to_intel_crtc_state(crtc->base.state);
+		int ret;
+
+		ret = _vlv_compute_pipe_wm(crtc_state);
+		drm_WARN_ON(&dev_priv->drm, ret);
 
 		crtc_state->wm.vlv.intermediate =
 			crtc_state->wm.vlv.optimal;
-- 
2.26.3

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[Intel-gfx] [PATCH 10/14] drm/i915: Add missing invalidate to g4x wm readout

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Let's not forget to mark the unused watermark levels as invalid
after the readout. The vlv/chv codepath has this but the g4x
didn't for some reason.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6776fe41c44d..dd0577a0323e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6517,6 +6517,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
 					     plane_id, USHRT_MAX);
 		g4x_raw_fbc_wm_set(crtc_state, level, USHRT_MAX);
 
+		g4x_invalidate_wms(crtc, active, level);
+
 		crtc_state->wm.g4x.optimal = *active;
 		crtc_state->wm.g4x.intermediate = *active;
 
-- 
2.26.3

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[Intel-gfx] [PATCH 11/14] drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

On g4x/vlv/chv the hardware seems incapable of changing the pixel
format, rotation, or YUV->RGB CSC matrix while in CxSR.

Additionally on VLV/CHV the sprites seem incapable of tiling
changes while in CxSR. On g4x CxSR is not even possible with
the sprite enabled. Curiously the primary plane seems perfectly
happy when changing tiling during CxSR.

Pimp up the code to account for these when determining whether
CxSR needs to be disabled. Since it looks like most of the plane
control register bits are affected let's just compare that.
But in the name of efficiency we'll make an exception for the
primary plane tiling changes (avoids some extra vblank waits).

Note that I didn't check yet whether the pipe gamma enable
bit is also affected. For now we ignore it since it's
not part of the pre-computed control register value.

v2: Just use the pre-computed plane control register values

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 53 +++++++++++++++++---
 1 file changed, 45 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 41683c529c3d..e696096dbde7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6825,6 +6825,47 @@ static bool needs_scaling(const struct intel_plane_state *state)
 	return (src_w != dst_w || src_h != dst_h);
 }
 
+static bool i9xx_must_disable_cxsr(const struct intel_crtc_state *new_crtc_state,
+				   const struct intel_plane_state *old_plane_state,
+				   const struct intel_plane_state *new_plane_state)
+{
+	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
+	bool old_visible = old_plane_state->uapi.visible;
+	bool new_visible = new_plane_state->uapi.visible;
+	u32 old_ctl = old_plane_state->ctl;
+	u32 new_ctl = new_plane_state->ctl;
+	bool modeset, turn_on, turn_off;
+
+	if (plane->id == PLANE_CURSOR)
+		return false;
+
+	modeset = intel_crtc_needs_modeset(new_crtc_state);
+	turn_off = old_visible && (!new_visible || modeset);
+	turn_on = new_visible && (!old_visible || modeset);
+
+	/* Must disable CxSR around plane enable/disable */
+	if (turn_on || turn_off)
+		return true;
+
+	if (!old_visible || !new_visible)
+		return false;
+
+	/*
+	 * Most plane control register updates are blocked while in CxSR.
+	 *
+	 * Tiling mode is one exception where the primary plane can
+	 * apparently handle it, whereas the sprites can not (the
+	 * sprite issue being only relevant on VLV/CHV where CxSR
+	 * is actually possible with a sprite enabled).
+	 */
+	if (plane->id == PLANE_PRIMARY) {
+		old_ctl &= ~DISPPLANE_TILED;
+		new_ctl &= ~DISPPLANE_TILED;
+	}
+
+	return old_ctl != new_ctl;
+}
+
 int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_state,
 				    struct intel_crtc_state *new_crtc_state,
 				    const struct intel_plane_state *old_plane_state,
@@ -6882,17 +6923,9 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat
 	if (turn_on) {
 		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
 			new_crtc_state->update_wm_pre = true;
-
-		/* must disable cxsr around plane enable/disable */
-		if (plane->id != PLANE_CURSOR)
-			new_crtc_state->disable_cxsr = true;
 	} else if (turn_off) {
 		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
 			new_crtc_state->update_wm_post = true;
-
-		/* must disable cxsr around plane enable/disable */
-		if (plane->id != PLANE_CURSOR)
-			new_crtc_state->disable_cxsr = true;
 	} else if (intel_wm_need_update(old_plane_state, new_plane_state)) {
 		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) {
 			/* FIXME bollocks */
@@ -6904,6 +6937,10 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat
 	if (visible || was_visible)
 		new_crtc_state->fb_bits |= plane->frontbuffer_bit;
 
+	if (HAS_GMCH(dev_priv) &&
+	    i9xx_must_disable_cxsr(new_crtc_state, old_plane_state, new_plane_state))
+		new_crtc_state->disable_cxsr = true;
+
 	/*
 	 * ILK/SNB DVSACNTR/Sprite Enable
 	 * IVB SPR_CTL/Sprite Enable
-- 
2.26.3

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[Intel-gfx] [PATCH 12/14] drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Like most other plane control register bits, the pipe gamma
enable bit is also blocked by CxSR. So make sure we kick the
machine out of CxSR before trying to change that bit.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index dab892d2251b..56a63df81a2f 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1257,6 +1257,10 @@ intel_color_add_affected_planes(struct intel_crtc_state *new_crtc_state)
 			return PTR_ERR(plane_state);
 
 		new_crtc_state->update_planes |= BIT(plane->id);
+
+		/* plane control register changes blocked by CxSR */
+		if (HAS_GMCH(dev_priv))
+			new_crtc_state->disable_cxsr = true;
 	}
 
 	return 0;
-- 
2.26.3

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[Intel-gfx] [PATCH 13/14] drm/i915: Write watermarks for disabled pipes on gmch platforms

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We've excluded gmch platforms from writing the final watermarks
for any disabled pipe. IIRC the reason was perhaps some lingering
issue with the watermark merging across the pipes. But I can't
really see any reason for this anymore, so let's unify this behaviour.
The main benefit being more consistency in register dumps when
we don't have stale watermarks hanging around in the registers.
Funcitonally there should be no difference as the hardware just
ignore all of it when the pipe is disabled.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e696096dbde7..dd8dd8e68c55 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10198,9 +10198,7 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
 	intel_fbc_disable(crtc);
 	intel_disable_shared_dpll(old_crtc_state);
 
-	/* FIXME unify this for all platforms */
 	if (!new_crtc_state->hw.active &&
-	    !HAS_GMCH(dev_priv) &&
 	    dev_priv->display.initial_watermarks)
 		dev_priv->display.initial_watermarks(state, crtc);
 }
-- 
2.26.3

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[Intel-gfx] [PATCH 14/14] drm/i915: Enable atomic by default on ctg/elk

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The watermark code for ctg/elk has been atomic ready for a long time
so let's just flip the switch now that some of the last CxSR issues
have been sorted out (which granted was a problem for vlv/chv as well
despite them already having atomic enabled by default).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 5118dc8386b2..082c673c2fb8 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -793,8 +793,11 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (IS_ERR(i915))
 		return PTR_ERR(i915);
 
-	/* Disable nuclear pageflip by default on pre-ILK */
-	if (!i915->params.nuclear_pageflip && match_info->graphics_ver < 5)
+	/* Disable nuclear pageflip by default on pre-CTG/ELK */
+	if (!i915->params.nuclear_pageflip &&
+	    match_info->graphics_ver < 5 &&
+	    match_info->platform != INTEL_G45 &&
+	    match_info->platform != INTEL_GM45)
 		i915->drm.driver_features &= ~DRIVER_ATOMIC;
 
 	/*
-- 
2.26.3

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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups

[Patchwork]

== Series Details ==

Series: drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups
URL   : https://patchwork.freedesktop.org/series/90164/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_display.c:1887:21:    expected struct i915_vma *[assigned] vma
+drivers/gpu/drm/i915/display/intel_display.c:1887:21:    got void [noderef] __iomem *[assigned] iomem
+drivers/gpu/drm/i915/display/intel_display.c:1887:21: warning: incorrect type in assignment (different address spaces)


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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 22087 bytes --]

== Series Details ==

Series: drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups
URL   : https://patchwork.freedesktop.org/series/90164/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10082 -> Patchwork_20126
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/index.html

Known issues
------------

  Here are the changes found in Patchwork_20126 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_cs_nop@nop-compute0:
    - fi-ilk-650:         NOTRUN -> [SKIP][1] ([fdo#109271]) +30 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-ilk-650/igt@amdgpu/amd_cs_nop@nop-compute0.html

  * igt@gem_exec_fence@basic-await@bcs0:
    - fi-bsw-nick:        [PASS][2] -> [FAIL][3] ([i915#3457])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-bsw-nick/igt@gem_exec_fence@basic-await@bcs0.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-bsw-nick/igt@gem_exec_fence@basic-await@bcs0.html

  * igt@gem_exec_fence@basic-await@vcs0:
    - fi-bsw-n3050:       NOTRUN -> [FAIL][4] ([i915#3457]) +2 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-bsw-n3050/igt@gem_exec_fence@basic-await@vcs0.html

  * igt@gem_exec_fence@basic-await@vecs0:
    - fi-glk-dsi:         [PASS][5] -> [FAIL][6] ([i915#3457])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-glk-dsi/igt@gem_exec_fence@basic-await@vecs0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-glk-dsi/igt@gem_exec_fence@basic-await@vecs0.html

  * igt@gem_exec_fence@basic-busy@bcs0:
    - fi-kbl-r:           NOTRUN -> [SKIP][7] ([fdo#109271]) +3 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-r/igt@gem_exec_fence@basic-busy@bcs0.html

  * igt@gem_exec_fence@basic-wait@bcs0:
    - fi-cml-s:           NOTRUN -> [SKIP][8] ([i915#1208]) +1 similar issue
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cml-s/igt@gem_exec_fence@basic-wait@bcs0.html

  * igt@gem_exec_fence@nb-await@bcs0:
    - fi-bsw-kefka:       [PASS][9] -> [FAIL][10] ([i915#3457])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-bsw-kefka/igt@gem_exec_fence@nb-await@bcs0.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-bsw-kefka/igt@gem_exec_fence@nb-await@bcs0.html

  * igt@gem_exec_fence@nb-await@rcs0:
    - fi-elk-e7500:       [PASS][11] -> [FAIL][12] ([i915#3457])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-elk-e7500/igt@gem_exec_fence@nb-await@rcs0.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-elk-e7500/igt@gem_exec_fence@nb-await@rcs0.html

  * igt@gem_exec_gttfill@basic:
    - fi-bsw-n3050:       NOTRUN -> [SKIP][13] ([fdo#109271])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-bsw-n3050/igt@gem_exec_gttfill@basic.html

  * igt@gem_exec_suspend@basic-s3:
    - fi-bsw-n3050:       NOTRUN -> [INCOMPLETE][14] ([i915#3159])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-bsw-n3050/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_huc_copy@huc-copy:
    - fi-cfl-guc:         NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#2190])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cfl-guc/igt@gem_huc_copy@huc-copy.html
    - fi-cml-s:           NOTRUN -> [SKIP][16] ([i915#2190])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cml-s/igt@gem_huc_copy@huc-copy.html
    - fi-kbl-x1275:       NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#2190])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-x1275/igt@gem_huc_copy@huc-copy.html
    - fi-kbl-r:           NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#2190])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-r/igt@gem_huc_copy@huc-copy.html
    - fi-skl-guc:         NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#2190])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-skl-guc/igt@gem_huc_copy@huc-copy.html

  * igt@i915_module_load@reload:
    - fi-cml-s:           NOTRUN -> [DMESG-WARN][20] ([i915#3457]) +1 similar issue
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cml-s/igt@i915_module_load@reload.html
    - fi-cfl-guc:         NOTRUN -> [DMESG-WARN][21] ([i915#3457]) +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cfl-guc/igt@i915_module_load@reload.html
    - fi-ilk-650:         NOTRUN -> [DMESG-FAIL][22] ([i915#3457]) +1 similar issue
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-ilk-650/igt@i915_module_load@reload.html
    - fi-kbl-x1275:       NOTRUN -> [DMESG-WARN][23] ([i915#3457]) +1 similar issue
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-x1275/igt@i915_module_load@reload.html

  * igt@i915_selftest@live@execlists:
    - fi-kbl-r:           NOTRUN -> [DMESG-FAIL][24] ([i915#3462])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-r/igt@i915_selftest@live@execlists.html
    - fi-kbl-x1275:       NOTRUN -> [DMESG-FAIL][25] ([i915#3462])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-x1275/igt@i915_selftest@live@execlists.html
    - fi-cml-s:           NOTRUN -> [DMESG-FAIL][26] ([i915#3462])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cml-s/igt@i915_selftest@live@execlists.html
    - fi-skl-guc:         NOTRUN -> [DMESG-FAIL][27] ([i915#3462])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-skl-guc/igt@i915_selftest@live@execlists.html
    - fi-cfl-guc:         NOTRUN -> [DMESG-FAIL][28] ([i915#3462])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cfl-guc/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@mman:
    - fi-kbl-r:           NOTRUN -> [DMESG-WARN][29] ([i915#3457]) +1 similar issue
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-r/igt@i915_selftest@live@mman.html
    - fi-skl-guc:         NOTRUN -> [DMESG-WARN][30] ([i915#3457]) +1 similar issue
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-skl-guc/igt@i915_selftest@live@mman.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-skl-guc:         NOTRUN -> [SKIP][31] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-skl-guc/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_chamelium@dp-edid-read:
    - fi-cfl-guc:         NOTRUN -> [SKIP][32] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cfl-guc/igt@kms_chamelium@dp-edid-read.html

  * igt@kms_chamelium@dp-hpd-fast:
    - fi-ilk-650:         NOTRUN -> [SKIP][33] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-ilk-650/igt@kms_chamelium@dp-hpd-fast.html
    - fi-cml-s:           NOTRUN -> [SKIP][34] ([fdo#109284] / [fdo#111827]) +8 similar issues
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cml-s/igt@kms_chamelium@dp-hpd-fast.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-kbl-x1275:       NOTRUN -> [SKIP][35] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-x1275/igt@kms_chamelium@hdmi-crc-fast.html

  * igt@kms_chamelium@hdmi-edid-read:
    - fi-kbl-r:           NOTRUN -> [SKIP][36] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-r/igt@kms_chamelium@hdmi-edid-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-ilk-650:         NOTRUN -> [FAIL][37] ([i915#3457]) +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-ilk-650/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-cml-s:           NOTRUN -> [SKIP][38] ([fdo#109285])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cml-s/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-tgl-u2:          [PASS][39] -> [FAIL][40] ([i915#2416])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-tgl-u2/igt@kms_frontbuffer_tracking@basic.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-tgl-u2/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - fi-cml-s:           NOTRUN -> [SKIP][41] ([fdo#109278] / [i915#533])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cml-s/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
    - fi-cfl-guc:         NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#533])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cfl-guc/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
    - fi-kbl-x1275:       NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#533])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-x1275/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
    - fi-kbl-r:           NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#533])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-r/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
    - fi-skl-guc:         NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#533])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-skl-guc/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
    - fi-pnv-d510:        [PASS][46] -> [FAIL][47] ([i915#53])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-pnv-d510/igt@kms_pipe_crc_basic@hang-read-crc-pipe-a.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-pnv-d510/igt@kms_pipe_crc_basic@hang-read-crc-pipe-a.html
    - fi-bsw-kefka:       [PASS][48] -> [FAIL][49] ([i915#53]) +2 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-bsw-kefka/igt@kms_pipe_crc_basic@hang-read-crc-pipe-a.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-bsw-kefka/igt@kms_pipe_crc_basic@hang-read-crc-pipe-a.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
    - fi-ilk-650:         NOTRUN -> [FAIL][50] ([i915#53]) +7 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-ilk-650/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence.html
    - fi-elk-e7500:       [PASS][51] -> [FAIL][52] ([i915#53]) +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-elk-e7500/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-elk-e7500/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence.html
    - fi-bwr-2160:        [PASS][53] -> [FAIL][54] ([i915#53])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-bwr-2160/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-bwr-2160/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence.html

  * igt@kms_psr@primary_mmap_gtt:
    - fi-skl-guc:         NOTRUN -> [SKIP][55] ([fdo#109271]) +8 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-skl-guc/igt@kms_psr@primary_mmap_gtt.html

  * igt@kms_psr@primary_page_flip:
    - fi-kbl-x1275:       NOTRUN -> [SKIP][56] ([fdo#109271]) +8 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-x1275/igt@kms_psr@primary_page_flip.html

  * igt@kms_psr@sprite_plane_onoff:
    - fi-cfl-guc:         NOTRUN -> [SKIP][57] ([fdo#109271]) +8 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cfl-guc/igt@kms_psr@sprite_plane_onoff.html

  * igt@prime_vgem@basic-userptr:
    - fi-cml-s:           NOTRUN -> [SKIP][58] ([i915#3301])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cml-s/igt@prime_vgem@basic-userptr.html

  * igt@runner@aborted:
    - fi-kbl-x1275:       NOTRUN -> [FAIL][59] ([i915#1436] / [i915#2426] / [i915#3363])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-x1275/igt@runner@aborted.html
    - fi-kbl-r:           NOTRUN -> [FAIL][60] ([i915#1436] / [i915#3363])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-r/igt@runner@aborted.html
    - fi-cml-s:           NOTRUN -> [FAIL][61] ([i915#3363])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cml-s/igt@runner@aborted.html
    - fi-skl-guc:         NOTRUN -> [FAIL][62] ([i915#1436] / [i915#2426] / [i915#3363])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-skl-guc/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@gem_exec_fence@basic-await@vecs0:
    - fi-bsw-kefka:       [FAIL][63] ([i915#3457]) -> [PASS][64] +1 similar issue
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-bsw-kefka/igt@gem_exec_fence@basic-await@vecs0.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-bsw-kefka/igt@gem_exec_fence@basic-await@vecs0.html

  * igt@gem_wait@wait@all:
    - fi-bwr-2160:        [FAIL][65] ([i915#3457]) -> [PASS][66] +1 similar issue
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-bwr-2160/igt@gem_wait@wait@all.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-bwr-2160/igt@gem_wait@wait@all.html

  * igt@i915_selftest@live@gt_heartbeat:
    - {fi-tgl-dsi}:       [DMESG-FAIL][67] ([i915#541]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_busy@basic@modeset:
    - fi-ilk-650:         [INCOMPLETE][69] ([i915#3457]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-ilk-650/igt@kms_busy@basic@modeset.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-ilk-650/igt@kms_busy@basic@modeset.html

  * igt@kms_cursor_legacy@basic-flip-before-cursor-atomic:
    - fi-elk-e7500:       [SKIP][71] ([fdo#109271]) -> [PASS][72] +2 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-elk-e7500/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-elk-e7500/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
    - fi-elk-e7500:       [FAIL][73] ([i915#53]) -> [PASS][74] +3 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-elk-e7500/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-elk-e7500/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-bwr-2160:        [FAIL][75] ([i915#53]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-bwr-2160/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-bwr-2160/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  
#### Warnings ####

  * igt@i915_module_load@reload:
    - fi-glk-dsi:         [DMESG-WARN][77] ([i915#3457]) -> [DMESG-FAIL][78] ([i915#3457])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-glk-dsi/igt@i915_module_load@reload.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-glk-dsi/igt@i915_module_load@reload.html

  * igt@i915_selftest@live@execlists:
    - fi-tgl-u2:          [DMESG-FAIL][79] ([i915#3462]) -> [INCOMPLETE][80] ([i915#3462])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-tgl-u2/igt@i915_selftest@live@execlists.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-tgl-u2/igt@i915_selftest@live@execlists.html

  * igt@kms_chamelium@dp-edid-read:
    - fi-elk-e7500:       [SKIP][81] ([fdo#109271]) -> [SKIP][82] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-elk-e7500/igt@kms_chamelium@dp-edid-read.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-elk-e7500/igt@kms_chamelium@dp-edid-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-elk-e7500:       [SKIP][83] ([fdo#109271]) -> [FAIL][84] ([i915#3457])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-elk-e7500/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-elk-e7500/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@runner@aborted:
    - fi-bdw-5557u:       [FAIL][85] ([i915#2426]) -> [FAIL][86] ([i915#1602] / [i915#2029])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-bdw-5557u/igt@runner@aborted.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-bdw-5557u/igt@runner@aborted.html
    - fi-cml-u2:          [FAIL][87] ([i915#3363]) -> [FAIL][88] ([i915#2082] / [i915#2426] / [i915#3363])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-cml-u2/igt@runner@aborted.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cml-u2/igt@runner@aborted.html
    - fi-cfl-guc:         [FAIL][89] ([i915#2426] / [i915#3363]) -> [FAIL][90] ([i915#3363])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-cfl-guc/igt@runner@aborted.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-cfl-guc/igt@runner@aborted.html
    - fi-kbl-7567u:       [FAIL][91] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][92] ([i915#1436] / [i915#3363])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/fi-kbl-7567u/igt@runner@aborted.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/fi-kbl-7567u/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1021]: https://gitlab.freedesktop.org/drm/intel/issues/1021
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1208]: https://gitlab.freedesktop.org/drm/intel/issues/1208
  [i915#1222]: https://gitlab.freedesktop.org/drm/intel/issues/1222
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
  [i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
  [i915#2082]: https://gitlab.freedesktop.org/drm/intel/issues/2082
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2416]: https://gitlab.freedesktop.org/drm/intel/issues/2416
  [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
  [i915#2505]: https://gitlab.freedesktop.org/drm/intel/issues/2505
  [i915#2932]: https://gitlab.freedesktop.org/drm/intel/issues/2932
  [i915#2966]: https://gitlab.freedesktop.org/drm/intel/issues/2966
  [i915#3159]: https://gitlab.freedesktop.org/drm/intel/issues/3159
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#3457]: https://gitlab.freedesktop.org/drm/intel/issues/3457
  [i915#3462]: https://gitlab.freedesktop.org/drm/intel/issues/3462
  [i915#53]: https://gitlab.freedesktop.org/drm/intel/issues/53
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541


Participating hosts (33 -> 37)
------------------------------

  Additional (7): fi-ehl-1 fi-cml-s fi-bsw-n3050 fi-skl-guc fi-kbl-x1275 fi-ehl-2 fi-kbl-r 
  Missing    (3): fi-bdw-samus fi-bsw-cyan bat-jsl-1 


Build changes
-------------

  * Linux: CI_DRM_10082 -> Patchwork_20126

  CI-20190529: 20190529
  CI_DRM_10082: 4da3fba648f557d84a60ce2791dd8e4db5e6225f @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6083: d28aee5c5f528aa6c352c3339f20aaed4d698ffa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_20126: d0b63ac74ac848ab9605a2b2d05f4d7352d55bda @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

d0b63ac74ac8 drm/i915: Enable atomic by default on ctg/elk
b8ab1f19ab1a drm/i915: Write watermarks for disabled pipes on gmch platforms
4773cf71e9ae drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms
6a490b6c2a32 drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes
a41b1d627a0e drm/i915: Add missing invalidate to g4x wm readout
a3367b5e4d61 drm/i915: Simplify up vlv watermark sanitation
a4cb799250ce drm/i915: Simplify up g4x watermark sanitation
fb98ff27a11b drm/i915: Split vlv_compute_pipe_wm() into two
c23ef3138eb5 drm/i915: Split g4x_compute_pipe_wm() into two
bfb4d6ec6ee0 drm/i915: Fix HPLL watermark readout for g4x
727d898dd369 drm/i915: Apply WaUse32BppForSRWM to elk as well as ctg
1461ffb26257 drm/i915: Use u8 consistently for active_planes bitmask
f63e2d07e941 drm/i915: Fix g4x cxsr enable condition
be1c6c460152 drm/i915: s/crtc_state/new_crtc_state/ etc.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/index.html

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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups

[Patchwork]

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== Series Details ==

Series: drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups
URL   : https://patchwork.freedesktop.org/series/90164/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10082_full -> Patchwork_20126_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_20126_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_20126_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_20126_full:

### IGT changes ###

#### Possible regressions ####

  * igt@api_intel_bb@render@render-y-reloc-1024:
    - shard-glk:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk3/igt@api_intel_bb@render@render-y-reloc-1024.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk7/igt@api_intel_bb@render@render-y-reloc-1024.html

  * igt@kms_plane_cursor@pipe-b-overlay-size-128:
    - shard-snb:          NOTRUN -> [FAIL][3] +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-snb2/igt@kms_plane_cursor@pipe-b-overlay-size-128.html

  
#### Warnings ####

  * igt@gem_exec_schedule@submit-early-slice@vcs0:
    - shard-glk:          [FAIL][4] ([i915#3457]) -> [FAIL][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk9/igt@gem_exec_schedule@submit-early-slice@vcs0.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk3/igt@gem_exec_schedule@submit-early-slice@vcs0.html

  * igt@kms_plane_cursor@pipe-d-primary-size-64:
    - shard-tglb:         [FAIL][6] ([i915#3457]) -> [FAIL][7] +1 similar issue
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-tglb1/igt@kms_plane_cursor@pipe-d-primary-size-64.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-tglb6/igt@kms_plane_cursor@pipe-d-primary-size-64.html

  

### Piglit changes ###

#### Possible regressions ####

  * spec@arb_shader_image_load_store@max-size (NEW):
    - pig-glk-j5005:      NOTRUN -> [INCOMPLETE][8] +3 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/pig-glk-j5005/spec@arb_shader_image_load_store@max-size.html

  
New tests
---------

  New tests have been introduced between CI_DRM_10082_full and Patchwork_20126_full:

### New Piglit tests (4) ###

  * spec@arb_shader_image_load_store@max-size:
    - Statuses : 1 incomplete(s)
    - Exec time: [0.0] s

  * spec@arb_texture_barrier@arb_texture_barrier-blending-in-shader 512 42 8 8 1:
    - Statuses : 1 incomplete(s)
    - Exec time: [0.0] s

  * spec@arb_texture_barrier@arb_texture_barrier-blending-in-shader 512 42 8 8 2:
    - Statuses : 1 incomplete(s)
    - Exec time: [0.0] s

  * spec@arb_texture_barrier@arb_texture_barrier-blending-in-shader 512 42 8 8 3:
    - Statuses : 1 incomplete(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in Patchwork_20126_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@blit-noreloc-purge-cache:
    - shard-apl:          NOTRUN -> [DMESG-FAIL][9] ([i915#3457])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl7/igt@api_intel_bb@blit-noreloc-purge-cache.html

  * igt@api_intel_bb@offset-control:
    - shard-snb:          NOTRUN -> [DMESG-WARN][10] ([i915#3457]) +4 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-snb6/igt@api_intel_bb@offset-control.html
    - shard-skl:          NOTRUN -> [DMESG-WARN][11] ([i915#3457])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl1/igt@api_intel_bb@offset-control.html

  * igt@gem_ctx_persistence@engines-persistence@rcs0:
    - shard-apl:          [PASS][12] -> [FAIL][13] ([i915#3457]) +3 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-apl6/igt@gem_ctx_persistence@engines-persistence@rcs0.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl1/igt@gem_ctx_persistence@engines-persistence@rcs0.html

  * igt@gem_ctx_persistence@legacy-engines-mixed-process:
    - shard-snb:          NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#1099]) +4 similar issues
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-snb7/igt@gem_ctx_persistence@legacy-engines-mixed-process.html

  * igt@gem_eio@unwedge-stress:
    - shard-skl:          [PASS][15] -> [TIMEOUT][16] ([i915#2369] / [i915#3063] / [i915#3457])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-skl4/igt@gem_eio@unwedge-stress.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl7/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-apl:          NOTRUN -> [FAIL][17] ([i915#2846] / [i915#3457])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl1/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         [PASS][18] -> [FAIL][19] ([i915#2842] / [i915#3457])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-iclb3/igt@gem_exec_fair@basic-none-share@rcs0.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-iclb2/igt@gem_exec_fair@basic-none-share@rcs0.html
    - shard-glk:          [PASS][20] -> [SKIP][21] ([fdo#109271] / [i915#3457])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk4/igt@gem_exec_fair@basic-none-share@rcs0.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk8/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
    - shard-apl:          NOTRUN -> [FAIL][22] ([i915#3457]) +2 similar issues
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl7/igt@gem_exec_fair@basic-none@vcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-tglb:         [PASS][23] -> [FAIL][24] ([i915#2842] / [i915#3457])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-tglb1/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-tglb5/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_gttfill@all:
    - shard-apl:          NOTRUN -> [INCOMPLETE][25] ([i915#3457])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl7/igt@gem_exec_gttfill@all.html

  * igt@gem_exec_nop@basic-series:
    - shard-glk:          [PASS][26] -> [DMESG-WARN][27] ([i915#118] / [i915#95])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk3/igt@gem_exec_nop@basic-series.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk6/igt@gem_exec_nop@basic-series.html

  * igt@gem_exec_reloc@basic-parallel:
    - shard-tglb:         [PASS][28] -> [TIMEOUT][29] ([i915#3183] / [i915#3457])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-tglb3/igt@gem_exec_reloc@basic-parallel.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-tglb5/igt@gem_exec_reloc@basic-parallel.html

  * igt@gem_exec_reloc@basic-wide-active@bcs0:
    - shard-skl:          NOTRUN -> [FAIL][30] ([i915#2389] / [i915#3457]) +3 similar issues
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl1/igt@gem_exec_reloc@basic-wide-active@bcs0.html

  * igt@gem_fenced_exec_thrash@2-spare-fences:
    - shard-snb:          [PASS][31] -> [INCOMPLETE][32] ([i915#2055])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-snb5/igt@gem_fenced_exec_thrash@2-spare-fences.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-snb6/igt@gem_fenced_exec_thrash@2-spare-fences.html

  * igt@gem_mmap_gtt@cpuset-basic-small-copy-odd:
    - shard-apl:          NOTRUN -> [INCOMPLETE][33] ([i915#3468]) +1 similar issue
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl6/igt@gem_mmap_gtt@cpuset-basic-small-copy-odd.html

  * igt@gem_mmap_gtt@cpuset-big-copy-xy:
    - shard-iclb:         [PASS][34] -> [FAIL][35] ([i915#2428])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-iclb8/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-iclb4/igt@gem_mmap_gtt@cpuset-big-copy-xy.html

  * igt@gem_mmap_gtt@cpuset-medium-copy-xy:
    - shard-glk:          [PASS][36] -> [INCOMPLETE][37] ([i915#3468])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk5/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk4/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html

  * igt@gem_mmap_offset@clear:
    - shard-glk:          [PASS][38] -> [FAIL][39] ([i915#1888] / [i915#3160])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk3/igt@gem_mmap_offset@clear.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk6/igt@gem_mmap_offset@clear.html

  * igt@gem_userptr_blits@set-cache-level:
    - shard-snb:          NOTRUN -> [FAIL][40] ([i915#3324])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-snb6/igt@gem_userptr_blits@set-cache-level.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-skl:          [PASS][41] -> [INCOMPLETE][42] ([i915#146] / [i915#198] / [i915#3457])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-skl4/igt@gem_workarounds@suspend-resume-context.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl8/igt@gem_workarounds@suspend-resume-context.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-kbl:          [PASS][43] -> [DMESG-WARN][44] ([i915#180] / [i915#3457]) +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-kbl4/igt@gem_workarounds@suspend-resume-fd.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-kbl4/igt@gem_workarounds@suspend-resume-fd.html

  * igt@gen7_exec_parse@oacontrol-tracking:
    - shard-tglb:         NOTRUN -> [SKIP][45] ([fdo#109289])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-tglb1/igt@gen7_exec_parse@oacontrol-tracking.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [PASS][46] -> [FAIL][47] ([i915#454])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-iclb3/igt@i915_pm_dc@dc6-psr.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-iclb2/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rpm@cursor-dpms:
    - shard-glk:          [PASS][48] -> [DMESG-WARN][49] ([i915#3457])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk8/igt@i915_pm_rpm@cursor-dpms.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk6/igt@i915_pm_rpm@cursor-dpms.html

  * igt@i915_pm_rpm@gem-mmap-type@uc:
    - shard-kbl:          [PASS][50] -> [DMESG-WARN][51] ([i915#3475])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-kbl4/igt@i915_pm_rpm@gem-mmap-type@uc.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-kbl4/igt@i915_pm_rpm@gem-mmap-type@uc.html
    - shard-iclb:         [PASS][52] -> [DMESG-WARN][53] ([i915#3475])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-iclb5/igt@i915_pm_rpm@gem-mmap-type@uc.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-iclb2/igt@i915_pm_rpm@gem-mmap-type@uc.html

  * igt@i915_pm_rpm@gem-mmap-type@wc:
    - shard-kbl:          [PASS][54] -> [DMESG-WARN][55] ([i915#3457])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-kbl4/igt@i915_pm_rpm@gem-mmap-type@wc.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-kbl4/igt@i915_pm_rpm@gem-mmap-type@wc.html
    - shard-skl:          [PASS][56] -> [DMESG-WARN][57] ([i915#3457])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-skl9/igt@i915_pm_rpm@gem-mmap-type@wc.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl1/igt@i915_pm_rpm@gem-mmap-type@wc.html

  * igt@i915_pm_rps@min-max-config-idle:
    - shard-apl:          NOTRUN -> [DMESG-WARN][58] ([i915#3457]) +2 similar issues
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl7/igt@i915_pm_rps@min-max-config-idle.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [SKIP][59] ([fdo#111614])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-tglb1/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html

  * igt@kms_big_joiner@basic:
    - shard-apl:          NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#2705])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl7/igt@kms_big_joiner@basic.html

  * igt@kms_color@pipe-a-ctm-0-75:
    - shard-skl:          [PASS][61] -> [DMESG-WARN][62] ([i915#1982])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-skl4/igt@kms_color@pipe-a-ctm-0-75.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl9/igt@kms_color@pipe-a-ctm-0-75.html

  * igt@kms_color_chamelium@pipe-a-ctm-limited-range:
    - shard-apl:          NOTRUN -> [SKIP][63] ([fdo#109271] / [fdo#111827]) +16 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl7/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html

  * igt@kms_color_chamelium@pipe-d-ctm-green-to-red:
    - shard-skl:          NOTRUN -> [SKIP][64] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl1/igt@kms_color_chamelium@pipe-d-ctm-green-to-red.html

  * igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes:
    - shard-snb:          NOTRUN -> [SKIP][65] ([fdo#109271] / [fdo#111827]) +27 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-snb7/igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes.html

  * igt@kms_content_protection@atomic:
    - shard-apl:          NOTRUN -> [TIMEOUT][66] ([i915#1319])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl7/igt@kms_content_protection@atomic.html

  * igt@kms_cursor_crc@pipe-a-cursor-128x42-onscreen:
    - shard-skl:          NOTRUN -> [FAIL][67] ([i915#3444] / [i915#3457]) +4 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl1/igt@kms_cursor_crc@pipe-a-cursor-128x42-onscreen.html

  * igt@kms_cursor_crc@pipe-a-cursor-512x170-random:
    - shard-skl:          NOTRUN -> [SKIP][68] ([fdo#109271] / [i915#3457]) +3 similar issues
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl1/igt@kms_cursor_crc@pipe-a-cursor-512x170-random.html

  * igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen:
    - shard-snb:          NOTRUN -> [FAIL][69] ([i915#3457]) +7 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-snb6/igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen.html

  * igt@kms_cursor_crc@pipe-b-cursor-64x64-sliding:
    - shard-apl:          NOTRUN -> [FAIL][70] ([i915#3444] / [i915#3457]) +4 similar issues
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl7/igt@kms_cursor_crc@pipe-b-cursor-64x64-sliding.html

  * igt@kms_cursor_crc@pipe-b-cursor-dpms:
    - shard-apl:          [PASS][71] -> [FAIL][72] ([i915#3444] / [i915#3457]) +1 similar issue
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-apl2/igt@kms_cursor_crc@pipe-b-cursor-dpms.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl6/igt@kms_cursor_crc@pipe-b-cursor-dpms.html

  * igt@kms_cursor_crc@pipe-b-cursor-size-change:
    - shard-kbl:          [PASS][73] -> [FAIL][74] ([i915#3444] / [i915#3457])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-size-change.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-size-change.html

  * igt@kms_cursor_crc@pipe-c-cursor-64x21-offscreen:
    - shard-skl:          [PASS][75] -> [FAIL][76] ([i915#3444] / [i915#3457]) +3 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-skl9/igt@kms_cursor_crc@pipe-c-cursor-64x21-offscreen.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl1/igt@kms_cursor_crc@pipe-c-cursor-64x21-offscreen.html

  * igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque:
    - shard-glk:          [PASS][77] -> [FAIL][78] ([i915#3444] / [i915#3457]) +1 similar issue
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk3/igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk9/igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque.html
    - shard-tglb:         [PASS][79] -> [FAIL][80] ([i915#2124] / [i915#3457])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-tglb1/igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-tglb5/igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque.html

  * igt@kms_cursor_crc@pipe-d-cursor-128x128-onscreen:
    - shard-apl:          NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#3457]) +13 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl7/igt@kms_cursor_crc@pipe-d-cursor-128x128-onscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-256x256-sliding:
    - shard-snb:          NOTRUN -> [SKIP][82] ([fdo#109271] / [i915#3457]) +46 similar issues
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-snb6/igt@kms_cursor_crc@pipe-d-cursor-256x256-sliding.html

  * igt@kms_cursor_edge_walk@pipe-c-128x128-left-edge:
    - shard-glk:          [PASS][83] -> [FAIL][84] ([i915#70])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk4/igt@kms_cursor_edge_walk@pipe-c-128x128-left-edge.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk3/igt@kms_cursor_edge_walk@pipe-c-128x128-left-edge.html

  * igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge:
    - shard-snb:          NOTRUN -> [SKIP][85] ([fdo#109271]) +360 similar issues
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-snb6/igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge.html
    - shard-skl:          NOTRUN -> [SKIP][86] ([fdo#109271]) +35 similar issues
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl1/igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [PASS][87] -> [FAIL][88] ([i915#2346])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@pipe-d-torture-bo:
    - shard-apl:          NOTRUN -> [SKIP][89] ([fdo#109271] / [i915#533]) +1 similar issue
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl7/igt@kms_cursor_legacy@pipe-d-torture-bo.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-skl:          [PASS][90] -> [FAIL][91] ([i915#79])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-skl7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl1/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2:
    - shard-glk:          [PASS][92] -> [FAIL][93] ([i915#79])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk9/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk9/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2.html

  * igt@kms_flip@flip-vs-suspend@c-dp1:
    - shard-apl:          [PASS][94] -> [DMESG-WARN][95] ([i915#180]) +1 similar issue
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-apl1/igt@kms_flip@flip-vs-suspend@c-dp1.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl1/igt@kms_flip@flip-vs-suspend@c-dp1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
    - shard-skl:          [PASS][96] -> [FAIL][97] ([i915#2122])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-skl9/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile:
    - shard-tglb:         NOTRUN -> [SKIP][98] ([i915#2587])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-tglb1/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
    - shard-glk:          [PASS][99] -> [FAIL][100] ([i915#53]) +1 similar issue
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk8/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk4/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [PASS][101] -> [DMESG-WARN][102] ([i915#180]) +3 similar issues
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-kbl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
    - shard-skl:          NOTRUN -> [FAIL][103] ([fdo#108145] / [i915#265]) +1 similar issue
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
    - shard-apl:          NOTRUN -> [FAIL][104] ([fdo#108145] / [i915#265]) +2 similar issues
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid:
    - shard-glk:          [PASS][105] -> [FAIL][106] ([fdo#108145] / [i915#265]) +1 similar issue
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk6/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
    - shard-skl:          [PASS][107] -> [FAIL][108] ([fdo#108145] / [i915#265])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html

  * igt@kms_plane_cursor@pipe-a-viewport-size-128:
    - shard-skl:          NOTRUN -> [FAIL][109] ([i915#2657] / [i915#3457])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl1/igt@kms_plane_cursor@pipe-a-viewport-size-128.html

  * igt@kms_plane_cursor@pipe-a-viewport-size-256:
    - shard-snb:          NOTRUN -> [FAIL][110] ([i915#3461]) +1 similar issue
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-snb7/igt@kms_plane_cursor@pipe-a-viewport-size-256.html

  * igt@kms_plane_cursor@pipe-c-primary-size-128:
    - shard-iclb:         [PASS][111] -> [FAIL][112] ([i915#2657] / [i915#3461])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-iclb2/igt@kms_plane_cursor@pipe-c-primary-size-128.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-iclb3/igt@kms_plane_cursor@pipe-c-primary-size-128.html

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
    - shard-glk:          [PASS][113] -> [FAIL][114] ([i915#1779])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk8/igt@kms_plane_multiple@atomic-pipe-c-tiling-yf.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk4/igt@kms_plane_multiple@atomic-pipe-c-tiling-yf.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
    - shard-skl:          NOTRUN -> [SKIP][115] ([fdo#109271] / [i915#658]) +1 similar issue
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl1/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
    - shard-apl:          NOTRUN -> [SKIP][116] ([fdo#109271] / [i915#658]) +3 similar issues
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl7/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html

  * igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend:
    - shard-tglb:         [PASS][117] -> [INCOMPLETE][118] ([i915#456])
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-tglb5/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-tglb5/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html

  * igt@kms_vblank@pipe-d-ts-continuation-idle:
    - shard-apl:          NOTRUN -> [SKIP][119] ([fdo#109271]) +109 similar issues
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl7/igt@kms_vblank@pipe-d-ts-continuation-idle.html

  * igt@kms_writeback@writeback-check-output:
    - shard-apl:          NOTRUN -> [SKIP][120] ([fdo#109271] / [i915#2437]) +1 similar issue
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl6/igt@kms_writeback@writeback-check-output.html

  * igt@perf_pmu@busy-check-all@vcs0:
    - shard-glk:          [PASS][121] -> [FAIL][122] ([i915#3457]) +23 similar issues
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk6/igt@perf_pmu@busy-check-all@vcs0.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk7/igt@perf_pmu@busy-check-all@vcs0.html

  * igt@prime_mmap_coherency@read:
    - shard-snb:          NOTRUN -> [INCOMPLETE][123] ([i915#3468])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-snb7/igt@prime_mmap_coherency@read.html

  * igt@prime_vgem@sync@rcs0:
    - shard-iclb:         [PASS][124] -> [INCOMPLETE][125] ([i915#409])
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-iclb6/igt@prime_vgem@sync@rcs0.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-iclb3/igt@prime_vgem@sync@rcs0.html

  * igt@sysfs_clients@pidname:
    - shard-skl:          NOTRUN -> [SKIP][126] ([fdo#109271] / [i915#2994])
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-skl1/igt@sysfs_clients@pidname.html

  * igt@sysfs_clients@sema-10:
    - shard-apl:          NOTRUN -> [SKIP][127] ([fdo#109271] / [i915#2994])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl1/igt@sysfs_clients@sema-10.html

  * igt@sysfs_timeslice_duration@timeout@bcs0:
    - shard-apl:          [PASS][128] -> [FAIL][129] ([i915#1755] / [i915#3457])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-apl6/igt@sysfs_timeslice_duration@timeout@bcs0.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl1/igt@sysfs_timeslice_duration@timeout@bcs0.html

  * igt@sysfs_timeslice_duration@timeout@vecs0:
    - shard-glk:          [PASS][130] -> [FAIL][131] ([i915#1755] / [i915#3457])
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk5/igt@sysfs_timeslice_duration@timeout@vecs0.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk7/igt@sysfs_timeslice_duration@timeout@vecs0.html

  
#### Possible fixes ####

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-kbl:          [FAIL][132] ([i915#2842] / [i915#3457]) -> [PASS][133]
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs1.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_fence@syncobj-repeat:
    - shard-apl:          [FAIL][134] ([i915#3457]) -> [PASS][135] +5 similar issues
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-apl2/igt@gem_exec_fence@syncobj-repeat.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-apl6/igt@gem_exec_fence@syncobj-repeat.html

  * igt@gem_exec_schedule@preempt-hang@vcs0:
    - shard-glk:          [FAIL][136] ([i915#3457]) -> [PASS][137] +34 similar issues
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk8/igt@gem_exec_schedule@preempt-hang@vcs0.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk6/igt@gem_exec_schedule@preempt-hang@vcs0.html

  * igt@gem_exec_whisper@basic-normal-all:
    - shard-glk:          [DMESG-WARN][138] ([i915#118] / [i915#95]) -> [PASS][139] +1 similar issue
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard-glk3/igt@gem_exec_whisper@basic-normal-all.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/shard-glk9/igt@gem_exec_whisper@basic-normal-all.html

  * igt@gem_mmap_gtt@cpuset-basic-small-copy-odd:
    - shard-snb:          [INCOMPLETE][140] ([i915#3468]) -> [PASS][141] +1 similar issue
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10082/shard

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20126/index.html

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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev2)
URL   : https://patchwork.freedesktop.org/series/90164/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_display.c:1887:21:    expected struct i915_vma *[assigned] vma
+drivers/gpu/drm/i915/display/intel_display.c:1887:21:    got void [noderef] __iomem *[assigned] iomem
+drivers/gpu/drm/i915/display/intel_display.c:1887:21: warning: incorrect type in assignment (different address spaces)


_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev2)

[Patchwork]

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== Series Details ==

Series: drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev2)
URL   : https://patchwork.freedesktop.org/series/90164/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10132 -> Patchwork_20190
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_20190:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@mman:
    - {fi-tgl-dsi}:       [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/fi-tgl-dsi/igt@i915_selftest@live@mman.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/fi-tgl-dsi/igt@i915_selftest@live@mman.html

  
Known issues
------------

  Here are the changes found in Patchwork_20190 that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@kms_chamelium@dp-crc-fast:
    - fi-kbl-7500u:       [FAIL][3] ([i915#1372]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_cursor_legacy@basic-flip-before-cursor-atomic:
    - fi-elk-e7500:       [SKIP][5] ([fdo#109271]) -> [PASS][6] +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/fi-elk-e7500/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/fi-elk-e7500/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html

  
#### Warnings ####

  * igt@i915_selftest@live@execlists:
    - fi-bsw-nick:        [INCOMPLETE][7] ([i915#2782] / [i915#2940] / [i915#3462]) -> [DMESG-FAIL][8] ([i915#3462])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/fi-bsw-nick/igt@i915_selftest@live@execlists.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/fi-bsw-nick/igt@i915_selftest@live@execlists.html
    - fi-tgl-u2:          [DMESG-FAIL][9] ([i915#3462]) -> [INCOMPLETE][10] ([i915#3462])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/fi-tgl-u2/igt@i915_selftest@live@execlists.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/fi-tgl-u2/igt@i915_selftest@live@execlists.html

  * igt@kms_chamelium@dp-edid-read:
    - fi-elk-e7500:       [SKIP][11] ([fdo#109271]) -> [SKIP][12] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/fi-elk-e7500/igt@kms_chamelium@dp-edid-read.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/fi-elk-e7500/igt@kms_chamelium@dp-edid-read.html

  * igt@runner@aborted:
    - fi-cfl-8700k:       [FAIL][13] ([i915#3363]) -> [FAIL][14] ([i915#2426] / [i915#3363])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/fi-cfl-8700k/igt@runner@aborted.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/fi-cfl-8700k/igt@runner@aborted.html
    - fi-skl-6600u:       [FAIL][15] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][16] ([i915#1436] / [i915#3363])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/fi-skl-6600u/igt@runner@aborted.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/fi-skl-6600u/igt@runner@aborted.html
    - fi-kbl-soraka:      [FAIL][17] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][18] ([i915#1436] / [i915#3363])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/fi-kbl-soraka/igt@runner@aborted.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/fi-kbl-soraka/igt@runner@aborted.html
    - fi-cfl-guc:         [FAIL][19] ([i915#2426] / [i915#3363]) -> [FAIL][20] ([i915#3363])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/fi-cfl-guc/igt@runner@aborted.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/fi-cfl-guc/igt@runner@aborted.html
    - fi-kbl-7567u:       [FAIL][21] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][22] ([i915#1436] / [i915#3363])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/fi-kbl-7567u/igt@runner@aborted.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/fi-kbl-7567u/igt@runner@aborted.html
    - fi-skl-guc:         [FAIL][23] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][24] ([i915#1436] / [i915#3363])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/fi-skl-guc/igt@runner@aborted.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/fi-skl-guc/igt@runner@aborted.html
    - fi-skl-6700k2:      [FAIL][25] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][26] ([i915#1436] / [i915#3363])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/fi-skl-6700k2/igt@runner@aborted.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/fi-skl-6700k2/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
  [i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782
  [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
  [i915#3277]: https://gitlab.freedesktop.org/drm/intel/issues/3277
  [i915#3283]: https://gitlab.freedesktop.org/drm/intel/issues/3283
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#3462]: https://gitlab.freedesktop.org/drm/intel/issues/3462
  [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541


Participating hosts (46 -> 41)
------------------------------

  Missing    (5): fi-ilk-m540 fi-bdw-5557u fi-hsw-4200u fi-ctg-p8600 fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_10132 -> Patchwork_20190

  CI-20190529: 20190529
  CI_DRM_10132: 9a0e65e148626db231bdc227d035a71c409aba02 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6092: d87087c321da07035d4f96d98c34e451b3ccb809 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_20190: 61e74ae7743863b8950f3a0737fb435afa57ddc4 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

61e74ae77438 drm/i915: Enable atomic by default on ctg/elk
6ecc910e6e6c drm/i915: Write watermarks for disabled pipes on gmch platforms
041b4744b466 drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms
d69d4918649f drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes
71ea2a0be37d drm/i915: Add missing invalidate to g4x wm readout
3022bf72bb52 drm/i915: Simplify up vlv watermark sanitation
5b9af9fd3678 drm/i915: Simplify up g4x watermark sanitation
b561f5eab831 drm/i915: Split vlv_compute_pipe_wm() into two
12e9f07ba1f6 drm/i915: Split g4x_compute_pipe_wm() into two
8d0dbc0d8904 drm/i915: Fix HPLL watermark readout for g4x
6e2e4ee46e94 drm/i915: Apply WaUse32BppForSRWM to elk as well as ctg
15730b4145d6 drm/i915: Use u8 consistently for active_planes bitmask
f403c1a949b6 drm/i915: Fix g4x cxsr enable condition
5a38a80d6778 drm/i915: s/crtc_state/new_crtc_state/ etc.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/index.html

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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev2)

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 30274 bytes --]

== Series Details ==

Series: drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev2)
URL   : https://patchwork.freedesktop.org/series/90164/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10132_full -> Patchwork_20190_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_20190_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@feature_discovery@psr2:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([i915#658])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-iclb2/igt@feature_discovery@psr2.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb1/igt@feature_discovery@psr2.html

  * igt@gem_create@create-massive:
    - shard-skl:          NOTRUN -> [DMESG-WARN][3] ([i915#3002])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl1/igt@gem_create@create-massive.html

  * igt@gem_ctx_persistence@engines-mixed-process:
    - shard-snb:          NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#1099]) +5 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-snb5/igt@gem_ctx_persistence@engines-mixed-process.html

  * igt@gem_ctx_persistence@many-contexts:
    - shard-tglb:         [PASS][5] -> [FAIL][6] ([i915#2410])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-tglb5/igt@gem_ctx_persistence@many-contexts.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-tglb1/igt@gem_ctx_persistence@many-contexts.html

  * igt@gem_ctx_ringsize@plugged@vcs0:
    - shard-glk:          [PASS][7] -> [DMESG-WARN][8] ([i915#118] / [i915#95])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-glk4/igt@gem_ctx_ringsize@plugged@vcs0.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk6/igt@gem_ctx_ringsize@plugged@vcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-glk:          NOTRUN -> [FAIL][9] ([i915#2842]) +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk2/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs0:
    - shard-iclb:         NOTRUN -> [FAIL][10] ([i915#2842]) +3 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb3/igt@gem_exec_fair@basic-pace@vcs0.html
    - shard-kbl:          [PASS][11] -> [FAIL][12] ([i915#2842])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-kbl3/igt@gem_exec_fair@basic-pace@vcs0.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs0.html

  * igt@gem_exec_params@no-bsd:
    - shard-iclb:         NOTRUN -> [SKIP][13] ([fdo#109283])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@gem_exec_params@no-bsd.html

  * igt@gem_huc_copy@huc-copy:
    - shard-skl:          NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#2190])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl1/igt@gem_huc_copy@huc-copy.html

  * igt@gem_mmap_gtt@cpuset-basic-small-copy:
    - shard-apl:          NOTRUN -> [INCOMPLETE][15] ([i915#3468]) +1 similar issue
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-apl2/igt@gem_mmap_gtt@cpuset-basic-small-copy.html
    - shard-tglb:         [PASS][16] -> [INCOMPLETE][17] ([i915#3468])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-tglb2/igt@gem_mmap_gtt@cpuset-basic-small-copy.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-tglb5/igt@gem_mmap_gtt@cpuset-basic-small-copy.html
    - shard-kbl:          [PASS][18] -> [INCOMPLETE][19] ([i915#3468])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-kbl3/igt@gem_mmap_gtt@cpuset-basic-small-copy.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl7/igt@gem_mmap_gtt@cpuset-basic-small-copy.html

  * igt@gem_mmap_gtt@cpuset-basic-small-copy-odd:
    - shard-glk:          NOTRUN -> [INCOMPLETE][20] ([i915#2055] / [i915#3468])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk2/igt@gem_mmap_gtt@cpuset-basic-small-copy-odd.html

  * igt@gem_mmap_gtt@cpuset-basic-small-copy-xy:
    - shard-iclb:         NOTRUN -> [FAIL][21] ([i915#2428])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb3/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html

  * igt@gem_mmap_gtt@cpuset-medium-copy-odd:
    - shard-glk:          [PASS][22] -> [FAIL][23] ([i915#307])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-glk2/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk3/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html

  * igt@gem_mmap_gtt@cpuset-medium-copy-xy:
    - shard-iclb:         [PASS][24] -> [INCOMPLETE][25] ([i915#3468])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-iclb2/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb2/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html

  * igt@gem_mmap_gtt@fault-concurrent:
    - shard-kbl:          NOTRUN -> [INCOMPLETE][26] ([i915#3468])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl4/igt@gem_mmap_gtt@fault-concurrent.html

  * igt@gem_mmap_gtt@fault-concurrent-x:
    - shard-skl:          NOTRUN -> [INCOMPLETE][27] ([i915#198] / [i915#3468])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl3/igt@gem_mmap_gtt@fault-concurrent-x.html
    - shard-glk:          NOTRUN -> [INCOMPLETE][28] ([i915#3468])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk9/igt@gem_mmap_gtt@fault-concurrent-x.html

  * igt@gem_mmap_gtt@medium-copy-xy:
    - shard-apl:          [PASS][29] -> [INCOMPLETE][30] ([i915#2502] / [i915#3468])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-apl1/igt@gem_mmap_gtt@medium-copy-xy.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-apl7/igt@gem_mmap_gtt@medium-copy-xy.html
    - shard-kbl:          [PASS][31] -> [INCOMPLETE][32] ([i915#2502] / [i915#3468])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-kbl4/igt@gem_mmap_gtt@medium-copy-xy.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl2/igt@gem_mmap_gtt@medium-copy-xy.html

  * igt@gem_render_copy@yf-tiled-to-vebox-yf-tiled:
    - shard-iclb:         NOTRUN -> [SKIP][33] ([i915#768])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@gem_render_copy@yf-tiled-to-vebox-yf-tiled.html

  * igt@gem_userptr_blits@input-checking:
    - shard-snb:          NOTRUN -> [DMESG-WARN][34] ([i915#3002])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-snb7/igt@gem_userptr_blits@input-checking.html

  * igt@gen9_exec_parse@batch-invalid-length:
    - shard-snb:          NOTRUN -> [SKIP][35] ([fdo#109271]) +342 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-snb7/igt@gen9_exec_parse@batch-invalid-length.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-iclb:         NOTRUN -> [SKIP][36] ([fdo#112306])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@gen9_exec_parse@unaligned-jump.html

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
    - shard-kbl:          NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#1937])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl2/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html

  * igt@i915_selftest@live@execlists:
    - shard-tglb:         NOTRUN -> [INCOMPLETE][38] ([i915#3462])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-tglb2/igt@i915_selftest@live@execlists.html
    - shard-apl:          NOTRUN -> [DMESG-FAIL][39] ([i915#3462])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-apl1/igt@i915_selftest@live@execlists.html
    - shard-iclb:         NOTRUN -> [DMESG-FAIL][40] ([i915#3462])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb3/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@gt_lrc:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][41] ([i915#2373])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-tglb2/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@gt_pm:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][42] ([i915#1759] / [i915#2291])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-tglb2/igt@i915_selftest@live@gt_pm.html

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-skl:          [PASS][43] -> [FAIL][44] ([i915#2521])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-skl2/igt@kms_async_flips@alternate-sync-async-flip.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl5/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_atomic_transition@plane-all-modeset-transition:
    - shard-iclb:         NOTRUN -> [SKIP][45] ([i915#1769])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@kms_atomic_transition@plane-all-modeset-transition.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-270:
    - shard-iclb:         NOTRUN -> [SKIP][46] ([fdo#110723])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@kms_big_fb@yf-tiled-64bpp-rotate-270.html

  * igt@kms_ccs@pipe-d-crc-primary-basic:
    - shard-iclb:         NOTRUN -> [SKIP][47] ([fdo#109278]) +6 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@kms_ccs@pipe-d-crc-primary-basic.html

  * igt@kms_chamelium@hdmi-cmp-planar-formats:
    - shard-iclb:         NOTRUN -> [SKIP][48] ([fdo#109284] / [fdo#111827]) +3 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@kms_chamelium@hdmi-cmp-planar-formats.html

  * igt@kms_chamelium@vga-hpd-after-suspend:
    - shard-skl:          NOTRUN -> [SKIP][49] ([fdo#109271] / [fdo#111827]) +6 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl9/igt@kms_chamelium@vga-hpd-after-suspend.html

  * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
    - shard-snb:          NOTRUN -> [SKIP][50] ([fdo#109271] / [fdo#111827]) +17 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-snb7/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html

  * igt@kms_color_chamelium@pipe-a-ctm-limited-range:
    - shard-apl:          NOTRUN -> [SKIP][51] ([fdo#109271] / [fdo#111827]) +10 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-apl1/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html

  * igt@kms_color_chamelium@pipe-b-degamma:
    - shard-kbl:          NOTRUN -> [SKIP][52] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl4/igt@kms_color_chamelium@pipe-b-degamma.html

  * igt@kms_color_chamelium@pipe-d-degamma:
    - shard-glk:          NOTRUN -> [SKIP][53] ([fdo#109271] / [fdo#111827]) +5 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk2/igt@kms_color_chamelium@pipe-d-degamma.html

  * igt@kms_content_protection@content_type_change:
    - shard-iclb:         NOTRUN -> [SKIP][54] ([fdo#109300] / [fdo#111066])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@kms_content_protection@content_type_change.html

  * igt@kms_cursor_crc@pipe-b-cursor-512x512-rapid-movement:
    - shard-iclb:         NOTRUN -> [SKIP][55] ([fdo#109278] / [fdo#109279]) +1 similar issue
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@kms_cursor_crc@pipe-b-cursor-512x512-rapid-movement.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-skl:          [PASS][56] -> [FAIL][57] ([i915#2346] / [i915#533])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@pipe-d-single-bo:
    - shard-glk:          NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#533])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk2/igt@kms_cursor_legacy@pipe-d-single-bo.html

  * igt@kms_cursor_legacy@pipe-d-torture-move:
    - shard-skl:          NOTRUN -> [SKIP][59] ([fdo#109271]) +71 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl9/igt@kms_cursor_legacy@pipe-d-torture-move.html

  * igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset:
    - shard-iclb:         NOTRUN -> [SKIP][60] ([fdo#109274])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb3/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
    - shard-glk:          NOTRUN -> [SKIP][61] ([fdo#109271] / [i915#2672])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt:
    - shard-iclb:         NOTRUN -> [SKIP][62] ([fdo#109280]) +7 similar issues
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-render:
    - shard-skl:          NOTRUN -> [FAIL][63] ([i915#49])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl9/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render:
    - shard-glk:          NOTRUN -> [SKIP][64] ([fdo#109271]) +63 similar issues
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-skl:          [PASS][65] -> [FAIL][66] ([i915#1188])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-skl10/igt@kms_hdr@bpc-switch-suspend.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl10/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_hdr@static-toggle:
    - shard-iclb:         NOTRUN -> [SKIP][67] ([i915#1187])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@kms_hdr@static-toggle.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - shard-apl:          NOTRUN -> [SKIP][68] ([fdo#109271] / [i915#533]) +2 similar issues
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-apl3/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [PASS][69] -> [DMESG-WARN][70] ([i915#180]) +2 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
    - shard-apl:          NOTRUN -> [FAIL][71] ([fdo#108145] / [i915#265])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-apl1/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-glk:          NOTRUN -> [FAIL][72] ([fdo#108145] / [i915#265])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk2/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
    - shard-skl:          NOTRUN -> [FAIL][73] ([fdo#108145] / [i915#265]) +1 similar issue
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][74] -> [FAIL][75] ([fdo#108145] / [i915#265]) +1 similar issue
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping:
    - shard-apl:          NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#2733])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-apl1/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2:
    - shard-apl:          NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#658]) +2 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-apl1/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2.html
    - shard-iclb:         NOTRUN -> [SKIP][78] ([i915#658])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1:
    - shard-glk:          NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#658]) +1 similar issue
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][80] -> [SKIP][81] ([fdo#109642] / [fdo#111068] / [i915#658])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb5/igt@kms_psr2_su@frontbuffer.html
    - shard-kbl:          NOTRUN -> [SKIP][82] ([fdo#109271] / [i915#658])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl2/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_cursor_mmap_cpu:
    - shard-iclb:         NOTRUN -> [SKIP][83] ([fdo#109441])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@kms_psr@psr2_cursor_mmap_cpu.html

  * igt@kms_psr@psr2_no_drrs:
    - shard-iclb:         [PASS][84] -> [SKIP][85] ([fdo#109441]) +2 similar issues
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb1/igt@kms_psr@psr2_no_drrs.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-kbl:          NOTRUN -> [DMESG-WARN][86] ([i915#180] / [i915#295])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  * igt@kms_vblank@pipe-d-query-forked-busy:
    - shard-kbl:          NOTRUN -> [SKIP][87] ([fdo#109271]) +24 similar issues
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl7/igt@kms_vblank@pipe-d-query-forked-busy.html

  * igt@kms_vblank@pipe-d-wait-idle:
    - shard-kbl:          NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#533])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl4/igt@kms_vblank@pipe-d-wait-idle.html

  * igt@kms_writeback@writeback-check-output:
    - shard-apl:          NOTRUN -> [SKIP][89] ([fdo#109271] / [i915#2437])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-apl1/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-invalid-parameters:
    - shard-glk:          NOTRUN -> [SKIP][90] ([fdo#109271] / [i915#2437])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk2/igt@kms_writeback@writeback-invalid-parameters.html

  * igt@nouveau_crc@pipe-c-source-outp-complete:
    - shard-iclb:         NOTRUN -> [SKIP][91] ([i915#2530])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@nouveau_crc@pipe-c-source-outp-complete.html

  * igt@perf@gen12-oa-tlb-invalidate:
    - shard-iclb:         NOTRUN -> [SKIP][92] ([fdo#109289]) +3 similar issues
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb3/igt@perf@gen12-oa-tlb-invalidate.html

  * igt@perf_pmu@module-unload:
    - shard-skl:          [PASS][93] -> [DMESG-WARN][94] ([i915#1982] / [i915#262])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-skl3/igt@perf_pmu@module-unload.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl1/igt@perf_pmu@module-unload.html

  * igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name:
    - shard-apl:          NOTRUN -> [SKIP][95] ([fdo#109271]) +107 similar issues
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-apl3/igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name.html

  * igt@prime_nv_test@i915_nv_sharing:
    - shard-iclb:         NOTRUN -> [SKIP][96] ([fdo#109291]) +2 similar issues
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb3/igt@prime_nv_test@i915_nv_sharing.html

  * igt@sysfs_clients@fair-1:
    - shard-glk:          NOTRUN -> [SKIP][97] ([fdo#109271] / [i915#2994]) +1 similar issue
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk2/igt@sysfs_clients@fair-1.html

  * igt@sysfs_clients@fair-7:
    - shard-apl:          NOTRUN -> [SKIP][98] ([fdo#109271] / [i915#2994])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-apl1/igt@sysfs_clients@fair-7.html
    - shard-iclb:         NOTRUN -> [SKIP][99] ([i915#2994])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb3/igt@sysfs_clients@fair-7.html

  * igt@sysfs_clients@sema-25:
    - shard-kbl:          NOTRUN -> [SKIP][100] ([fdo#109271] / [i915#2994])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl7/igt@sysfs_clients@sema-25.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
    - shard-kbl:          [DMESG-WARN][101] ([i915#180]) -> [PASS][102] +5 similar issues
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-kbl4/igt@gem_ctx_isolation@preservation-s3@vcs0.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl2/igt@gem_ctx_isolation@preservation-s3@vcs0.html

  * igt@gem_exec_balancer@full:
    - shard-glk:          [DMESG-WARN][103] ([i915#118] / [i915#95]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-glk1/igt@gem_exec_balancer@full.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk8/igt@gem_exec_balancer@full.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         [FAIL][105] ([i915#2842]) -> [PASS][106]
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-iclb3/igt@gem_exec_fair@basic-none-share@rcs0.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb3/igt@gem_exec_fair@basic-none-share@rcs0.html
    - shard-tglb:         [FAIL][107] ([i915#2842]) -> [PASS][108] +1 similar issue
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-tglb8/igt@gem_exec_fair@basic-none-share@rcs0.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-tglb7/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_mmap_gtt@big-copy-xy:
    - shard-glk:          [FAIL][109] ([i915#307]) -> [PASS][110]
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-glk5/igt@gem_mmap_gtt@big-copy-xy.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk8/igt@gem_mmap_gtt@big-copy-xy.html

  * igt@gem_mmap_gtt@cpuset-basic-small-copy:
    - shard-iclb:         [INCOMPLETE][111] ([i915#3468]) -> [PASS][112]
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-iclb1/igt@gem_mmap_gtt@cpuset-basic-small-copy.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb6/igt@gem_mmap_gtt@cpuset-basic-small-copy.html
    - shard-skl:          [INCOMPLETE][113] ([i915#198] / [i915#3468]) -> [PASS][114]
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-skl7/igt@gem_mmap_gtt@cpuset-basic-small-copy.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl9/igt@gem_mmap_gtt@cpuset-basic-small-copy.html

  * igt@gem_mmap_gtt@cpuset-basic-small-copy-xy:
    - shard-tglb:         [INCOMPLETE][115] ([i915#3468]) -> [PASS][116]
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-tglb6/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-tglb2/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html

  * igt@gem_mmap_gtt@cpuset-medium-copy-odd:
    - shard-iclb:         [FAIL][117] ([i915#2428]) -> [PASS][118]
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-iclb3/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb3/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html

  * igt@gem_mmap_gtt@medium-copy-xy:
    - shard-glk:          [INCOMPLETE][119] ([i915#2055] / [i915#2502] / [i915#3468]) -> [PASS][120]
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-glk3/igt@gem_mmap_gtt@medium-copy-xy.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk2/igt@gem_mmap_gtt@medium-copy-xy.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
    - shard-glk:          [FAIL][121] ([i915#72]) -> [PASS][122]
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-glk9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-glk4/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [SKIP][123] ([fdo#109441]) -> [PASS][124]
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-iclb5/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@perf@polling-parameterized:
    - shard-skl:          [FAIL][125] ([i915#1542]) -> [PASS][126]
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-skl3/igt@perf@polling-parameterized.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl1/igt@perf@polling-parameterized.html

  * igt@sysfs_heartbeat_interval@mixed@bcs0:
    - shard-skl:          [FAIL][127] ([i915#1731]) -> [PASS][128]
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-skl4/igt@sysfs_heartbeat_interval@mixed@bcs0.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-skl2/igt@sysfs_heartbeat_interval@mixed@bcs0.html

  
#### Warnings ####

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-kbl:          [SKIP][129] ([fdo#109271]) -> [FAIL][130] ([i915#2842]) +1 similar issue
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-kbl3/igt@gem_exec_fair@basic-pace@rcs0.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-kbl2/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@i915_pm_rc6_residency@rc6-fence:
    - shard-iclb:         [WARN][131] ([i915#1804] / [i915#2684]) -> [WARN][132] ([i915#2684])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-iclb3/igt@i915_pm_rc6_residency@rc6-fence.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb1/igt@i915_pm_rc6_residency@rc6-fence.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [SKIP][133] ([fdo#109349]) -> [CRASH][134] ([i915#3494])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-iclb5/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
    - shard-iclb:         [SKIP][135] ([i915#2920]) -> [SKIP][136] ([i915#658])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-iclb2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-3:
    - shard-iclb:         [SKIP][137] ([i915#658]) -> [SKIP][138] ([i915#2920])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-iclb5/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-3.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-3.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149], [FAIL][150], [FAIL][151], [FAIL][152], [FAIL][153]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#2722] / [i915#3002] / [i915#3363]) -> ([FAIL][154], [FAIL][155], [FAIL][156], [FAIL][157], [FAIL][158], [FAIL][159], [FAIL][160], [FAIL][161], [FAIL][162], [FAIL][163], [FAIL][164], [FAIL][165], [FAIL][166], [FAIL][167], [FAIL][168], [FAIL][169]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#2722] / [i915#3002] / [i915#3363] / [i915#602])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-kbl1/igt@runner@aborted.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10132/shard-kbl4/igt@run

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20190/index.html

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