From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Fri, 14 May 2021 21:34:28 -0400 Subject: [PATCH 23/27] ppc: Remove MPC8323ERDB board In-Reply-To: <20210515013432.12867-1-trini@konsulko.com> References: <20210515013432.12867-1-trini@konsulko.com> Message-ID: <20210515013432.12867-23-trini@konsulko.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de This board has not been converted to CONFIG_DM_PCI by the deadline and is also missing conversion to CONFIG_DM. Remove it. Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc83xx/Kconfig | 5 - board/freescale/mpc8323erdb/Kconfig | 12 - board/freescale/mpc8323erdb/MAINTAINERS | 6 - board/freescale/mpc8323erdb/Makefile | 6 - board/freescale/mpc8323erdb/README | 71 ----- board/freescale/mpc8323erdb/mpc8323erdb.c | 233 ---------------- configs/MPC8323ERDB_defconfig | 115 -------- include/configs/MPC8323ERDB.h | 309 ---------------------- 8 files changed, 757 deletions(-) delete mode 100644 board/freescale/mpc8323erdb/Kconfig delete mode 100644 board/freescale/mpc8323erdb/MAINTAINERS delete mode 100644 board/freescale/mpc8323erdb/Makefile delete mode 100644 board/freescale/mpc8323erdb/README delete mode 100644 board/freescale/mpc8323erdb/mpc8323erdb.c delete mode 100644 configs/MPC8323ERDB_defconfig delete mode 100644 include/configs/MPC8323ERDB.h diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index d1b774f8d55f..8ae6d080c8a9 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -8,10 +8,6 @@ choice prompt "Target select" optional -config TARGET_MPC8323ERDB - bool "Support MPC8323ERDB" - select ARCH_MPC832X - config TARGET_MPC832XEMDS bool "Support MPC832XEMDS" select ARCH_MPC832X @@ -252,7 +248,6 @@ endmenu config FSL_ELBC bool -source "board/freescale/mpc8323erdb/Kconfig" source "board/freescale/mpc832xemds/Kconfig" source "board/freescale/mpc8349emds/Kconfig" source "board/freescale/mpc837xerdb/Kconfig" diff --git a/board/freescale/mpc8323erdb/Kconfig b/board/freescale/mpc8323erdb/Kconfig deleted file mode 100644 index acf812219662..000000000000 --- a/board/freescale/mpc8323erdb/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_MPC8323ERDB - -config SYS_BOARD - default "mpc8323erdb" - -config SYS_VENDOR - default "freescale" - -config SYS_CONFIG_NAME - default "MPC8323ERDB" - -endif diff --git a/board/freescale/mpc8323erdb/MAINTAINERS b/board/freescale/mpc8323erdb/MAINTAINERS deleted file mode 100644 index 496ab2af271f..000000000000 --- a/board/freescale/mpc8323erdb/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -MPC8323ERDB BOARD -#M: Michael Barkowski -S: Orphan (since 2018-05) -F: board/freescale/mpc8323erdb/ -F: include/configs/MPC8323ERDB.h -F: configs/MPC8323ERDB_defconfig diff --git a/board/freescale/mpc8323erdb/Makefile b/board/freescale/mpc8323erdb/Makefile deleted file mode 100644 index e6f61891d9c1..000000000000 --- a/board/freescale/mpc8323erdb/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd at denx.de. - -obj-y := mpc8323erdb.o diff --git a/board/freescale/mpc8323erdb/README b/board/freescale/mpc8323erdb/README deleted file mode 100644 index 9a46da078187..000000000000 --- a/board/freescale/mpc8323erdb/README +++ /dev/null @@ -1,71 +0,0 @@ -Freescale MPC8323ERDB Board ------------------------------------------ - -1. Memory Map - The memory map looks like this: - - 0x0000_0000 0x03ff_ffff DDR 64M - 0x8000_0000 0x8fff_ffff PCI MEM 256M - 0x9000_0000 0x9fff_ffff PCI_MMIO 256M - 0xe000_0000 0xe00f_ffff IMMR 1M - 0xd000_0000 0xd3ff_ffff PCI IO 64M - 0xfe00_0000 0xfeff_ffff NOR FLASH (CS0) 16M - -2. Compilation - - Assuming you're using BASH (or similar) as your shell: - - export CROSS_COMPILE=your-cross-compiler-prefix- - make distclean - make MPC8323ERDB_config - make - -3. Downloading and Flashing Images - -3.1 Reflash U-Boot Image using U-Boot - - N.b, have an alternate means of programming - the flash available if the new U-Boot doesn't boot. - - First try a: - - tftpboot $loadaddr $uboot - - to make sure that the TFTP load will succeed before - an erase goes ahead and wipes out your current firmware. - Then do a: - - run tftpflash - - which is a shorter version of the manual sequence: - - tftp $loadaddr u-boot.bin - protect off fe000000 +$filesize - erase fe000000 +$filesize - cp.b $loadaddr fe000000 $filesize - - To keep your old U-Boot's environment variables, do a: - - saveenv - - prior to resetting the board. - -3.2 Downloading and Booting Linux Kernel - - Ensure that all networking-related environment variables are set - properly (including ipaddr, serverip, gatewayip (if needed), - netmask, ethaddr, eth1addr, rootpath (if using NFS root), - fdtfile, and bootfile). - - Then, do one of the following, depending on whether you - want an NFS root or a ramdisk root: - - run nfsboot - - or - - run ramboot - -4 Notes - - The console baudrate for MPC8323ERDB is 115200bps. diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c deleted file mode 100644 index cef3216a6fe5..000000000000 --- a/board/freescale/mpc8323erdb/mpc8323erdb.c +++ /dev/null @@ -1,233 +0,0 @@ -/* - * Copyright (C) 2007 Freescale Semiconductor, Inc. - * - * Michael Barkowski - * Based on mpc832xmds file by Dave Liu - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#if defined(CONFIG_PCI) -#include -#endif -#include - -DECLARE_GLOBAL_DATA_PTR; - -const qe_iop_conf_t qe_iop_conf_tab[] = { - /* UCC3 */ - {1, 0, 1, 0, 1}, /* TxD0 */ - {1, 1, 1, 0, 1}, /* TxD1 */ - {1, 2, 1, 0, 1}, /* TxD2 */ - {1, 3, 1, 0, 1}, /* TxD3 */ - {1, 9, 1, 0, 1}, /* TxER */ - {1, 12, 1, 0, 1}, /* TxEN */ - {3, 24, 2, 0, 1}, /* TxCLK->CLK10 */ - - {1, 4, 2, 0, 1}, /* RxD0 */ - {1, 5, 2, 0, 1}, /* RxD1 */ - {1, 6, 2, 0, 1}, /* RxD2 */ - {1, 7, 2, 0, 1}, /* RxD3 */ - {1, 8, 2, 0, 1}, /* RxER */ - {1, 10, 2, 0, 1}, /* RxDV */ - {0, 13, 2, 0, 1}, /* RxCLK->CLK9 */ - {1, 11, 2, 0, 1}, /* COL */ - {1, 13, 2, 0, 1}, /* CRS */ - - /* UCC2 */ - {0, 18, 1, 0, 1}, /* TxD0 */ - {0, 19, 1, 0, 1}, /* TxD1 */ - {0, 20, 1, 0, 1}, /* TxD2 */ - {0, 21, 1, 0, 1}, /* TxD3 */ - {0, 27, 1, 0, 1}, /* TxER */ - {0, 30, 1, 0, 1}, /* TxEN */ - {3, 23, 2, 0, 1}, /* TxCLK->CLK3 */ - - {0, 22, 2, 0, 1}, /* RxD0 */ - {0, 23, 2, 0, 1}, /* RxD1 */ - {0, 24, 2, 0, 1}, /* RxD2 */ - {0, 25, 2, 0, 1}, /* RxD3 */ - {0, 26, 1, 0, 1}, /* RxER */ - {0, 28, 2, 0, 1}, /* Rx_DV */ - {3, 21, 2, 0, 1}, /* RxCLK->CLK16 */ - {0, 29, 2, 0, 1}, /* COL */ - {0, 31, 2, 0, 1}, /* CRS */ - - {3, 4, 3, 0, 2}, /* MDIO */ - {3, 5, 1, 0, 2}, /* MDC */ - - {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */ -}; - -int fixed_sdram(void); - -int dram_init(void) -{ - volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - u32 msize = 0; - - if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) - return -ENXIO; - - /* DDR SDRAM - Main SODIMM */ - im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & LAWBAR_BAR; - - msize = fixed_sdram(); - - /* set total bus SDRAM size(bytes) -- DDR */ - gd->ram_size = msize * 1024 * 1024; - - return 0; -} - -/************************************************************************* - * fixed sdram init -- doesn't use serial presence detect. - ************************************************************************/ -int fixed_sdram(void) -{ - volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - u32 msize = 0; - u32 ddr_size; - u32 ddr_size_log2; - - msize = CONFIG_SYS_DDR_SIZE; - for (ddr_size = msize << 20, ddr_size_log2 = 0; - (ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) { - if (ddr_size & 1) { - return -1; - } - } - im->sysconf.ddrlaw[0].ar = - LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); - im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; - im->ddr.csbnds[0].csbnds = CONFIG_SYS_DDR_CS0_BNDS; - im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; - im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; - im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; - im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; - im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3; - im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG; - im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2; - im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE; - im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE2; - im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL; - __asm__ __volatile__ ("sync"); - udelay(200); - - im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN; - __asm__ __volatile__ ("sync"); - return msize; -} - -int checkboard(void) -{ - puts("Board: Freescale MPC8323ERDB\n"); - return 0; -} - -static struct pci_region pci_regions[] = { - { - bus_start: CONFIG_SYS_PCI1_MEM_BASE, - phys_start: CONFIG_SYS_PCI1_MEM_PHYS, - size: CONFIG_SYS_PCI1_MEM_SIZE, - flags: PCI_REGION_MEM | PCI_REGION_PREFETCH - }, - { - bus_start: CONFIG_SYS_PCI1_MMIO_BASE, - phys_start: CONFIG_SYS_PCI1_MMIO_PHYS, - size: CONFIG_SYS_PCI1_MMIO_SIZE, - flags: PCI_REGION_MEM - }, - { - bus_start: CONFIG_SYS_PCI1_IO_BASE, - phys_start: CONFIG_SYS_PCI1_IO_PHYS, - size: CONFIG_SYS_PCI1_IO_SIZE, - flags: PCI_REGION_IO - } -}; - -void pci_init_board(void) -{ - volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR; - volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; - volatile law83xx_t *pci_law = immr->sysconf.pcilaw; - struct pci_region *reg[] = { pci_regions }; - - /* Enable all 3 PCI_CLK_OUTPUTs. */ - clk->occr |= 0xe0000000; - - /* Configure PCI Local Access Windows */ - pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; - pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB; - - pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; - pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB; - - mpc83xx_pci_init(1, reg); -} - -#if defined(CONFIG_OF_BOARD_SETUP) -int ft_board_setup(void *blob, struct bd_info *bd) -{ - ft_cpu_setup(blob, bd); -#ifdef CONFIG_PCI - ft_pci_setup(blob, bd); -#endif - - return 0; -} -#endif - -#if defined(CONFIG_SYS_I2C_MAC_OFFSET) -int mac_read_from_eeprom(void) -{ - uchar buf[28]; - char str[18]; - int i = 0; - unsigned int crc = 0; - unsigned char enetvar[32]; - - /* Read MAC addresses from EEPROM */ - if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_MAC_OFFSET, buf, 28)) { - printf("\nEEPROM @ 0x%02x read FAILED!!!\n", - CONFIG_SYS_I2C_EEPROM_ADDR); - } else { - uint32_t crc_buf; - - memcpy(&crc_buf, &buf[24], sizeof(uint32_t)); - - if (crc32(crc, buf, 24) == crc_buf) { - printf("Reading MAC from EEPROM\n"); - for (i = 0; i < 4; i++) { - if (memcmp(&buf[i * 6], "\0\0\0\0\0\0", 6)) { - sprintf(str, - "%02X:%02X:%02X:%02X:%02X:%02X", - buf[i * 6], buf[i * 6 + 1], - buf[i * 6 + 2], buf[i * 6 + 3], - buf[i * 6 + 4], buf[i * 6 + 5]); - sprintf((char *)enetvar, - i ? "eth%daddr" : "ethaddr", i); - env_set((char *)enetvar, str); - } - } - } - } - return 0; -} -#endif /* CONFIG_I2C_MAC_OFFSET */ diff --git a/configs/MPC8323ERDB_defconfig b/configs/MPC8323ERDB_defconfig deleted file mode 100644 index 1c85e6081401..000000000000 --- a/configs/MPC8323ERDB_defconfig +++ /dev/null @@ -1,115 +0,0 @@ -CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0xFE000000 -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_SYS_CLK_FREQ=66666667 -CONFIG_MPC83xx=y -CONFIG_HIGH_BATS=y -CONFIG_TARGET_MPC8323ERDB=y -CONFIG_CORE_PLL_RATIO_25_1=y -CONFIG_QUICC_MULT_FACTOR_3=y -CONFIG_PCI_HOST_MODE_ENABLE=y -CONFIG_PCI_INT_ARBITER1_ENABLE=y -CONFIG_BOOT_MEMORY_SPACE_LOW=y -CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y -CONFIG_BAT0=y -CONFIG_BAT0_NAME="SDRAM" -CONFIG_BAT0_BASE=0x00000000 -CONFIG_BAT0_LENGTH_256_MBYTES=y -CONFIG_BAT0_ACCESS_RW=y -CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y -CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y -CONFIG_BAT0_USER_MODE_VALID=y -CONFIG_BAT0_SUPERVISOR_MODE_VALID=y -CONFIG_BAT1=y -CONFIG_BAT1_NAME="IMMR" -CONFIG_BAT1_BASE=0xE0000000 -CONFIG_BAT1_LENGTH_4_MBYTES=y -CONFIG_BAT1_ACCESS_RW=y -CONFIG_BAT1_ICACHE_INHIBITED=y -CONFIG_BAT1_ICACHE_GUARDED=y -CONFIG_BAT1_DCACHE_INHIBITED=y -CONFIG_BAT1_DCACHE_GUARDED=y -CONFIG_BAT1_USER_MODE_VALID=y -CONFIG_BAT1_SUPERVISOR_MODE_VALID=y -CONFIG_BAT2=y -CONFIG_BAT2_NAME="FLASH" -CONFIG_BAT2_BASE=0xFE000000 -CONFIG_BAT2_LENGTH_32_MBYTES=y -CONFIG_BAT2_ACCESS_RW=y -CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y -CONFIG_BAT2_DCACHE_INHIBITED=y -CONFIG_BAT2_DCACHE_GUARDED=y -CONFIG_BAT2_USER_MODE_VALID=y -CONFIG_BAT2_SUPERVISOR_MODE_VALID=y -CONFIG_BAT4=y -CONFIG_BAT4_NAME="STACK_IN_DCACHE" -CONFIG_BAT4_BASE=0xE6000000 -CONFIG_BAT4_ACCESS_RW=y -CONFIG_BAT4_USER_MODE_VALID=y -CONFIG_BAT4_SUPERVISOR_MODE_VALID=y -CONFIG_BAT5=y -CONFIG_BAT5_NAME="PCI_MEM_PHYS" -CONFIG_BAT5_BASE=0x80000000 -CONFIG_BAT5_LENGTH_256_MBYTES=y -CONFIG_BAT5_ACCESS_RW=y -CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y -CONFIG_BAT5_DCACHE_MEMORYCOHERENCE=y -CONFIG_BAT5_USER_MODE_VALID=y -CONFIG_BAT5_SUPERVISOR_MODE_VALID=y -CONFIG_BAT6=y -CONFIG_BAT6_NAME="PCI1_MMIO_PHYS" -CONFIG_BAT6_BASE=0x90000000 -CONFIG_BAT6_LENGTH_256_MBYTES=y -CONFIG_BAT6_ACCESS_RW=y -CONFIG_BAT6_ICACHE_INHIBITED=y -CONFIG_BAT6_ICACHE_GUARDED=y -CONFIG_BAT6_DCACHE_INHIBITED=y -CONFIG_BAT6_DCACHE_GUARDED=y -CONFIG_BAT6_USER_MODE_VALID=y -CONFIG_BAT6_SUPERVISOR_MODE_VALID=y -CONFIG_LBLAW0=y -CONFIG_LBLAW0_BASE=0xFE000000 -CONFIG_LBLAW0_NAME="FLASH" -CONFIG_LBLAW0_LENGTH_32_MBYTES=y -CONFIG_ELBC_BR0_OR0=y -CONFIG_BR0_OR0_NAME="FLASH" -CONFIG_BR0_OR0_BASE=0xFE000000 -CONFIG_BR0_PORTSIZE_16BIT=y -CONFIG_OR0_AM_16_MBYTES=y -CONFIG_OR0_XAM_SET=y -CONFIG_OR0_SCY_15=y -CONFIG_OR0_CSNT_EARLIER=y -CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y -CONFIG_OR0_XACS_EXTENDED=y -CONFIG_OR0_TRLX_RELAXED=y -CONFIG_OR0_EHTR_8_CYCLE=y -CONFIG_OR0_EAD_EXTRA=y -CONFIG_HID0_FINAL_EMCP=y -CONFIG_HID0_FINAL_ICE=y -CONFIG_HID2_HBE=y -CONFIG_ACR_PIPE_DEP_4=y -CONFIG_ACR_RPTCNT_4=y -CONFIG_SPCR_OPT_SPEC_READ=y -CONFIG_LCRR_CLKDIV_2=y -CONFIG_OF_BOARD_SETUP=y -CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_BOOTDELAY=6 -CONFIG_HUSH_PARSER=y -CONFIG_CMD_IMLS=y -CONFIG_CMD_ASKENV=y -CONFIG_CMD_EEPROM=y -CONFIG_CMD_I2C=y -CONFIG_CMD_PCI=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_PING=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_ADDR=0xFE080000 -# CONFIG_MMC is not set -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_SYS_FLASH_PROTECTION=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_QE=y -CONFIG_SYS_NS16550=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h deleted file mode 100644 index 6effaeaa981d..000000000000 --- a/include/configs/MPC8323ERDB.h +++ /dev/null @@ -1,309 +0,0 @@ -/* - * Copyright (C) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -/* - * High Level Configuration Options - */ -#define CONFIG_E300 1 /* E300 family */ - -/* - * System IO Config - */ -#define CONFIG_SYS_SICRL 0x00000000 - -/* - * DDR Setup - */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ - -#undef CONFIG_SPD_EEPROM -#if defined(CONFIG_SPD_EEPROM) -/* Determine DDR configuration from I2C interface - */ -#define SPD_EEPROM_ADDRESS 0x51 /* DDR SODIMM */ -#else -/* Manually set up DDR parameters - */ -#define CONFIG_SYS_DDR_SIZE 64 /* MB */ -#define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN \ - | CSCONFIG_ROW_BIT_13 \ - | CSCONFIG_COL_BIT_9) - /* 0x80010101 */ -#define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ - | (0 << TIMING_CFG0_WRT_SHIFT) \ - | (0 << TIMING_CFG0_RRT_SHIFT) \ - | (0 << TIMING_CFG0_WWT_SHIFT) \ - | (2 << TIMING_CFG0_ACT_PD_EXIT_SHIFT) \ - | (2 << TIMING_CFG0_PRE_PD_EXIT_SHIFT) \ - | (8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT) \ - | (2 << TIMING_CFG0_MRS_CYC_SHIFT)) - /* 0x00220802 */ -#define CONFIG_SYS_DDR_TIMING_1 ((2 << TIMING_CFG1_PRETOACT_SHIFT) \ - | (6 << TIMING_CFG1_ACTTOPRE_SHIFT) \ - | (2 << TIMING_CFG1_ACTTORW_SHIFT) \ - | (5 << TIMING_CFG1_CASLAT_SHIFT) \ - | (3 << TIMING_CFG1_REFREC_SHIFT) \ - | (2 << TIMING_CFG1_WRREC_SHIFT) \ - | (2 << TIMING_CFG1_ACTTOACT_SHIFT) \ - | (2 << TIMING_CFG1_WRTORD_SHIFT)) - /* 0x26253222 */ -#define CONFIG_SYS_DDR_TIMING_2 ((1 << TIMING_CFG2_ADD_LAT_SHIFT) \ - | (31 << TIMING_CFG2_CPO_SHIFT) \ - | (2 << TIMING_CFG2_WR_LAT_DELAY_SHIFT) \ - | (2 << TIMING_CFG2_RD_TO_PRE_SHIFT) \ - | (2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT) \ - | (3 << TIMING_CFG2_CKE_PLS_SHIFT) \ - | (7 << TIMING_CFG2_FOUR_ACT_SHIFT)) - /* 0x1f9048c7 */ -#define CONFIG_SYS_DDR_TIMING_3 0x00000000 -#define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 - /* 0x02000000 */ -#define CONFIG_SYS_DDR_MODE ((0x4448 << SDRAM_MODE_ESD_SHIFT) \ - | (0x0232 << SDRAM_MODE_SD_SHIFT)) - /* 0x44480232 */ -#define CONFIG_SYS_DDR_MODE2 0x8000c000 -#define CONFIG_SYS_DDR_INTERVAL ((800 << SDRAM_INTERVAL_REFINT_SHIFT) \ - | (100 << SDRAM_INTERVAL_BSTOPRE_SHIFT)) - /* 0x03200064 */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x00000003 -#define CONFIG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SREN \ - | SDRAM_CFG_SDRAM_TYPE_DDR2 \ - | SDRAM_CFG_32_BE) - /* 0x43080000 */ -#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 -#endif - -/* - * Memory test - */ -#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ - -/* - * The reserved memory - */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#else -#undef CONFIG_SYS_RAMBOOT -#endif - -/* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */ -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserved for malloc */ - -/* - * Initial RAM Base Address Setup - */ -#define CONFIG_SYS_INIT_RAM_LOCK 1 -#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - -/* - * FLASH on the Local Bus - */ -#define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ -#define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size is 16M */ - - - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* sectors per device */ - -#undef CONFIG_SYS_FLASH_CHECKSUM - -/* - * Serial Port - */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) - -/* I2C */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL -#define CONFIG_SYS_FSL_I2C_SPEED 400000 -#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} } - -/* - * Config on-board EEPROM - */ -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 - -/* - * General PCI - * Addresses are mapped 1-1. - */ -#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE -#define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI1_MMIO_BASE 0x90000000 -#define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE -#define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI1_IO_BASE 0xd0000000 -#define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE -#define CONFIG_SYS_PCI1_IO_SIZE 0x04000000 /* 64M */ - -#ifdef CONFIG_PCI -#define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_SKIP_HOST_BRIDGE - -#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */ - -#endif /* CONFIG_PCI */ - -/* - * QE UEC ethernet configuration - */ -#define CONFIG_UEC_ETH -#define CONFIG_ETHPRIME "UEC0" - -#define CONFIG_UEC_ETH1 /* ETH3 */ - -#ifdef CONFIG_UEC_ETH1 -#define CONFIG_SYS_UEC1_UCC_NUM 2 /* UCC3 */ -#define CONFIG_SYS_UEC1_RX_CLK QE_CLK9 -#define CONFIG_SYS_UEC1_TX_CLK QE_CLK10 -#define CONFIG_SYS_UEC1_ETH_TYPE FAST_ETH -#define CONFIG_SYS_UEC1_PHY_ADDR 4 -#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_MII -#define CONFIG_SYS_UEC1_INTERFACE_SPEED 100 -#endif - -#define CONFIG_UEC_ETH2 /* ETH4 */ - -#ifdef CONFIG_UEC_ETH2 -#define CONFIG_SYS_UEC2_UCC_NUM 1 /* UCC2 */ -#define CONFIG_SYS_UEC2_RX_CLK QE_CLK16 -#define CONFIG_SYS_UEC2_TX_CLK QE_CLK3 -#define CONFIG_SYS_UEC2_ETH_TYPE FAST_ETH -#define CONFIG_SYS_UEC2_PHY_ADDR 0 -#define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_MII -#define CONFIG_SYS_UEC2_INTERFACE_SPEED 100 -#endif - -/* - * Environment - */ - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -#undef CONFIG_WATCHDOG /* watchdog disabled */ - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 256 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ - /* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - -#if (CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#endif - -/* - * Environment Configuration - */ - -#define CONFIG_HAS_ETH0 /* add support for "ethaddr" */ -#define CONFIG_HAS_ETH1 /* add support for "eth1addr" */ - -/* use mac_read_from_eeprom() to read ethaddr from I2C EEPROM - * (see CONFIG_SYS_I2C_EEPROM) */ - /* MAC address offset in I2C EEPROM */ -#define CONFIG_SYS_I2C_MAC_OFFSET 0x7f00 - -#define CONFIG_NETDEV "eth1" - -#define CONFIG_HOSTNAME "mpc8323erdb" -#define CONFIG_ROOTPATH "/nfsroot" -#define CONFIG_BOOTFILE "uImage" - /* U-Boot image on TFTP server */ -#define CONFIG_UBOOTPATH "u-boot.bin" -#define CONFIG_FDTFILE "mpc832x_rdb.dtb" -#define CONFIG_RAMDISKFILE "rootfs.ext2.gz.uboot" - - /* default location for tftp and bootm */ -#define CONFIG_LOADADDR 800000 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=" CONFIG_NETDEV "\0" \ - "uboot=" CONFIG_UBOOTPATH "\0" \ - "tftpflash=tftp $loadaddr $uboot;" \ - "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \ - " +$filesize; " \ - "erase " __stringify(CONFIG_SYS_TEXT_BASE) \ - " +$filesize; " \ - "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ - " $filesize; " \ - "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \ - " +$filesize; " \ - "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ - " $filesize\0" \ - "fdtaddr=780000\0" \ - "fdtfile=" CONFIG_FDTFILE "\0" \ - "ramdiskaddr=1000000\0" \ - "ramdiskfile=" CONFIG_RAMDISKFILE "\0" \ - "console=ttyS0\0" \ - "setbootargs=setenv bootargs " \ - "root=$rootdev rw console=$console,$baudrate $othbootargs\0"\ - "setipargs=setenv bootargs nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:"\ - "$netdev:off "\ - "root=$rootdev rw console=$console,$baudrate $othbootargs\0" - -#define CONFIG_NFSBOOTCOMMAND \ - "setenv rootdev /dev/nfs;" \ - "run setbootargs;" \ - "run setipargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define CONFIG_RAMBOOTCOMMAND \ - "setenv rootdev /dev/ram;" \ - "run setbootargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#endif /* __CONFIG_H */ -- 2.17.1