* [meta-python][PATCH v2] python3-m2crypto: Fix build on riscv and mips
@ 2021-05-15 1:34 Khem Raj
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From: Khem Raj @ 2021-05-15 1:34 UTC (permalink / raw)
To: openembedded-devel; +Cc: Khem Raj
wordlen is not so easy to calculate on RISCV, therefore pass the right
ingredients so compiler does the right thing in the end
Do same for mips as well
Signed-off-by: Khem Raj <raj.khem@gmail.com>
---
v2: Fix build on mips/rv32 as well
meta-python/recipes-devtools/python/python3-m2crypto_0.37.1.bb | 3 +++
1 file changed, 3 insertions(+)
diff --git a/meta-python/recipes-devtools/python/python3-m2crypto_0.37.1.bb b/meta-python/recipes-devtools/python/python3-m2crypto_0.37.1.bb
index ef123075c7..e1f92928c6 100644
--- a/meta-python/recipes-devtools/python/python3-m2crypto_0.37.1.bb
+++ b/meta-python/recipes-devtools/python/python3-m2crypto_0.37.1.bb
@@ -36,6 +36,9 @@ SWIG_FEATURES_x32 = "-D__ILP32__"
SWIG_FEATURES ?= "-D__${HOST_ARCH}__ ${@['-D__ILP32__','-D__LP64__'][d.getVar('SITEINFO_BITS') != '32']}"
+SWIG_FEATURES_append_riscv64 = " -D__SIZEOF_POINTER__=${SITEINFO_BITS}/8 -D__riscv_xlen=${SITEINFO_BITS}"
+SWIG_FEATURES_append_riscv32 = " -D__SIZEOF_POINTER__=${SITEINFO_BITS}/8 -D__riscv_xlen=${SITEINFO_BITS}"
+SWIG_FEATURES_append_mipsarch = " -D_MIPS_SZPTR=${SITEINFO_BITS}"
export SWIG_FEATURES
BBCLASSEXTEND = "native"
--
2.31.1
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2021-05-15 1:34 [meta-python][PATCH v2] python3-m2crypto: Fix build on riscv and mips Khem Raj
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