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From: abelvesa@kernel.org
To: Rob Herring <robh@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>, Jacky Bai <ping.bai@nxp.com>,
	Dong Aisheng <aisheng.dong@nxp.com>
Cc: NXP Linux Team <linux-imx@nxp.com>,
	devicetree@vger.kernel.org,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	Abel Vesa <abel.vesa@nxp.com>
Subject: [PATCH 2/7] arm64: dts: imx8-ss-lsio: Add mu5a mailbox
Date: Mon, 17 May 2021 20:12:00 +0300	[thread overview]
Message-ID: <20210517171205.1581938-3-abelvesa@kernel.org> (raw)
In-Reply-To: <20210517171205.1581938-1-abelvesa@kernel.org>

From: Abel Vesa <abel.vesa@nxp.com>

The mailbox of the lsio mu5a is used by rpmsg on imx8qxp and
imx8dxl platforms.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
index ee4e585a9c39..8e3c92c82fac 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
@@ -141,6 +141,15 @@ lsio_mu4: mailbox@5d1f0000 {
 		status = "disabled";
 	};
 
+	lsio_mu5: mailbox@5d200000 {
+		compatible = "fsl,imx6sx-mu";
+		reg = <0x5d200000 0x10000>;
+		interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+		#mbox-cells = <2>;
+		power-domains = <&pd IMX_SC_R_MU_5A>;
+	};
+
+
 	lsio_mu13: mailbox@5d280000 {
 		reg = <0x5d280000 0x10000>;
 		interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.31.1


WARNING: multiple messages have this Message-ID (diff)
From: abelvesa@kernel.org
To: Rob Herring <robh@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>, Jacky Bai <ping.bai@nxp.com>,
	Dong Aisheng <aisheng.dong@nxp.com>
Cc: NXP Linux Team <linux-imx@nxp.com>,
	devicetree@vger.kernel.org,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	Abel Vesa <abel.vesa@nxp.com>
Subject: [PATCH 2/7] arm64: dts: imx8-ss-lsio: Add mu5a mailbox
Date: Mon, 17 May 2021 20:12:00 +0300	[thread overview]
Message-ID: <20210517171205.1581938-3-abelvesa@kernel.org> (raw)
In-Reply-To: <20210517171205.1581938-1-abelvesa@kernel.org>

From: Abel Vesa <abel.vesa@nxp.com>

The mailbox of the lsio mu5a is used by rpmsg on imx8qxp and
imx8dxl platforms.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
index ee4e585a9c39..8e3c92c82fac 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
@@ -141,6 +141,15 @@ lsio_mu4: mailbox@5d1f0000 {
 		status = "disabled";
 	};
 
+	lsio_mu5: mailbox@5d200000 {
+		compatible = "fsl,imx6sx-mu";
+		reg = <0x5d200000 0x10000>;
+		interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+		#mbox-cells = <2>;
+		power-domains = <&pd IMX_SC_R_MU_5A>;
+	};
+
+
 	lsio_mu13: mailbox@5d280000 {
 		reg = <0x5d280000 0x10000>;
 		interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.31.1


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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-05-17 17:12 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-17 17:11 [PATCH 0/7] arm64: dts: freescale: Add i.MX8DXL support abelvesa
2021-05-17 17:11 ` abelvesa
2021-05-17 17:11 ` [PATCH 1/7] arm64: dts: freescale: Add the top level dtsi support for imx8dxl abelvesa
2021-05-17 17:11   ` abelvesa
2021-05-18  7:35   ` Dong Aisheng
2021-05-18  7:35     ` Dong Aisheng
2021-06-02  9:29     ` Abel Vesa
2021-06-02  9:29       ` Abel Vesa
2021-05-17 17:12 ` abelvesa [this message]
2021-05-17 17:12   ` [PATCH 2/7] arm64: dts: imx8-ss-lsio: Add mu5a mailbox abelvesa
2021-05-18  7:50   ` Dong Aisheng
2021-05-18  7:50     ` Dong Aisheng
2021-06-02  9:48     ` Abel Vesa
2021-06-02  9:48       ` Abel Vesa
2021-05-17 17:12 ` [PATCH 3/7] arm64: dts: freescale: Add adma subsystem dtsi for imx8dxl abelvesa
2021-05-17 17:12   ` abelvesa
2021-05-18  7:52   ` Dong Aisheng
2021-05-18  7:52     ` Dong Aisheng
2021-06-02 11:28     ` Abel Vesa
2021-06-02 11:28       ` Abel Vesa
2021-05-17 17:12 ` [PATCH 4/7] arm64: dts: freescale: Add the imx8dxl connectivity subsys dtsi abelvesa
2021-05-17 17:12   ` abelvesa
2021-05-18  7:53   ` Dong Aisheng
2021-05-18  7:53     ` Dong Aisheng
2021-05-17 17:12 ` [PATCH 5/7] arm64: dts: freescale: Add ddr subsys dtsi for imx8dxl abelvesa
2021-05-17 17:12   ` abelvesa
2021-05-18  7:54   ` Dong Aisheng
2021-05-18  7:54     ` Dong Aisheng
2021-05-17 17:12 ` [PATCH 6/7] arm64: dts: freescale: Add lsio " abelvesa
2021-05-17 17:12   ` abelvesa
2021-05-18  7:55   ` Dong Aisheng
2021-05-18  7:55     ` Dong Aisheng
2021-05-17 17:12 ` [PATCH 7/7] arm64: dts: imx8dxl: Add i.MX8DXL evk board support abelvesa
2021-05-17 17:12   ` abelvesa
2021-05-18  7:57   ` Dong Aisheng
2021-05-18  7:57     ` Dong Aisheng

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