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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [CI 5/5] drm/i915/dmc: s/intel_csr.c/intel_dmc.c and s/intel_csr.h/intel_dmc.h
Date: Tue, 18 May 2021 22:48:23 -0700	[thread overview]
Message-ID: <20210519054823.sj2zjjiyvrqrjssp@ldmartin-desk2> (raw)
In-Reply-To: <20210518213444.11420-6-anusha.srivatsa@intel.com>

On Tue, May 18, 2021 at 02:34:44PM -0700, Anusha Srivatsa wrote:
>Finally, rename the header and source file from csr to dmc.
>
>v2: Add file rename in Documentation.
>- Place headers in orders. (Jani)
>
>Cc: Jani Nikula <jani.nikula@linux.intel.com>
>Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>---
> Documentation/gpu/i915.rst                           | 12 ++++++------
> drivers/gpu/drm/i915/Makefile                        |  2 +-
> drivers/gpu/drm/i915/display/intel_display.c         |  2 +-
> drivers/gpu/drm/i915/display/intel_display_debugfs.c |  2 +-
> drivers/gpu/drm/i915/display/intel_display_power.c   |  2 +-
> .../drm/i915/display/{intel_csr.c => intel_dmc.c}    |  4 ++--
> .../drm/i915/display/{intel_csr.h => intel_dmc.h}    |  6 +++---
> drivers/gpu/drm/i915/i915_drv.c                      |  2 +-
> drivers/gpu/drm/i915/i915_gpu_error.c                |  2 +-
> 9 files changed, 17 insertions(+), 17 deletions(-)
> rename drivers/gpu/drm/i915/display/{intel_csr.c => intel_dmc.c} (99%)
> rename drivers/gpu/drm/i915/display/{intel_csr.h => intel_dmc.h} (88%)
>
>diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
>index 486c720f3890..42ce0196930a 100644
>--- a/Documentation/gpu/i915.rst
>+++ b/Documentation/gpu/i915.rst
>@@ -210,13 +210,13 @@ DPIO
> .. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpio_phy.c
>    :doc: DPIO
>
>-CSR firmware support for DMC
>-----------------------------
>+DMC Firmware Support
>+--------------------
>
>-.. kernel-doc:: drivers/gpu/drm/i915/display/intel_csr.c
>-   :doc: csr support for dmc
>+.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc.c
>+   :doc: DMC Firmware Support
>
>-.. kernel-doc:: drivers/gpu/drm/i915/display/intel_csr.c
>+.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc.c
>    :internal:
>
> Video BIOS Table (VBT)
>@@ -537,7 +537,7 @@ The HuC FW layout is the same as the GuC one, see `GuC Firmware Layout`_
>
> DMC
> ---
>-See `CSR firmware support for DMC`_
>+See `DMC Firmware Support`_
>
> Tracing
> =======
>diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>index d0d936d9137b..2da5bae8fa03 100644
>--- a/drivers/gpu/drm/i915/Makefile
>+++ b/drivers/gpu/drm/i915/Makefile
>@@ -201,10 +201,10 @@ i915-y += \
> 	display/intel_combo_phy.o \
> 	display/intel_connector.o \
> 	display/intel_crtc.o \
>-	display/intel_csr.o \
> 	display/intel_cursor.o \
> 	display/intel_display.o \
> 	display/intel_display_power.o \
>+	display/intel_dmc.o \
> 	display/intel_dpio_phy.o \
> 	display/intel_dpll.o \
> 	display/intel_dpll_mgr.o \
>diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>index 39c9c49b378b..d98a314bb974 100644
>--- a/drivers/gpu/drm/i915/display/intel_display.c
>+++ b/drivers/gpu/drm/i915/display/intel_display.c
>@@ -79,9 +79,9 @@
> #include "intel_cdclk.h"
> #include "intel_color.h"
> #include "intel_crtc.h"
>-#include "intel_csr.h"
> #include "intel_de.h"
> #include "intel_display_types.h"
>+#include "intel_dmc.h"
> #include "intel_dp_link_training.h"
> #include "intel_fbc.h"
> #include "intel_fdi.h"
>diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>index e43abdf0e3d9..94e5cbd86e77 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>@@ -7,11 +7,11 @@
> #include <drm/drm_fourcc.h>
>
> #include "i915_debugfs.h"
>-#include "intel_csr.h"
> #include "intel_display_debugfs.h"
> #include "intel_display_power.h"
> #include "intel_de.h"
> #include "intel_display_types.h"
>+#include "intel_dmc.h"
> #include "intel_dp.h"
> #include "intel_fbc.h"
> #include "intel_hdcp.h"
>diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
>index cbba41d3e6cf..e8fcc3d02d01 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_power.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
>@@ -9,10 +9,10 @@
> #include "i915_irq.h"
> #include "intel_cdclk.h"
> #include "intel_combo_phy.h"
>-#include "intel_csr.h"
> #include "intel_display_power.h"
> #include "intel_de.h"
> #include "intel_display_types.h"
>+#include "intel_dmc.h"
> #include "intel_dpio_phy.h"
> #include "intel_hotplug.h"
> #include "intel_pm.h"
>diff --git a/drivers/gpu/drm/i915/display/intel_csr.c b/drivers/gpu/drm/i915/display/intel_dmc.c
>similarity index 99%
>rename from drivers/gpu/drm/i915/display/intel_csr.c
>rename to drivers/gpu/drm/i915/display/intel_dmc.c
>index ae1dfafaff9a..560574dd929a 100644
>--- a/drivers/gpu/drm/i915/display/intel_csr.c
>+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>@@ -26,11 +26,11 @@
>
> #include "i915_drv.h"
> #include "i915_reg.h"
>-#include "intel_csr.h"
> #include "intel_de.h"
>+#include "intel_dmc.h"
>
> /**
>- * DOC: DMC firmware support
>+ * DOC: DMC Firmware Support
>  *
>  * From gen9 onwards we have newly added DMC (Display microcontroller) in display
>  * engine to save and restore the state of display engine when it enter into
>diff --git a/drivers/gpu/drm/i915/display/intel_csr.h b/drivers/gpu/drm/i915/display/intel_dmc.h
>similarity index 88%
>rename from drivers/gpu/drm/i915/display/intel_csr.h
>rename to drivers/gpu/drm/i915/display/intel_dmc.h
>index fc4960b91686..57dd99da0ced 100644
>--- a/drivers/gpu/drm/i915/display/intel_csr.h
>+++ b/drivers/gpu/drm/i915/display/intel_dmc.h
>@@ -3,8 +3,8 @@
>  * Copyright © 2019 Intel Corporation
>  */
>
>-#ifndef __INTEL_CSR_H__
>-#define __INTEL_CSR_H__
>+#ifndef __INTEL_DMC_H__
>+#define __INTEL_DMC_H__
>
> struct drm_i915_private;
>
>@@ -18,4 +18,4 @@ void intel_dmc_ucode_fini(struct drm_i915_private *i915);
> void intel_dmc_ucode_suspend(struct drm_i915_private *i915);
> void intel_dmc_ucode_resume(struct drm_i915_private *i915);
>
>-#endif /* __INTEL_CSR_H__ */
>+#endif /* __INTEL_DMC_H__ */
>diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
>index f2a9583dfecc..2f06bb7b3ed2 100644
>--- a/drivers/gpu/drm/i915/i915_drv.c
>+++ b/drivers/gpu/drm/i915/i915_drv.c
>@@ -49,7 +49,7 @@
> #include "display/intel_acpi.h"
> #include "display/intel_bw.h"
> #include "display/intel_cdclk.h"
>-#include "display/intel_csr.h"
>+#include "display/intel_dmc.h"
> #include "display/intel_display_types.h"

this is not sorted alphabetically. Other than that:


Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>


Lucas De Marchi

> #include "display/intel_dp.h"
> #include "display/intel_fbdev.h"
>diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
>index edd108d41318..8b964e355cb5 100644
>--- a/drivers/gpu/drm/i915/i915_gpu_error.c
>+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
>@@ -36,7 +36,7 @@
>
> #include <drm/drm_print.h>
>
>-#include "display/intel_csr.h"
>+#include "display/intel_dmc.h"
> #include "display/intel_overlay.h"
>
> #include "gem/i915_gem_context.h"
>-- 
>2.25.0
>
>_______________________________________________
>Intel-gfx mailing list
>Intel-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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  reply	other threads:[~2021-05-19  5:48 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-18 21:34 [Intel-gfx] [CI 0/5] Rename all CSR references to DMC Anusha Srivatsa
2021-05-18 21:34 ` [Intel-gfx] [CI 1/5] drm/i915/dmc: s/intel_csr/intel_dmc Anusha Srivatsa
2021-05-19  5:40   ` Lucas De Marchi
2021-05-18 21:34 ` [Intel-gfx] [CI 2/5] drm/i915/dmc: s/HAS_CSR/HAS_DMC Anusha Srivatsa
2021-05-19  5:42   ` Lucas De Marchi
2021-05-18 21:34 ` [Intel-gfx] [CI 3/5] drm/i915/dmc: Rename macro names containing csr Anusha Srivatsa
2021-05-19  5:45   ` Lucas De Marchi
2021-05-21  7:45     ` Jani Nikula
2021-05-21 16:31       ` Srivatsa, Anusha
2021-05-18 21:34 ` [Intel-gfx] [CI 4/5] drm/i915/dmc: Rename functions names having "csr" Anusha Srivatsa
2021-05-19  5:46   ` Lucas De Marchi
2021-05-18 21:34 ` [Intel-gfx] [CI 5/5] drm/i915/dmc: s/intel_csr.c/intel_dmc.c and s/intel_csr.h/intel_dmc.h Anusha Srivatsa
2021-05-19  5:48   ` Lucas De Marchi [this message]
2021-05-18 21:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Rename all CSR references to DMC (rev5) Patchwork
2021-05-18 21:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-05-18 22:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-20  0:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2021-05-18 19:53 [Intel-gfx] [CI 0/5] Rename all CSR references to DMC Anusha Srivatsa
2021-05-18 19:53 ` [Intel-gfx] [CI 5/5] drm/i915/dmc: s/intel_csr.c/intel_dmc.c and s/intel_csr.h/intel_dmc.h Anusha Srivatsa

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