All of lore.kernel.org
 help / color / mirror / Atom feed
From: Shiraz Saleem <shiraz.saleem@intel.com>
To: dledford@redhat.com, jgg@nvidia.com, kuba@kernel.org,
	davem@davemloft.net
Cc: linux-rdma@vger.kernel.org, netdev@vger.kernel.org,
	david.m.ertman@intel.com, anthony.l.nguyen@intel.com,
	Shiraz Saleem <shiraz.saleem@intel.com>
Subject: [PATCH v6 01/22] iidc: Introduce iidc.h
Date: Thu, 20 May 2021 09:37:48 -0500	[thread overview]
Message-ID: <20210520143809.819-2-shiraz.saleem@intel.com> (raw)
In-Reply-To: <20210520143809.819-1-shiraz.saleem@intel.com>

From: Dave Ertman <david.m.ertman@intel.com>

Introduce a shared header file used by the 'ice' Intel networking driver
providing RDMA support and the 'irdma' driver to provide a private
interface.

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
---
 MAINTAINERS                    |   1 +
 include/linux/net/intel/iidc.h | 100 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 101 insertions(+)
 create mode 100644 include/linux/net/intel/iidc.h

diff --git a/MAINTAINERS b/MAINTAINERS
index bd7aff0c..34d2bf3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9130,6 +9130,7 @@ F:	Documentation/networking/device_drivers/ethernet/intel/
 F:	drivers/net/ethernet/intel/
 F:	drivers/net/ethernet/intel/*/
 F:	include/linux/avf/virtchnl.h
+F:	include/linux/net/intel/iidc.h
 
 INTEL FRAMEBUFFER DRIVER (excluding 810 and 815)
 M:	Maik Broemme <mbroemme@libmpq.org>
diff --git a/include/linux/net/intel/iidc.h b/include/linux/net/intel/iidc.h
new file mode 100644
index 0000000..e32f671
--- /dev/null
+++ b/include/linux/net/intel/iidc.h
@@ -0,0 +1,100 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (C) 2021, Intel Corporation. */
+
+#ifndef _IIDC_H_
+#define _IIDC_H_
+
+#include <linux/auxiliary_bus.h>
+#include <linux/dcbnl.h>
+#include <linux/device.h>
+#include <linux/if_ether.h>
+#include <linux/kernel.h>
+#include <linux/netdevice.h>
+
+enum iidc_event_type {
+	IIDC_EVENT_BEFORE_MTU_CHANGE,
+	IIDC_EVENT_AFTER_MTU_CHANGE,
+	IIDC_EVENT_BEFORE_TC_CHANGE,
+	IIDC_EVENT_AFTER_TC_CHANGE,
+	IIDC_EVENT_CRIT_ERR,
+	IIDC_EVENT_NBITS		/* must be last */
+};
+
+enum iidc_reset_type {
+	IIDC_PFR,
+	IIDC_CORER,
+	IIDC_GLOBR,
+};
+
+#define IIDC_MAX_USER_PRIORITY		8
+
+/* Struct to hold per RDMA Qset info */
+struct iidc_rdma_qset_params {
+	/* Qset TEID returned to the RDMA driver in
+	 * ice_add_rdma_qset and used by RDMA driver
+	 * for calls to ice_del_rdma_qset
+	 */
+	u32 teid;	/* Qset TEID */
+	u16 qs_handle; /* RDMA driver provides this */
+	u16 vport_id; /* VSI index */
+	u8 tc; /* TC branch the Qset should belong to */
+};
+
+struct iidc_qos_info {
+	u64 tc_ctx;
+	u8 rel_bw;
+	u8 prio_type;
+	u8 egress_virt_up;
+	u8 ingress_virt_up;
+};
+
+/* Struct to pass QoS info */
+struct iidc_qos_params {
+	struct iidc_qos_info tc_info[IEEE_8021QAZ_MAX_TCS];
+	u8 up2tc[IIDC_MAX_USER_PRIORITY];
+	u8 vport_relative_bw;
+	u8 vport_priority_type;
+	u8 num_tc;
+};
+
+struct iidc_event {
+	DECLARE_BITMAP(type, IIDC_EVENT_NBITS);
+	u32 reg;
+};
+
+struct ice_pf;
+
+int ice_add_rdma_qset(struct ice_pf *pf, struct iidc_rdma_qset_params *qset);
+int ice_del_rdma_qset(struct ice_pf *pf, struct iidc_rdma_qset_params *qset);
+int ice_rdma_request_reset(struct ice_pf *pf, enum iidc_reset_type reset_type);
+int ice_rdma_update_vsi_filter(struct ice_pf *pf, u16 vsi_id, bool enable);
+void ice_get_qos_params(struct ice_pf *pf, struct iidc_qos_params *qos);
+
+#define IIDC_RDMA_ROCE_NAME	"roce"
+
+/* Structure representing auxiliary driver tailored information about the core
+ * PCI dev, each auxiliary driver using the IIDC interface will have an
+ * instance of this struct dedicated to it.
+ */
+
+struct iidc_auxiliary_dev {
+	struct auxiliary_device adev;
+	struct ice_pf *pf;
+};
+
+/* structure representing the auxiliary driver. This struct is to be
+ * allocated and populated by the auxiliary driver's owner. The core PCI
+ * driver will access these ops by performing a container_of on the
+ * auxiliary_device->dev.driver.
+ */
+struct iidc_auxiliary_drv {
+	struct auxiliary_driver adrv;
+	/* This event_handler is meant to be a blocking call.  For instance,
+	 * when a BEFORE_MTU_CHANGE event comes in, the event_handler will not
+	 * return until the auxiliary driver is ready for the MTU change to
+	 * happen.
+	 */
+	void (*event_handler)(struct ice_pf *pf, struct iidc_event *event);
+};
+
+#endif /* _IIDC_H_*/
-- 
1.8.3.1


  reply	other threads:[~2021-05-20 14:39 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-20 14:37 [PATCH v6 00/22] Add Intel Ethernet Protocol Driver for RDMA (irdma) Shiraz Saleem
2021-05-20 14:37 ` Shiraz Saleem [this message]
2021-05-20 14:37 ` [PATCH v6 02/22] ice: Initialize RDMA support Shiraz Saleem
2021-05-20 14:37 ` [PATCH v6 03/22] ice: Implement iidc operations Shiraz Saleem
2021-05-20 14:37 ` [PATCH v6 04/22] ice: Register auxiliary device to provide RDMA Shiraz Saleem
2021-05-20 14:37 ` [PATCH v6 05/22] i40e: Prep i40e header for aux bus conversion Shiraz Saleem
2021-05-20 14:37 ` [PATCH v6 06/22] i40e: Register auxiliary devices to provide RDMA Shiraz Saleem
2021-05-20 19:49   ` Jason Gunthorpe
2021-05-20 14:37 ` [PATCH v6 07/22] RDMA/irdma: Register auxiliary driver and implement private channel OPs Shiraz Saleem
2021-05-20 14:37 ` [PATCH v6 08/22] RDMA/irdma: Implement device initialization definitions Shiraz Saleem
2021-05-20 14:37 ` [PATCH v6 09/22] RDMA/irdma: Implement HW Admin Queue OPs Shiraz Saleem
2021-05-20 14:37 ` [PATCH v6 10/22] RDMA/irdma: Add HMC backing store setup functions Shiraz Saleem
2021-05-20 14:37 ` [PATCH v6 11/22] RDMA/irdma: Add privileged UDA queue implementation Shiraz Saleem
2021-05-20 14:37 ` [PATCH v6 12/22] RDMA/irdma: Add QoS definitions Shiraz Saleem
2021-05-20 14:38 ` [PATCH v6 13/22] RDMA/irdma: Add connection manager Shiraz Saleem
2021-05-20 14:38 ` [PATCH v6 14/22] RDMA/irdma: Add PBLE resource manager Shiraz Saleem
2021-05-20 14:38 ` [PATCH v6 15/22] RDMA/irdma: Implement device supported verb APIs Shiraz Saleem
2021-05-20 14:38 ` [PATCH v6 16/22] RDMA/irdma: Add RoCEv2 UD OP support Shiraz Saleem
2021-05-20 14:38 ` [PATCH v6 17/22] RDMA/irdma: Add user/kernel shared libraries Shiraz Saleem
2021-05-20 14:38 ` [PATCH v6 18/22] RDMA/irdma: Add miscellaneous utility definitions Shiraz Saleem
2021-05-20 14:38 ` [PATCH v6 19/22] RDMA/irdma: Add dynamic tracing for CM Shiraz Saleem
2021-05-20 14:38 ` [PATCH v6 20/22] RDMA/irdma: Add ABI definitions Shiraz Saleem
2021-05-20 14:38 ` [PATCH v6 21/22] RDMA/irdma: Add irdma Kconfig/Makefile and remove i40iw Shiraz Saleem
2021-05-20 14:38 ` [PATCH v6 22/22] RDMA/irdma: Update MAINTAINERS file Shiraz Saleem
2021-05-20 20:03 ` [PATCH v6 00/22] Add Intel Ethernet Protocol Driver for RDMA (irdma) Jason Gunthorpe
2021-05-20 21:17   ` Saleem, Shiraz

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210520143809.819-2-shiraz.saleem@intel.com \
    --to=shiraz.saleem@intel.com \
    --cc=anthony.l.nguyen@intel.com \
    --cc=davem@davemloft.net \
    --cc=david.m.ertman@intel.com \
    --cc=dledford@redhat.com \
    --cc=jgg@nvidia.com \
    --cc=kuba@kernel.org \
    --cc=linux-rdma@vger.kernel.org \
    --cc=netdev@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.