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Thu, 20 May 2021 16:24:38 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 06037ED1; Thu, 20 May 2021 09:24:34 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.7.235]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 43DA13F73B; Thu, 20 May 2021 09:24:32 -0700 (PDT) Date: Thu, 20 May 2021 17:24:29 +0100 From: Mark Rutland To: Fuad Tabba Cc: linux-arm-kernel@lists.infradead.org, will@kernel.org, catalin.marinas@arm.com, maz@kernel.org, ardb@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, robin.murphy@arm.com Subject: Re: [PATCH v3 15/18] arm64: __clean_dcache_area_pou to take end parameter instead of size Message-ID: <20210520162429.GT17233@C02TD0UTHF1T.local> References: <20210520124406.2731873-1-tabba@google.com> <20210520124406.2731873-16-tabba@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210520124406.2731873-16-tabba@google.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210520_092437_032210_FA569A67 X-CRM114-Status: GOOD ( 18.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, May 20, 2021 at 01:44:03PM +0100, Fuad Tabba wrote: > To be consistent with other functions with similar names and > functionality in cacheflush.h, cache.S, and cachetlb.rst, change > to specify the range in terms of start and end, as opposed to > start and size. > > No functional change intended. > > Reported-by: Will Deacon > Signed-off-by: Fuad Tabba Acked-by: Mark Rutland Mark. > --- > arch/arm64/include/asm/cacheflush.h | 2 +- > arch/arm64/mm/cache.S | 9 ++++----- > arch/arm64/mm/flush.c | 2 +- > 3 files changed, 6 insertions(+), 7 deletions(-) > > diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h > index fa5641868d65..f86723047315 100644 > --- a/arch/arm64/include/asm/cacheflush.h > +++ b/arch/arm64/include/asm/cacheflush.h > @@ -62,7 +62,7 @@ extern void __flush_dcache_area(unsigned long start, unsigned long end); > extern void __inval_dcache_area(unsigned long start, unsigned long end); > extern void __clean_dcache_area_poc(unsigned long start, unsigned long end); > extern void __clean_dcache_area_pop(unsigned long start, unsigned long end); > -extern void __clean_dcache_area_pou(void *addr, size_t len); > +extern void __clean_dcache_area_pou(unsigned long start, unsigned long end); > extern long __flush_cache_user_range(unsigned long start, unsigned long end); > extern void sync_icache_aliases(void *kaddr, unsigned long len); > > diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S > index b72fbae4b8e9..b70a6699c02b 100644 > --- a/arch/arm64/mm/cache.S > +++ b/arch/arm64/mm/cache.S > @@ -120,20 +120,19 @@ SYM_FUNC_START_PI(__flush_dcache_area) > SYM_FUNC_END_PI(__flush_dcache_area) > > /* > - * __clean_dcache_area_pou(kaddr, size) > + * __clean_dcache_area_pou(start, end) > * > - * Ensure that any D-cache lines for the interval [kaddr, kaddr+size) > + * Ensure that any D-cache lines for the interval [start, end) > * are cleaned to the PoU. > * > - * - kaddr - kernel address > - * - size - size in question > + * - start - virtual start address of region > + * - end - virtual end address of region > */ > SYM_FUNC_START(__clean_dcache_area_pou) > alternative_if ARM64_HAS_CACHE_IDC > dsb ishst > ret > alternative_else_nop_endif > - add x1, x0, x1 > dcache_by_line_op cvau, ish, x0, x1, x2, x3 > ret > SYM_FUNC_END(__clean_dcache_area_pou) > diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c > index 5aba7fe42d4b..a69d745fb1dc 100644 > --- a/arch/arm64/mm/flush.c > +++ b/arch/arm64/mm/flush.c > @@ -19,7 +19,7 @@ void sync_icache_aliases(void *kaddr, unsigned long len) > unsigned long addr = (unsigned long)kaddr; > > if (icache_is_aliasing()) { > - __clean_dcache_area_pou(kaddr, len); > + __clean_dcache_area_pou(kaddr, kaddr + len); > __flush_icache_all(); > } else { > /* > -- > 2.31.1.751.gd2f1c929bd-goog > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel