* [Intel-gfx] [PATCH 0/2] More DMC cleanup
@ 2021-05-20 18:36 Anusha Srivatsa
2021-05-20 18:36 ` [Intel-gfx] [PATCH 1/2] drm/i915/dmc: s/DRM_ERROR/drm_err Anusha Srivatsa
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Anusha Srivatsa @ 2021-05-20 18:36 UTC (permalink / raw)
To: intel-gfx
Last of prep patches before Pipe DMC patches
can land.
Anusha Srivatsa (2):
drm/i915/dmc: s/DRM_ERROR/drm_err
drm/i915/dmc: Add intel_dmc_has_payload() helper
.../drm/i915/display/intel_display_debugfs.c | 4 +-
.../drm/i915/display/intel_display_power.c | 16 +++---
drivers/gpu/drm/i915/display/intel_dmc.c | 52 ++++++++++++-------
drivers/gpu/drm/i915/display/intel_dmc.h | 22 ++++++++
drivers/gpu/drm/i915/i915_drv.h | 18 +------
drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
6 files changed, 66 insertions(+), 48 deletions(-)
--
2.25.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/dmc: s/DRM_ERROR/drm_err
2021-05-20 18:36 [Intel-gfx] [PATCH 0/2] More DMC cleanup Anusha Srivatsa
@ 2021-05-20 18:36 ` Anusha Srivatsa
2021-05-20 20:42 ` Lucas De Marchi
2021-05-20 18:36 ` [Intel-gfx] [PATCH 2/2] drm/i915/dmc: Add intel_dmc_has_payload() helper Anusha Srivatsa
` (2 subsequent siblings)
3 siblings, 1 reply; 7+ messages in thread
From: Anusha Srivatsa @ 2021-05-20 18:36 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
Use new format of debug messages across intel_csr.
While at it, change some function definitions which now
need dev_priv for drm_err and drm_info etc.
v2: use container_of() (Jani)
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Suggested-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 39 ++++++++++++++----------
1 file changed, 23 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 560574dd929a..d71758cd0b18 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -400,6 +400,8 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc,
u32 mmio_count, mmio_count_max;
u8 *payload;
+ struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc);
+
BUILD_BUG_ON(ARRAY_SIZE(dmc->mmioaddr) < DMC_V3_MAX_MMIO_COUNT ||
ARRAY_SIZE(dmc->mmioaddr) < DMC_V1_MAX_MMIO_COUNT);
@@ -439,28 +441,28 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc,
header_len_bytes = dmc_header->header_len;
dmc_header_size = sizeof(*v1);
} else {
- DRM_ERROR("Unknown DMC fw header version: %u\n",
+ drm_err(&i915->drm, "Unknown DMC fw header version: %u\n",
dmc_header->header_ver);
return 0;
}
if (header_len_bytes != dmc_header_size) {
- DRM_ERROR("DMC firmware has wrong dmc header length "
+ drm_err(&i915->drm, "DMC firmware has wrong dmc header length "
"(%u bytes)\n", header_len_bytes);
return 0;
}
/* Cache the dmc header info. */
if (mmio_count > mmio_count_max) {
- DRM_ERROR("DMC firmware has wrong mmio count %u\n", mmio_count);
+ drm_err(&i915->drm, "DMC firmware has wrong mmio count %u\n", mmio_count);
return 0;
}
for (i = 0; i < mmio_count; i++) {
if (mmioaddr[i] < DMC_MMIO_START_RANGE ||
mmioaddr[i] > DMC_MMIO_END_RANGE) {
- DRM_ERROR("DMC firmware has wrong mmio address 0x%x\n",
- mmioaddr[i]);
+ drm_err(&i915->drm, "DMC firmware has wrong mmio address 0x%x\n",
+ mmioaddr[i]);
return 0;
}
dmc->mmioaddr[i] = _MMIO(mmioaddr[i]);
@@ -476,14 +478,14 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc,
goto error_truncated;
if (payload_size > dmc->max_fw_size) {
- DRM_ERROR("DMC FW too big (%u bytes)\n", payload_size);
+ drm_err(&i915->drm, "DMC FW too big (%u bytes)\n", payload_size);
return 0;
}
dmc->dmc_fw_size = dmc_header->fw_size;
dmc->dmc_payload = kmalloc(payload_size, GFP_KERNEL);
if (!dmc->dmc_payload) {
- DRM_ERROR("Memory allocation failed for dmc payload\n");
+ drm_err(&i915->drm, "Memory allocation failed for dmc payload\n");
return 0;
}
@@ -493,7 +495,7 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc,
return header_len_bytes + payload_size;
error_truncated:
- DRM_ERROR("Truncated DMC firmware, refusing.\n");
+ drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n");
return 0;
}
@@ -507,6 +509,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc,
u32 num_entries, max_entries, dmc_offset;
const struct intel_fw_info *fw_info;
+ struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc);
+
if (rem_size < package_size)
goto error_truncated;
@@ -515,7 +519,7 @@ parse_dmc_fw_package(struct intel_dmc *dmc,
} else if (package_header->header_ver == 2) {
max_entries = PACKAGE_V2_MAX_FW_INFO_ENTRIES;
} else {
- DRM_ERROR("DMC firmware has unknown header version %u\n",
+ drm_err(&i915->drm, "DMC firmware has unknown header version %u\n",
package_header->header_ver);
return 0;
}
@@ -529,8 +533,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc,
goto error_truncated;
if (package_header->header_len * 4 != package_size) {
- DRM_ERROR("DMC firmware has wrong package header length "
- "(%u bytes)\n", package_size);
+ drm_err(&i915->drm, "DMC firmware has wrong package header length "
+ "(%u bytes)\n", package_size);
return 0;
}
@@ -543,8 +547,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc,
dmc_offset = find_dmc_fw_offset(fw_info, num_entries, si,
package_header->header_ver);
if (dmc_offset == DMC_DEFAULT_FW_OFFSET) {
- DRM_ERROR("DMC firmware not supported for %c stepping\n",
- si->stepping);
+ drm_err(&i915->drm, "DMC firmware not supported for %c stepping\n",
+ si->stepping);
return 0;
}
@@ -552,7 +556,7 @@ parse_dmc_fw_package(struct intel_dmc *dmc,
return package_size + dmc_offset * 4;
error_truncated:
- DRM_ERROR("Truncated DMC firmware, refusing.\n");
+ drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n");
return 0;
}
@@ -561,14 +565,17 @@ static u32 parse_dmc_fw_css(struct intel_dmc *dmc,
struct intel_css_header *css_header,
size_t rem_size)
{
+
+ struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc);
+
if (rem_size < sizeof(struct intel_css_header)) {
- DRM_ERROR("Truncated DMC firmware, refusing.\n");
+ drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n");
return 0;
}
if (sizeof(struct intel_css_header) !=
(css_header->header_len * 4)) {
- DRM_ERROR("DMC firmware has wrong CSS header length "
+ drm_err(&i915->drm, "DMC firmware has wrong CSS header length "
"(%u bytes)\n",
(css_header->header_len * 4));
return 0;
--
2.25.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/dmc: Add intel_dmc_has_payload() helper
2021-05-20 18:36 [Intel-gfx] [PATCH 0/2] More DMC cleanup Anusha Srivatsa
2021-05-20 18:36 ` [Intel-gfx] [PATCH 1/2] drm/i915/dmc: s/DRM_ERROR/drm_err Anusha Srivatsa
@ 2021-05-20 18:36 ` Anusha Srivatsa
2021-05-20 20:45 ` Lucas De Marchi
2021-05-20 18:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DMC cleanup Patchwork
2021-05-20 19:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
3 siblings, 1 reply; 7+ messages in thread
From: Anusha Srivatsa @ 2021-05-20 18:36 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
We check for dmc_payload being there at various points in the driver.
Replace it with the helper.
v2: rebased.
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
.../drm/i915/display/intel_display_debugfs.c | 4 ++--
.../drm/i915/display/intel_display_power.c | 16 +++++++-------
drivers/gpu/drm/i915/display/intel_dmc.c | 13 +++++++----
drivers/gpu/drm/i915/display/intel_dmc.h | 22 +++++++++++++++++++
drivers/gpu/drm/i915/i915_drv.h | 18 +--------------
drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
6 files changed, 43 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 94e5cbd86e77..88bb05d5c483 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -542,10 +542,10 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
- seq_printf(m, "fw loaded: %s\n", yesno(dmc->dmc_payload));
+ seq_printf(m, "fw loaded: %s\n", yesno(intel_dmc_has_payload(dev_priv)));
seq_printf(m, "path: %s\n", dmc->fw_path);
- if (!dmc->dmc_payload)
+ if (!intel_dmc_has_payload(dev_priv))
goto out;
seq_printf(m, "version: %d.%d\n", DMC_VERSION_MAJOR(dmc->version),
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 991ceea06a07..b546672c9b00 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1220,7 +1220,7 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,
static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
struct i915_power_well *power_well)
{
- if (!dev_priv->dmc.dmc_payload)
+ if (!intel_dmc_has_payload(dev_priv))
return;
switch (dev_priv->dmc.target_dc_state) {
@@ -5579,7 +5579,7 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv,
gen9_dbuf_enable(dev_priv);
- if (resume && dev_priv->dmc.dmc_payload)
+ if (resume && intel_dmc_has_payload(dev_priv))
intel_dmc_load_program(dev_priv);
}
@@ -5646,7 +5646,7 @@ static void bxt_display_core_init(struct drm_i915_private *dev_priv, bool resume
gen9_dbuf_enable(dev_priv);
- if (resume && dev_priv->dmc.dmc_payload)
+ if (resume && intel_dmc_has_payload(dev_priv))
intel_dmc_load_program(dev_priv);
}
@@ -5712,7 +5712,7 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume
/* 6. Enable DBUF */
gen9_dbuf_enable(dev_priv);
- if (resume && dev_priv->dmc.dmc_payload)
+ if (resume && intel_dmc_has_payload(dev_priv))
intel_dmc_load_program(dev_priv);
}
@@ -5869,7 +5869,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
if (DISPLAY_VER(dev_priv) >= 12)
tgl_bw_buddy_init(dev_priv);
- if (resume && dev_priv->dmc.dmc_payload)
+ if (resume && intel_dmc_has_payload(dev_priv))
intel_dmc_load_program(dev_priv);
/* Wa_14011508470 */
@@ -6230,7 +6230,7 @@ void intel_power_domains_suspend(struct drm_i915_private *i915,
*/
if (!(i915->dmc.allowed_dc_mask & DC_STATE_EN_DC9) &&
suspend_mode == I915_DRM_SUSPEND_IDLE &&
- i915->dmc.dmc_payload) {
+ intel_dmc_has_payload(i915)) {
intel_display_power_flush_work(i915);
intel_power_domains_verify_state(i915);
return;
@@ -6420,7 +6420,7 @@ void intel_display_power_resume(struct drm_i915_private *i915)
if (DISPLAY_VER(i915) >= 11) {
bxt_disable_dc9(i915);
icl_display_core_init(i915, true);
- if (i915->dmc.dmc_payload) {
+ if (intel_dmc_has_payload(i915)) {
if (i915->dmc.allowed_dc_mask &
DC_STATE_EN_UPTO_DC6)
skl_enable_dc6(i915);
@@ -6431,7 +6431,7 @@ void intel_display_power_resume(struct drm_i915_private *i915)
} else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) {
bxt_disable_dc9(i915);
bxt_display_core_init(i915, true);
- if (i915->dmc.dmc_payload &&
+ if (intel_dmc_has_payload(i915) &&
(i915->dmc.allowed_dc_mask & DC_STATE_EN_UPTO_DC5))
gen9_enable_dc5(i915);
} else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index d71758cd0b18..a663d1df8962 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -237,6 +237,11 @@ struct stepping_info {
char substepping;
};
+bool intel_dmc_has_payload(struct drm_i915_private *dev_priv)
+{
+ return dev_priv->dmc.dmc_payload;
+}
+
static const struct stepping_info skl_stepping_info[] = {
{'A', '0'}, {'B', '0'}, {'C', '0'},
{'D', '0'}, {'E', '0'}, {'F', '0'},
@@ -320,7 +325,7 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv)
return;
}
- if (!dev_priv->dmc.dmc_payload) {
+ if (!intel_dmc_has_payload(dev_priv)) {
drm_err(&dev_priv->drm,
"Tried to program CSR with empty payload\n");
return;
@@ -659,7 +664,7 @@ static void dmc_load_work_fn(struct work_struct *work)
request_firmware(&fw, dev_priv->dmc.fw_path, dev_priv->drm.dev);
parse_dmc_fw(dev_priv, fw);
- if (dev_priv->dmc.dmc_payload) {
+ if (intel_dmc_has_payload(dev_priv)) {
intel_dmc_load_program(dev_priv);
intel_dmc_runtime_pm_put(dev_priv);
@@ -788,7 +793,7 @@ void intel_dmc_ucode_suspend(struct drm_i915_private *dev_priv)
flush_work(&dev_priv->dmc.work);
/* Drop the reference held in case DMC isn't loaded. */
- if (!dev_priv->dmc.dmc_payload)
+ if (!intel_dmc_has_payload(dev_priv))
intel_dmc_runtime_pm_put(dev_priv);
}
@@ -808,7 +813,7 @@ void intel_dmc_ucode_resume(struct drm_i915_private *dev_priv)
* Reacquire the reference to keep RPM disabled in case DMC isn't
* loaded.
*/
- if (!dev_priv->dmc.dmc_payload)
+ if (!intel_dmc_has_payload(dev_priv))
intel_dmc_runtime_pm_get(dev_priv);
}
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h
index 57dd99da0ced..8baeb85cf8db 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc.h
@@ -6,16 +6,38 @@
#ifndef __INTEL_DMC_H__
#define __INTEL_DMC_H__
+#include <drm/drm_util.h>
+#include "intel_wakeref.h"
+#include "i915_reg.h"
+
struct drm_i915_private;
#define DMC_VERSION(major, minor) ((major) << 16 | (minor))
#define DMC_VERSION_MAJOR(version) ((version) >> 16)
#define DMC_VERSION_MINOR(version) ((version) & 0xffff)
+struct intel_dmc {
+ struct work_struct work;
+ const char *fw_path;
+ u32 required_version;
+ u32 max_fw_size; /* bytes */
+ u32 *dmc_payload;
+ u32 dmc_fw_size; /* dwords */
+ u32 version;
+ u32 mmio_count;
+ i915_reg_t mmioaddr[20];
+ u32 mmiodata[20];
+ u32 dc_state;
+ u32 target_dc_state;
+ u32 allowed_dc_mask;
+ intel_wakeref_t wakeref;
+};
+
void intel_dmc_ucode_init(struct drm_i915_private *i915);
void intel_dmc_load_program(struct drm_i915_private *i915);
void intel_dmc_ucode_fini(struct drm_i915_private *i915);
void intel_dmc_ucode_suspend(struct drm_i915_private *i915);
void intel_dmc_ucode_resume(struct drm_i915_private *i915);
+bool intel_dmc_has_payload(struct drm_i915_private *i915);
#endif /* __INTEL_DMC_H__ */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9cb02618ba15..b5962768a1f1 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -67,6 +67,7 @@
#include "display/intel_bios.h"
#include "display/intel_display.h"
#include "display/intel_display_power.h"
+#include "display/intel_dmc.h"
#include "display/intel_dpll_mgr.h"
#include "display/intel_dsb.h"
#include "display/intel_frontbuffer.h"
@@ -328,23 +329,6 @@ struct drm_i915_display_funcs {
void (*read_luts)(struct intel_crtc_state *crtc_state);
};
-struct intel_dmc {
- struct work_struct work;
- const char *fw_path;
- u32 required_version;
- u32 max_fw_size; /* bytes */
- u32 *dmc_payload;
- u32 dmc_fw_size; /* dwords */
- u32 version;
- u32 mmio_count;
- i915_reg_t mmioaddr[20];
- u32 mmiodata[20];
- u32 dc_state;
- u32 target_dc_state;
- u32 allowed_dc_mask;
- intel_wakeref_t wakeref;
-};
-
enum i915_cache_level {
I915_CACHE_NONE = 0,
I915_CACHE_LLC, /* also used for snoopable memory on non-LLC */
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 8b964e355cb5..833d3e8b7631 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -792,7 +792,7 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
struct intel_dmc *dmc = &m->i915->dmc;
err_printf(m, "DMC loaded: %s\n",
- yesno(dmc->dmc_payload));
+ yesno(intel_dmc_has_payload(m->i915) != 0));
err_printf(m, "DMC fw version: %d.%d\n",
DMC_VERSION_MAJOR(dmc->version),
DMC_VERSION_MINOR(dmc->version));
--
2.25.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DMC cleanup
2021-05-20 18:36 [Intel-gfx] [PATCH 0/2] More DMC cleanup Anusha Srivatsa
2021-05-20 18:36 ` [Intel-gfx] [PATCH 1/2] drm/i915/dmc: s/DRM_ERROR/drm_err Anusha Srivatsa
2021-05-20 18:36 ` [Intel-gfx] [PATCH 2/2] drm/i915/dmc: Add intel_dmc_has_payload() helper Anusha Srivatsa
@ 2021-05-20 18:45 ` Patchwork
2021-05-20 19:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2021-05-20 18:45 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
== Series Details ==
Series: More DMC cleanup
URL : https://patchwork.freedesktop.org/series/90379/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a52e01980968 drm/i915/dmc: s/DRM_ERROR/drm_err
-:36: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#36: FILE: drivers/gpu/drm/i915/display/intel_dmc.c:445:
+ drm_err(&i915->drm, "Unknown DMC fw header version: %u\n",
dmc_header->header_ver);
-:77: WARNING:OOM_MESSAGE: Possible unnecessary 'out of memory' message
#77: FILE: drivers/gpu/drm/i915/display/intel_dmc.c:488:
if (!dmc->dmc_payload) {
+ drm_err(&i915->drm, "Memory allocation failed for dmc payload\n");
-:105: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#105: FILE: drivers/gpu/drm/i915/display/intel_dmc.c:523:
+ drm_err(&i915->drm, "DMC firmware has unknown header version %u\n",
package_header->header_ver);
-:143: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#143: FILE: drivers/gpu/drm/i915/display/intel_dmc.c:568:
{
+
total: 0 errors, 1 warnings, 3 checks, 128 lines checked
141fc1f5685d drm/i915/dmc: Add intel_dmc_has_payload() helper
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for More DMC cleanup
2021-05-20 18:36 [Intel-gfx] [PATCH 0/2] More DMC cleanup Anusha Srivatsa
` (2 preceding siblings ...)
2021-05-20 18:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DMC cleanup Patchwork
@ 2021-05-20 19:16 ` Patchwork
3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2021-05-20 19:16 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 4665 bytes --]
== Series Details ==
Series: More DMC cleanup
URL : https://patchwork.freedesktop.org/series/90379/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10113 -> Patchwork_20164
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20164/index.html
Known issues
------------
Here are the changes found in Patchwork_20164 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600: [PASS][1] -> [INCOMPLETE][2] ([i915#2782])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10113/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20164/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-bdw-5557u: NOTRUN -> [SKIP][3] ([fdo#109271]) +3 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20164/fi-bdw-5557u/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u: NOTRUN -> [SKIP][4] ([fdo#109271] / [fdo#111827]) +8 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20164/fi-bdw-5557u/igt@kms_chamelium@dp-crc-fast.html
#### Possible fixes ####
* igt@i915_selftest@live@hangcheck:
- {fi-hsw-gt1}: [DMESG-WARN][5] ([i915#3303]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10113/fi-hsw-gt1/igt@i915_selftest@live@hangcheck.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20164/fi-hsw-gt1/igt@i915_selftest@live@hangcheck.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [DMESG-WARN][7] ([i915#2868]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10113/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20164/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
#### Warnings ####
* igt@runner@aborted:
- fi-skl-6600u: [FAIL][9] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][10] ([i915#1436] / [i915#3363])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10113/fi-skl-6600u/igt@runner@aborted.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20164/fi-skl-6600u/igt@runner@aborted.html
- fi-glk-dsi: [FAIL][11] ([i915#2426] / [i915#3363] / [k.org#202321]) -> [FAIL][12] ([i915#3363] / [k.org#202321])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10113/fi-glk-dsi/igt@runner@aborted.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20164/fi-glk-dsi/igt@runner@aborted.html
- fi-kbl-soraka: [FAIL][13] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][14] ([i915#1436] / [i915#3363])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10113/fi-kbl-soraka/igt@runner@aborted.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20164/fi-kbl-soraka/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782
[i915#2868]: https://gitlab.freedesktop.org/drm/intel/issues/2868
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321
Participating hosts (42 -> 39)
------------------------------
Missing (3): fi-bsw-cyan fi-bdw-samus fi-hsw-4200u
Build changes
-------------
* Linux: CI_DRM_10113 -> Patchwork_20164
CI-20190529: 20190529
CI_DRM_10113: 7a90018e59889ff846d0b9ec9fa4cad75ef978d7 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6089: 698613116728db5000759e69c074ce6ab2131765 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_20164: 141fc1f5685d30522a896a1f08a96ddfdef37204 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
141fc1f5685d drm/i915/dmc: Add intel_dmc_has_payload() helper
a52e01980968 drm/i915/dmc: s/DRM_ERROR/drm_err
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20164/index.html
[-- Attachment #1.2: Type: text/html, Size: 6233 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/dmc: s/DRM_ERROR/drm_err
2021-05-20 18:36 ` [Intel-gfx] [PATCH 1/2] drm/i915/dmc: s/DRM_ERROR/drm_err Anusha Srivatsa
@ 2021-05-20 20:42 ` Lucas De Marchi
0 siblings, 0 replies; 7+ messages in thread
From: Lucas De Marchi @ 2021-05-20 20:42 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
On Thu, May 20, 2021 at 11:36:07AM -0700, Anusha Srivatsa wrote:
>Use new format of debug messages across intel_csr.
>
>While at it, change some function definitions which now
>need dev_priv for drm_err and drm_info etc.
>
>v2: use container_of() (Jani)
>
>Cc: Jani Nikula <jani.nikula@linux.intel.com>
>Suggested-by: Lucas De Marchi <lucas.demarchi@intel.com>
>Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
`git show -U0 --word-diff=color` + `git grep` say you covered them
all, but you also need to fix checkpatch (it's a great idea to run it
locally when doing changes like this:
dim checkpatch origin/drm-tip
With checkpatch fixed,
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Lucas De Marchi
>---
> drivers/gpu/drm/i915/display/intel_dmc.c | 39 ++++++++++++++----------
> 1 file changed, 23 insertions(+), 16 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
>index 560574dd929a..d71758cd0b18 100644
>--- a/drivers/gpu/drm/i915/display/intel_dmc.c
>+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>@@ -400,6 +400,8 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc,
> u32 mmio_count, mmio_count_max;
> u8 *payload;
>
>+ struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc);
>+
> BUILD_BUG_ON(ARRAY_SIZE(dmc->mmioaddr) < DMC_V3_MAX_MMIO_COUNT ||
> ARRAY_SIZE(dmc->mmioaddr) < DMC_V1_MAX_MMIO_COUNT);
>
>@@ -439,28 +441,28 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc,
> header_len_bytes = dmc_header->header_len;
> dmc_header_size = sizeof(*v1);
> } else {
>- DRM_ERROR("Unknown DMC fw header version: %u\n",
>+ drm_err(&i915->drm, "Unknown DMC fw header version: %u\n",
> dmc_header->header_ver);
> return 0;
> }
>
> if (header_len_bytes != dmc_header_size) {
>- DRM_ERROR("DMC firmware has wrong dmc header length "
>+ drm_err(&i915->drm, "DMC firmware has wrong dmc header length "
> "(%u bytes)\n", header_len_bytes);
> return 0;
> }
>
> /* Cache the dmc header info. */
> if (mmio_count > mmio_count_max) {
>- DRM_ERROR("DMC firmware has wrong mmio count %u\n", mmio_count);
>+ drm_err(&i915->drm, "DMC firmware has wrong mmio count %u\n", mmio_count);
> return 0;
> }
>
> for (i = 0; i < mmio_count; i++) {
> if (mmioaddr[i] < DMC_MMIO_START_RANGE ||
> mmioaddr[i] > DMC_MMIO_END_RANGE) {
>- DRM_ERROR("DMC firmware has wrong mmio address 0x%x\n",
>- mmioaddr[i]);
>+ drm_err(&i915->drm, "DMC firmware has wrong mmio address 0x%x\n",
>+ mmioaddr[i]);
> return 0;
> }
> dmc->mmioaddr[i] = _MMIO(mmioaddr[i]);
>@@ -476,14 +478,14 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc,
> goto error_truncated;
>
> if (payload_size > dmc->max_fw_size) {
>- DRM_ERROR("DMC FW too big (%u bytes)\n", payload_size);
>+ drm_err(&i915->drm, "DMC FW too big (%u bytes)\n", payload_size);
> return 0;
> }
> dmc->dmc_fw_size = dmc_header->fw_size;
>
> dmc->dmc_payload = kmalloc(payload_size, GFP_KERNEL);
> if (!dmc->dmc_payload) {
>- DRM_ERROR("Memory allocation failed for dmc payload\n");
>+ drm_err(&i915->drm, "Memory allocation failed for dmc payload\n");
> return 0;
> }
>
>@@ -493,7 +495,7 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc,
> return header_len_bytes + payload_size;
>
> error_truncated:
>- DRM_ERROR("Truncated DMC firmware, refusing.\n");
>+ drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n");
> return 0;
> }
>
>@@ -507,6 +509,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc,
> u32 num_entries, max_entries, dmc_offset;
> const struct intel_fw_info *fw_info;
>
>+ struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc);
>+
> if (rem_size < package_size)
> goto error_truncated;
>
>@@ -515,7 +519,7 @@ parse_dmc_fw_package(struct intel_dmc *dmc,
> } else if (package_header->header_ver == 2) {
> max_entries = PACKAGE_V2_MAX_FW_INFO_ENTRIES;
> } else {
>- DRM_ERROR("DMC firmware has unknown header version %u\n",
>+ drm_err(&i915->drm, "DMC firmware has unknown header version %u\n",
> package_header->header_ver);
> return 0;
> }
>@@ -529,8 +533,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc,
> goto error_truncated;
>
> if (package_header->header_len * 4 != package_size) {
>- DRM_ERROR("DMC firmware has wrong package header length "
>- "(%u bytes)\n", package_size);
>+ drm_err(&i915->drm, "DMC firmware has wrong package header length "
>+ "(%u bytes)\n", package_size);
> return 0;
> }
>
>@@ -543,8 +547,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc,
> dmc_offset = find_dmc_fw_offset(fw_info, num_entries, si,
> package_header->header_ver);
> if (dmc_offset == DMC_DEFAULT_FW_OFFSET) {
>- DRM_ERROR("DMC firmware not supported for %c stepping\n",
>- si->stepping);
>+ drm_err(&i915->drm, "DMC firmware not supported for %c stepping\n",
>+ si->stepping);
> return 0;
> }
>
>@@ -552,7 +556,7 @@ parse_dmc_fw_package(struct intel_dmc *dmc,
> return package_size + dmc_offset * 4;
>
> error_truncated:
>- DRM_ERROR("Truncated DMC firmware, refusing.\n");
>+ drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n");
> return 0;
> }
>
>@@ -561,14 +565,17 @@ static u32 parse_dmc_fw_css(struct intel_dmc *dmc,
> struct intel_css_header *css_header,
> size_t rem_size)
> {
>+
>+ struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc);
>+
> if (rem_size < sizeof(struct intel_css_header)) {
>- DRM_ERROR("Truncated DMC firmware, refusing.\n");
>+ drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n");
> return 0;
> }
>
> if (sizeof(struct intel_css_header) !=
> (css_header->header_len * 4)) {
>- DRM_ERROR("DMC firmware has wrong CSS header length "
>+ drm_err(&i915->drm, "DMC firmware has wrong CSS header length "
> "(%u bytes)\n",
> (css_header->header_len * 4));
> return 0;
>--
>2.25.0
>
>_______________________________________________
>Intel-gfx mailing list
>Intel-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/dmc: Add intel_dmc_has_payload() helper
2021-05-20 18:36 ` [Intel-gfx] [PATCH 2/2] drm/i915/dmc: Add intel_dmc_has_payload() helper Anusha Srivatsa
@ 2021-05-20 20:45 ` Lucas De Marchi
0 siblings, 0 replies; 7+ messages in thread
From: Lucas De Marchi @ 2021-05-20 20:45 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
On Thu, May 20, 2021 at 11:36:08AM -0700, Anusha Srivatsa wrote:
>We check for dmc_payload being there at various points in the driver.
>Replace it with the helper.
>
>v2: rebased.
>
>Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>---
> .../drm/i915/display/intel_display_debugfs.c | 4 ++--
> .../drm/i915/display/intel_display_power.c | 16 +++++++-------
> drivers/gpu/drm/i915/display/intel_dmc.c | 13 +++++++----
> drivers/gpu/drm/i915/display/intel_dmc.h | 22 +++++++++++++++++++
> drivers/gpu/drm/i915/i915_drv.h | 18 +--------------
> drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
> 6 files changed, 43 insertions(+), 32 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>index 94e5cbd86e77..88bb05d5c483 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>@@ -542,10 +542,10 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
>
> wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
>
>- seq_printf(m, "fw loaded: %s\n", yesno(dmc->dmc_payload));
>+ seq_printf(m, "fw loaded: %s\n", yesno(intel_dmc_has_payload(dev_priv)));
> seq_printf(m, "path: %s\n", dmc->fw_path);
>
>- if (!dmc->dmc_payload)
>+ if (!intel_dmc_has_payload(dev_priv))
> goto out;
>
> seq_printf(m, "version: %d.%d\n", DMC_VERSION_MAJOR(dmc->version),
>diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
>index 991ceea06a07..b546672c9b00 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_power.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
>@@ -1220,7 +1220,7 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,
> static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
> struct i915_power_well *power_well)
> {
>- if (!dev_priv->dmc.dmc_payload)
>+ if (!intel_dmc_has_payload(dev_priv))
> return;
>
> switch (dev_priv->dmc.target_dc_state) {
>@@ -5579,7 +5579,7 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv,
>
> gen9_dbuf_enable(dev_priv);
>
>- if (resume && dev_priv->dmc.dmc_payload)
>+ if (resume && intel_dmc_has_payload(dev_priv))
> intel_dmc_load_program(dev_priv);
> }
>
>@@ -5646,7 +5646,7 @@ static void bxt_display_core_init(struct drm_i915_private *dev_priv, bool resume
>
> gen9_dbuf_enable(dev_priv);
>
>- if (resume && dev_priv->dmc.dmc_payload)
>+ if (resume && intel_dmc_has_payload(dev_priv))
> intel_dmc_load_program(dev_priv);
> }
>
>@@ -5712,7 +5712,7 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume
> /* 6. Enable DBUF */
> gen9_dbuf_enable(dev_priv);
>
>- if (resume && dev_priv->dmc.dmc_payload)
>+ if (resume && intel_dmc_has_payload(dev_priv))
> intel_dmc_load_program(dev_priv);
> }
>
>@@ -5869,7 +5869,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
> if (DISPLAY_VER(dev_priv) >= 12)
> tgl_bw_buddy_init(dev_priv);
>
>- if (resume && dev_priv->dmc.dmc_payload)
>+ if (resume && intel_dmc_has_payload(dev_priv))
> intel_dmc_load_program(dev_priv);
>
> /* Wa_14011508470 */
>@@ -6230,7 +6230,7 @@ void intel_power_domains_suspend(struct drm_i915_private *i915,
> */
> if (!(i915->dmc.allowed_dc_mask & DC_STATE_EN_DC9) &&
> suspend_mode == I915_DRM_SUSPEND_IDLE &&
>- i915->dmc.dmc_payload) {
>+ intel_dmc_has_payload(i915)) {
> intel_display_power_flush_work(i915);
> intel_power_domains_verify_state(i915);
> return;
>@@ -6420,7 +6420,7 @@ void intel_display_power_resume(struct drm_i915_private *i915)
> if (DISPLAY_VER(i915) >= 11) {
> bxt_disable_dc9(i915);
> icl_display_core_init(i915, true);
>- if (i915->dmc.dmc_payload) {
>+ if (intel_dmc_has_payload(i915)) {
> if (i915->dmc.allowed_dc_mask &
> DC_STATE_EN_UPTO_DC6)
> skl_enable_dc6(i915);
>@@ -6431,7 +6431,7 @@ void intel_display_power_resume(struct drm_i915_private *i915)
> } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) {
> bxt_disable_dc9(i915);
> bxt_display_core_init(i915, true);
>- if (i915->dmc.dmc_payload &&
>+ if (intel_dmc_has_payload(i915) &&
> (i915->dmc.allowed_dc_mask & DC_STATE_EN_UPTO_DC5))
> gen9_enable_dc5(i915);
> } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
>diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
>index d71758cd0b18..a663d1df8962 100644
>--- a/drivers/gpu/drm/i915/display/intel_dmc.c
>+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>@@ -237,6 +237,11 @@ struct stepping_info {
> char substepping;
> };
>
>+bool intel_dmc_has_payload(struct drm_i915_private *dev_priv)
>+{
>+ return dev_priv->dmc.dmc_payload;
>+}
>+
> static const struct stepping_info skl_stepping_info[] = {
> {'A', '0'}, {'B', '0'}, {'C', '0'},
> {'D', '0'}, {'E', '0'}, {'F', '0'},
>@@ -320,7 +325,7 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv)
> return;
> }
>
>- if (!dev_priv->dmc.dmc_payload) {
>+ if (!intel_dmc_has_payload(dev_priv)) {
> drm_err(&dev_priv->drm,
> "Tried to program CSR with empty payload\n");
> return;
>@@ -659,7 +664,7 @@ static void dmc_load_work_fn(struct work_struct *work)
> request_firmware(&fw, dev_priv->dmc.fw_path, dev_priv->drm.dev);
> parse_dmc_fw(dev_priv, fw);
>
>- if (dev_priv->dmc.dmc_payload) {
>+ if (intel_dmc_has_payload(dev_priv)) {
> intel_dmc_load_program(dev_priv);
> intel_dmc_runtime_pm_put(dev_priv);
>
>@@ -788,7 +793,7 @@ void intel_dmc_ucode_suspend(struct drm_i915_private *dev_priv)
> flush_work(&dev_priv->dmc.work);
>
> /* Drop the reference held in case DMC isn't loaded. */
>- if (!dev_priv->dmc.dmc_payload)
>+ if (!intel_dmc_has_payload(dev_priv))
> intel_dmc_runtime_pm_put(dev_priv);
> }
>
>@@ -808,7 +813,7 @@ void intel_dmc_ucode_resume(struct drm_i915_private *dev_priv)
> * Reacquire the reference to keep RPM disabled in case DMC isn't
> * loaded.
> */
>- if (!dev_priv->dmc.dmc_payload)
>+ if (!intel_dmc_has_payload(dev_priv))
> intel_dmc_runtime_pm_get(dev_priv);
> }
>
>diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h
>index 57dd99da0ced..8baeb85cf8db 100644
>--- a/drivers/gpu/drm/i915/display/intel_dmc.h
>+++ b/drivers/gpu/drm/i915/display/intel_dmc.h
>@@ -6,16 +6,38 @@
> #ifndef __INTEL_DMC_H__
> #define __INTEL_DMC_H__
>
>+#include <drm/drm_util.h>
>+#include "intel_wakeref.h"
>+#include "i915_reg.h"
>+
> struct drm_i915_private;
>
> #define DMC_VERSION(major, minor) ((major) << 16 | (minor))
> #define DMC_VERSION_MAJOR(version) ((version) >> 16)
> #define DMC_VERSION_MINOR(version) ((version) & 0xffff)
>
>+struct intel_dmc {
>+ struct work_struct work;
>+ const char *fw_path;
>+ u32 required_version;
>+ u32 max_fw_size; /* bytes */
>+ u32 *dmc_payload;
>+ u32 dmc_fw_size; /* dwords */
>+ u32 version;
>+ u32 mmio_count;
>+ i915_reg_t mmioaddr[20];
>+ u32 mmiodata[20];
>+ u32 dc_state;
>+ u32 target_dc_state;
>+ u32 allowed_dc_mask;
>+ intel_wakeref_t wakeref;
>+};
this move doesn't belong here, should be in a separate patch.
With this removed,
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
thanks
Lucas De Marchi
>+
> void intel_dmc_ucode_init(struct drm_i915_private *i915);
> void intel_dmc_load_program(struct drm_i915_private *i915);
> void intel_dmc_ucode_fini(struct drm_i915_private *i915);
> void intel_dmc_ucode_suspend(struct drm_i915_private *i915);
> void intel_dmc_ucode_resume(struct drm_i915_private *i915);
>+bool intel_dmc_has_payload(struct drm_i915_private *i915);
>
> #endif /* __INTEL_DMC_H__ */
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index 9cb02618ba15..b5962768a1f1 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -67,6 +67,7 @@
> #include "display/intel_bios.h"
> #include "display/intel_display.h"
> #include "display/intel_display_power.h"
>+#include "display/intel_dmc.h"
> #include "display/intel_dpll_mgr.h"
> #include "display/intel_dsb.h"
> #include "display/intel_frontbuffer.h"
>@@ -328,23 +329,6 @@ struct drm_i915_display_funcs {
> void (*read_luts)(struct intel_crtc_state *crtc_state);
> };
>
>-struct intel_dmc {
>- struct work_struct work;
>- const char *fw_path;
>- u32 required_version;
>- u32 max_fw_size; /* bytes */
>- u32 *dmc_payload;
>- u32 dmc_fw_size; /* dwords */
>- u32 version;
>- u32 mmio_count;
>- i915_reg_t mmioaddr[20];
>- u32 mmiodata[20];
>- u32 dc_state;
>- u32 target_dc_state;
>- u32 allowed_dc_mask;
>- intel_wakeref_t wakeref;
>-};
>-
> enum i915_cache_level {
> I915_CACHE_NONE = 0,
> I915_CACHE_LLC, /* also used for snoopable memory on non-LLC */
>diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
>index 8b964e355cb5..833d3e8b7631 100644
>--- a/drivers/gpu/drm/i915/i915_gpu_error.c
>+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
>@@ -792,7 +792,7 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
> struct intel_dmc *dmc = &m->i915->dmc;
>
> err_printf(m, "DMC loaded: %s\n",
>- yesno(dmc->dmc_payload));
>+ yesno(intel_dmc_has_payload(m->i915) != 0));
> err_printf(m, "DMC fw version: %d.%d\n",
> DMC_VERSION_MAJOR(dmc->version),
> DMC_VERSION_MINOR(dmc->version));
>--
>2.25.0
>
>_______________________________________________
>Intel-gfx mailing list
>Intel-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2021-05-20 20:44 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-05-20 18:36 [Intel-gfx] [PATCH 0/2] More DMC cleanup Anusha Srivatsa
2021-05-20 18:36 ` [Intel-gfx] [PATCH 1/2] drm/i915/dmc: s/DRM_ERROR/drm_err Anusha Srivatsa
2021-05-20 20:42 ` Lucas De Marchi
2021-05-20 18:36 ` [Intel-gfx] [PATCH 2/2] drm/i915/dmc: Add intel_dmc_has_payload() helper Anusha Srivatsa
2021-05-20 20:45 ` Lucas De Marchi
2021-05-20 18:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DMC cleanup Patchwork
2021-05-20 19:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
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