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From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>
Subject: [PATCH v2 07/11] powerpc/64s: save one more register in the masked interrupt handler
Date: Fri, 21 May 2021 21:44:18 +1000	[thread overview]
Message-ID: <20210521114422.3179350-8-npiggin@gmail.com> (raw)
In-Reply-To: <20210521114422.3179350-1-npiggin@gmail.com>

This frees up one more register (and takes advantage of that to
clean things up a little bit).

This register will be used in the following patch.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arch/powerpc/kernel/exceptions-64s.S | 34 ++++++++++++++++------------
 1 file changed, 20 insertions(+), 14 deletions(-)

diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index b6e1c46c97d0..0ba8c2387aac 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -2758,7 +2758,6 @@ INT_DEFINE_END(soft_nmi)
  * and run it entirely with interrupts hard disabled.
  */
 EXC_COMMON_BEGIN(soft_nmi_common)
-	mfspr	r11,SPRN_SRR0
 	mr	r10,r1
 	ld	r1,PACAEMERGSP(r13)
 	subi	r1,r1,INT_FRAME_SIZE
@@ -2793,19 +2792,24 @@ masked_Hinterrupt:
 	.else
 masked_interrupt:
 	.endif
-	lbz	r11,PACAIRQHAPPENED(r13)
-	or	r11,r11,r10
-	stb	r11,PACAIRQHAPPENED(r13)
+	stw	r9,PACA_EXGEN+EX_CCR(r13)
+	lbz	r9,PACAIRQHAPPENED(r13)
+	or	r9,r9,r10
+	stb	r9,PACAIRQHAPPENED(r13)
+
+	.if ! \hsrr
 	cmpwi	r10,PACA_IRQ_DEC
 	bne	1f
-	lis	r10,0x7fff
-	ori	r10,r10,0xffff
-	mtspr	SPRN_DEC,r10
+	LOAD_REG_IMMEDIATE(r9, 0x7fffffff)
+	mtspr	SPRN_DEC,r9
 #ifdef CONFIG_PPC_WATCHDOG
+	lwz	r9,PACA_EXGEN+EX_CCR(r13)
 	b	soft_nmi_common
 #else
 	b	2f
 #endif
+	.endif
+
 1:	andi.	r10,r10,PACA_IRQ_MUST_HARD_MASK
 	beq	2f
 	xori	r12,r12,MSR_EE	/* clear MSR_EE */
@@ -2814,17 +2818,19 @@ masked_interrupt:
 	.else
 	mtspr	SPRN_SRR1,r12
 	.endif
-	ori	r11,r11,PACA_IRQ_HARD_DIS
-	stb	r11,PACAIRQHAPPENED(r13)
+	ori	r9,r9,PACA_IRQ_HARD_DIS
+	stb	r9,PACAIRQHAPPENED(r13)
 2:	/* done */
-	li	r10,0
+	li	r9,0
 	.if \hsrr
-	stb	r10,PACAHSRR_VALID(r13)
+	stb	r9,PACAHSRR_VALID(r13)
 	.else
-	stb	r10,PACASRR_VALID(r13)
+	stb	r9,PACASRR_VALID(r13)
 	.endif
-	ld	r10,PACA_EXGEN+EX_CTR(r13)
-	mtctr	r10
+
+	ld	r9,PACA_EXGEN+EX_CTR(r13)
+	mtctr	r9
+	lwz	r9,PACA_EXGEN+EX_CCR(r13)
 	mtcrf	0x80,r9
 	std	r1,PACAR1(r13)
 	ld	r9,PACA_EXGEN+EX_R9(r13)
-- 
2.23.0


  parent reply	other threads:[~2021-05-21 11:48 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-21 11:44 [PATCH v2 00/11] powerpc/64: fast interrupt exits Nicholas Piggin
2021-05-21 11:44 ` [PATCH v2 01/11] powerpc: remove interrupt exit helpers unused argument Nicholas Piggin
2021-05-21 17:46   ` Christophe Leroy
2021-05-21 11:44 ` [PATCH v2 02/11] powerpc/64s: introduce different functions to return from SRR vs HSRR interrupts Nicholas Piggin
2021-05-21 11:44 ` [PATCH v2 03/11] powerpc/64s: avoid reloading (H)SRR registers if they are still valid Nicholas Piggin
2021-05-21 11:44 ` [PATCH v2 04/11] powerpc/64: handle MSR EE and RI in interrupt entry wrapper Nicholas Piggin
2021-05-21 11:44 ` [PATCH v2 05/11] powerpc/64: move interrupt return asm to interrupt_64.S Nicholas Piggin
2021-05-21 11:44 ` [PATCH v2 06/11] powerpc/64s: system call avoid setting MSR[RI] until we set MSR[EE] Nicholas Piggin
2021-05-21 11:44 ` Nicholas Piggin [this message]
2021-05-21 11:44 ` [PATCH v2 08/11] powerpc/64: allow alternate return locations for soft-masked interrupts Nicholas Piggin
2021-05-21 11:44 ` [PATCH v2 09/11] powerpc/64: interrupt soft-enable race fix Nicholas Piggin
2021-05-21 11:44 ` [PATCH v2 10/11] powerpc/64: treat low kernel text as irqs soft-masked Nicholas Piggin
2021-05-21 11:44 ` [PATCH v2 11/11] powerpc/64: use interrupt restart table to speed up return from interrupt Nicholas Piggin

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