From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E31BAC47084 for ; Tue, 25 May 2021 02:09:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BDF3D61402 for ; Tue, 25 May 2021 02:09:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230081AbhEYCK3 (ORCPT ); Mon, 24 May 2021 22:10:29 -0400 Received: from twspam01.aspeedtech.com ([211.20.114.71]:20394 "EHLO twspam01.aspeedtech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229550AbhEYCK2 (ORCPT ); Mon, 24 May 2021 22:10:28 -0400 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 14P1tNUP007863; Tue, 25 May 2021 09:55:23 +0800 (GMT-8) (envelope-from jamin_lin@aspeedtech.com) Received: from aspeedtech.com (192.168.100.253) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 25 May 2021 10:08:20 +0800 Date: Tue, 25 May 2021 10:08:18 +0800 From: Jamin Lin To: Zev Weiss CC: Rob Herring , Joel Stanley , "Andrew Jeffery" , Brendan Higgins , Benjamin Herrenschmidt , "open list:I2C SUBSYSTEM HOST DRIVERS" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , open list , "moderated list:ARM/ASPEED I2C DRIVER" , Steven Lee , ChiaWei Wang , Troy Lee , Ryan Chen Subject: Re: [PATCH 1/3] i2c: aspeed: avoid new registers definition of AST2600 Message-ID: <20210525020817.GB2489@aspeedtech.com> References: <20210519080436.18975-1-jamin_lin@aspeedtech.com> <20210519080436.18975-2-jamin_lin@aspeedtech.com> <20210524020846.GB2591@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-Originating-IP: [192.168.100.253] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 14P1tNUP007863 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The 05/24/2021 21:16, Zev Weiss wrote: > On Sun, May 23, 2021 at 09:08:47PM CDT, Jamin Lin wrote: > >The 05/19/2021 19:02, Zev Weiss wrote: > >> On Wed, May 19, 2021 at 03:04:27AM CDT, Jamin Lin wrote: > >> >The register definition between AST2600 A2 and A3 is different. > >> >This patch avoid new registers definition of AST2600 to use > >> >this driver. We will submit the path for the new registers > >> >definition of AST2600. > >> > > >> >Signed-off-by: Jamin Lin > >> >--- > >> > drivers/i2c/busses/i2c-aspeed.c | 22 ++++++++++++++++++++++ > >> > 1 file changed, 22 insertions(+) > >> > > >> >diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c > >> >index 724bf30600d6..007309077d9f 100644 > >> >--- a/drivers/i2c/busses/i2c-aspeed.c > >> >+++ b/drivers/i2c/busses/i2c-aspeed.c > >> >@@ -19,14 +19,20 @@ > >> > #include > >> > #include > >> > #include > >> >+#include > >> > #include > >> > #include > >> > #include > >> > #include > >> > #include > >> >+#include > >> > #include > >> > #include > >> > > >> >+/* I2C Global Registers */ > >> >+/* 0x0c : I2CG Global Control Register (AST2500) */ > >> >+#define ASPEED_I2CG_GLOBAL_CTRL_REG 0x0c > >> >+ > >> > /* I2C Register */ > >> > #define ASPEED_I2C_FUN_CTRL_REG 0x00 > >> > #define ASPEED_I2C_AC_TIMING_REG1 0x04 > >> >@@ -973,6 +979,22 @@ static int aspeed_i2c_probe_bus(struct platform_device *pdev) > >> > struct resource *res; > >> > int irq, ret; > >> > > >> >+ if (of_device_is_compatible(pdev->dev.of_node, > >> >+ "aspeed,ast2600-i2c-bus")) { > >> >+ u32 global_ctrl; > >> >+ struct regmap *gr_regmap; > >> >+ > >> >+ gr_regmap = syscon_regmap_lookup_by_compatible("aspeed,ast2600-i2c-global"); > >> >+ > >> >+ if (IS_ERR(gr_regmap)) { > >> >+ ret = PTR_ERR(gr_regmap); > >> >+ } else { > >> >+ regmap_read(gr_regmap, ASPEED_I2CG_GLOBAL_CTRL_REG, &global_ctrl); > >> >+ if (global_ctrl & BIT(2)) > >> >+ return -EIO; > >> > >> A macro definition might be a bit nicer than a raw BIT(2) here I'd > >> think. > >Will modify > >> > >> Also, it seems a bit unfortunate to just bail on the device entirely if > >> we find this bit set (seems like a good way for a bootloader to > >> inadvertently DoS the kernel), though I guess poking global syscon bits > >> in the bus probe function might not be ideal. Could/should we consider > >> some module-level init code to ensure that bit is cleared? > >> > >> > >We use syscon API to get the global register of i2c not the specific i2c > >bus. > >Can you describe it more detail? > > Sure -- I just meant that if for whatever reason the kernel is booting > on a system that's had that syscon bit set to enable the new register > access mode (e.g. by a newer bootloader or something), it seems like > we'd just give up entirely on enabling any i2c busses, when as far as I > know there shouldn't be anything stopping us from resetting the bit back > to be in the state this driver needs it to be in (old register mode) and > then continuing along normally. > > > Zev Thanks for your suggestion. I will submit the new i2c driver for AST2600. Jamin From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D25BC2B9F7 for ; Tue, 25 May 2021 02:09:21 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D0F3D61402 for ; Tue, 25 May 2021 02:09:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D0F3D61402 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aspeedtech.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=openbmc-bounces+openbmc=archiver.kernel.org@lists.ozlabs.org Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4FpyFC1Ff3z309N for ; Tue, 25 May 2021 12:09:19 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=fail (SPF fail - not authorized) smtp.mailfrom=aspeedtech.com (client-ip=211.20.114.71; helo=twspam01.aspeedtech.com; envelope-from=jamin_lin@aspeedtech.com; receiver=) Received: from twspam01.aspeedtech.com (twspam01.aspeedtech.com [211.20.114.71]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4FpyDn5rZvz2yXd; Tue, 25 May 2021 12:08:56 +1000 (AEST) Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 14P1tNUP007863; Tue, 25 May 2021 09:55:23 +0800 (GMT-8) (envelope-from jamin_lin@aspeedtech.com) Received: from aspeedtech.com (192.168.100.253) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 25 May 2021 10:08:20 +0800 Date: Tue, 25 May 2021 10:08:18 +0800 From: Jamin Lin To: Zev Weiss Subject: Re: [PATCH 1/3] i2c: aspeed: avoid new registers definition of AST2600 Message-ID: <20210525020817.GB2489@aspeedtech.com> References: <20210519080436.18975-1-jamin_lin@aspeedtech.com> <20210519080436.18975-2-jamin_lin@aspeedtech.com> <20210524020846.GB2591@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-Originating-IP: [192.168.100.253] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 14P1tNUP007863 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Ryan Chen , "moderated list:ARM/ASPEED MACHINE SUPPORT" , Andrew Jeffery , "moderated list:ARM/ASPEED I2C DRIVER" , Troy Lee , Brendan Higgins , open list , Rob Herring , Steven Lee , ChiaWei Wang , "moderated list:ARM/ASPEED MACHINE SUPPORT" , "open list:I2C SUBSYSTEM HOST DRIVERS" Errors-To: openbmc-bounces+openbmc=archiver.kernel.org@lists.ozlabs.org Sender: "openbmc" The 05/24/2021 21:16, Zev Weiss wrote: > On Sun, May 23, 2021 at 09:08:47PM CDT, Jamin Lin wrote: > >The 05/19/2021 19:02, Zev Weiss wrote: > >> On Wed, May 19, 2021 at 03:04:27AM CDT, Jamin Lin wrote: > >> >The register definition between AST2600 A2 and A3 is different. > >> >This patch avoid new registers definition of AST2600 to use > >> >this driver. We will submit the path for the new registers > >> >definition of AST2600. > >> > > >> >Signed-off-by: Jamin Lin > >> >--- > >> > drivers/i2c/busses/i2c-aspeed.c | 22 ++++++++++++++++++++++ > >> > 1 file changed, 22 insertions(+) > >> > > >> >diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c > >> >index 724bf30600d6..007309077d9f 100644 > >> >--- a/drivers/i2c/busses/i2c-aspeed.c > >> >+++ b/drivers/i2c/busses/i2c-aspeed.c > >> >@@ -19,14 +19,20 @@ > >> > #include > >> > #include > >> > #include > >> >+#include > >> > #include > >> > #include > >> > #include > >> > #include > >> > #include > >> >+#include > >> > #include > >> > #include > >> > > >> >+/* I2C Global Registers */ > >> >+/* 0x0c : I2CG Global Control Register (AST2500) */ > >> >+#define ASPEED_I2CG_GLOBAL_CTRL_REG 0x0c > >> >+ > >> > /* I2C Register */ > >> > #define ASPEED_I2C_FUN_CTRL_REG 0x00 > >> > #define ASPEED_I2C_AC_TIMING_REG1 0x04 > >> >@@ -973,6 +979,22 @@ static int aspeed_i2c_probe_bus(struct platform_device *pdev) > >> > struct resource *res; > >> > int irq, ret; > >> > > >> >+ if (of_device_is_compatible(pdev->dev.of_node, > >> >+ "aspeed,ast2600-i2c-bus")) { > >> >+ u32 global_ctrl; > >> >+ struct regmap *gr_regmap; > >> >+ > >> >+ gr_regmap = syscon_regmap_lookup_by_compatible("aspeed,ast2600-i2c-global"); > >> >+ > >> >+ if (IS_ERR(gr_regmap)) { > >> >+ ret = PTR_ERR(gr_regmap); > >> >+ } else { > >> >+ regmap_read(gr_regmap, ASPEED_I2CG_GLOBAL_CTRL_REG, &global_ctrl); > >> >+ if (global_ctrl & BIT(2)) > >> >+ return -EIO; > >> > >> A macro definition might be a bit nicer than a raw BIT(2) here I'd > >> think. > >Will modify > >> > >> Also, it seems a bit unfortunate to just bail on the device entirely if > >> we find this bit set (seems like a good way for a bootloader to > >> inadvertently DoS the kernel), though I guess poking global syscon bits > >> in the bus probe function might not be ideal. Could/should we consider > >> some module-level init code to ensure that bit is cleared? > >> > >> > >We use syscon API to get the global register of i2c not the specific i2c > >bus. > >Can you describe it more detail? > > Sure -- I just meant that if for whatever reason the kernel is booting > on a system that's had that syscon bit set to enable the new register > access mode (e.g. by a newer bootloader or something), it seems like > we'd just give up entirely on enabling any i2c busses, when as far as I > know there shouldn't be anything stopping us from resetting the bit back > to be in the state this driver needs it to be in (old register mode) and > then continuing along normally. > > > Zev Thanks for your suggestion. I will submit the new i2c driver for AST2600. Jamin From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.6 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68DC1C2B9F7 for ; Tue, 25 May 2021 03:38:08 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2A004613D8 for ; Tue, 25 May 2021 03:38:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2A004613D8 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aspeedtech.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=1mdamB408MmG0mdp87MlTgmGUf3Bv0XxBqoBMi9PANs=; b=TAPYfk39MgiLkf XFAkALUutTJ/GLgSS+Tz7hdvyHdU/hcqNWMeEA56TxK6KpY2DpFafHsK0APZyNPwtzdAIAVKuTy1P otnHwsIIOIYQPD+/Qe3Ac5ILdXMpx4efoltobdtAyNAXEB5omdXEccNqTtPV8Kl9cPUYr3CVJWvGf TEtdpVvqNo+fIa6pW9ftvl9C0FIXmTyfQajBw7XpZFttSTuR+e+UcIUPKZZi6TY3V8iMpcWe94GsA WE7eFh+XqVc8Wd1GXTCJIa+V1qKWFbCSOCu8ytseV3slZ4GbDt2r7ewxecNFMO6jbuEk10ms7COpK DDHRtkb9teyslAof9cdQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1llNqW-0039rA-4Q; Tue, 25 May 2021 03:35:10 +0000 Received: from twspam01.aspeedtech.com ([211.20.114.71]) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1llMUz-002rGG-4B for linux-arm-kernel@lists.infradead.org; Tue, 25 May 2021 02:08:51 +0000 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 14P1tNUP007863; Tue, 25 May 2021 09:55:23 +0800 (GMT-8) (envelope-from jamin_lin@aspeedtech.com) Received: from aspeedtech.com (192.168.100.253) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 25 May 2021 10:08:20 +0800 Date: Tue, 25 May 2021 10:08:18 +0800 From: Jamin Lin To: Zev Weiss CC: Rob Herring , Joel Stanley , "Andrew Jeffery" , Brendan Higgins , Benjamin Herrenschmidt , "open list:I2C SUBSYSTEM HOST DRIVERS" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , open list , "moderated list:ARM/ASPEED I2C DRIVER" , Steven Lee , ChiaWei Wang , Troy Lee , Ryan Chen Subject: Re: [PATCH 1/3] i2c: aspeed: avoid new registers definition of AST2600 Message-ID: <20210525020817.GB2489@aspeedtech.com> References: <20210519080436.18975-1-jamin_lin@aspeedtech.com> <20210519080436.18975-2-jamin_lin@aspeedtech.com> <20210524020846.GB2591@aspeedtech.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-Originating-IP: [192.168.100.253] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 14P1tNUP007863 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210524_190849_464892_58197781 X-CRM114-Status: GOOD ( 30.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The 05/24/2021 21:16, Zev Weiss wrote: > On Sun, May 23, 2021 at 09:08:47PM CDT, Jamin Lin wrote: > >The 05/19/2021 19:02, Zev Weiss wrote: > >> On Wed, May 19, 2021 at 03:04:27AM CDT, Jamin Lin wrote: > >> >The register definition between AST2600 A2 and A3 is different. > >> >This patch avoid new registers definition of AST2600 to use > >> >this driver. We will submit the path for the new registers > >> >definition of AST2600. > >> > > >> >Signed-off-by: Jamin Lin > >> >--- > >> > drivers/i2c/busses/i2c-aspeed.c | 22 ++++++++++++++++++++++ > >> > 1 file changed, 22 insertions(+) > >> > > >> >diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c > >> >index 724bf30600d6..007309077d9f 100644 > >> >--- a/drivers/i2c/busses/i2c-aspeed.c > >> >+++ b/drivers/i2c/busses/i2c-aspeed.c > >> >@@ -19,14 +19,20 @@ > >> > #include > >> > #include > >> > #include > >> >+#include > >> > #include > >> > #include > >> > #include > >> > #include > >> > #include > >> >+#include > >> > #include > >> > #include > >> > > >> >+/* I2C Global Registers */ > >> >+/* 0x0c : I2CG Global Control Register (AST2500) */ > >> >+#define ASPEED_I2CG_GLOBAL_CTRL_REG 0x0c > >> >+ > >> > /* I2C Register */ > >> > #define ASPEED_I2C_FUN_CTRL_REG 0x00 > >> > #define ASPEED_I2C_AC_TIMING_REG1 0x04 > >> >@@ -973,6 +979,22 @@ static int aspeed_i2c_probe_bus(struct platform_device *pdev) > >> > struct resource *res; > >> > int irq, ret; > >> > > >> >+ if (of_device_is_compatible(pdev->dev.of_node, > >> >+ "aspeed,ast2600-i2c-bus")) { > >> >+ u32 global_ctrl; > >> >+ struct regmap *gr_regmap; > >> >+ > >> >+ gr_regmap = syscon_regmap_lookup_by_compatible("aspeed,ast2600-i2c-global"); > >> >+ > >> >+ if (IS_ERR(gr_regmap)) { > >> >+ ret = PTR_ERR(gr_regmap); > >> >+ } else { > >> >+ regmap_read(gr_regmap, ASPEED_I2CG_GLOBAL_CTRL_REG, &global_ctrl); > >> >+ if (global_ctrl & BIT(2)) > >> >+ return -EIO; > >> > >> A macro definition might be a bit nicer than a raw BIT(2) here I'd > >> think. > >Will modify > >> > >> Also, it seems a bit unfortunate to just bail on the device entirely if > >> we find this bit set (seems like a good way for a bootloader to > >> inadvertently DoS the kernel), though I guess poking global syscon bits > >> in the bus probe function might not be ideal. Could/should we consider > >> some module-level init code to ensure that bit is cleared? > >> > >> > >We use syscon API to get the global register of i2c not the specific i2c > >bus. > >Can you describe it more detail? > > Sure -- I just meant that if for whatever reason the kernel is booting > on a system that's had that syscon bit set to enable the new register > access mode (e.g. by a newer bootloader or something), it seems like > we'd just give up entirely on enabling any i2c busses, when as far as I > know there shouldn't be anything stopping us from resetting the bit back > to be in the state this driver needs it to be in (old register mode) and > then continuing along normally. > > > Zev Thanks for your suggestion. I will submit the new i2c driver for AST2600. Jamin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel