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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id z19sm2231943pjq.11.2021.05.25.08.07.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 May 2021 08:07:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 28/28] softfloat: Use hard-float for {u}int64_to_float{32, 64} Date: Tue, 25 May 2021 08:07:06 -0700 Message-Id: <20210525150706.294968-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210525150706.294968-1-richard.henderson@linaro.org> References: <20210525150706.294968-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, david@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" For the normal case of no additional scaling, this reduces the profile contribution of int64_to_float64 to the testcase in the linked issue from 0.81% to 0.04%. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/134 Signed-off-by: Richard Henderson --- fpu/softfloat.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index b0df5b6dc5..79b2205070 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -3559,6 +3559,13 @@ float32 int64_to_float32_scalbn(int64_t a, int scale, float_status *status) { FloatParts64 p; + /* Without scaling, there are no overflow concerns. */ + if (likely(scale == 0) && can_use_fpu(status)) { + union_float32 ur; + ur.h = a; + return ur.s; + } + parts64_sint_to_float(&p, a, scale, status); return float32_round_pack_canonical(&p, status); } @@ -3592,6 +3599,13 @@ float64 int64_to_float64_scalbn(int64_t a, int scale, float_status *status) { FloatParts64 p; + /* Without scaling, there are no overflow concerns. */ + if (likely(scale == 0) && can_use_fpu(status)) { + union_float64 ur; + ur.h = a; + return ur.s; + } + parts_sint_to_float(&p, a, scale, status); return float64_round_pack_canonical(&p, status); } @@ -3726,6 +3740,13 @@ float32 uint64_to_float32_scalbn(uint64_t a, int scale, float_status *status) { FloatParts64 p; + /* Without scaling, there are no overflow concerns. */ + if (likely(scale == 0) && can_use_fpu(status)) { + union_float32 ur; + ur.h = a; + return ur.s; + } + parts_uint_to_float(&p, a, scale, status); return float32_round_pack_canonical(&p, status); } @@ -3759,6 +3780,13 @@ float64 uint64_to_float64_scalbn(uint64_t a, int scale, float_status *status) { FloatParts64 p; + /* Without scaling, there are no overflow concerns. */ + if (likely(scale == 0) && can_use_fpu(status)) { + union_float64 ur; + ur.h = a; + return ur.s; + } + parts_uint_to_float(&p, a, scale, status); return float64_round_pack_canonical(&p, status); } -- 2.25.1