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From: Alex Bee <knaerzche@gmail.com>
To: Ezequiel Garcia <ezequiel@collabora.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Lee Jones <lee.jones@linaro.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
	devicetree@vger.kernel.org
Cc: Alex Bee <knaerzche@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 09/12] ARM: dts: rockchip: add power controller for RK322x
Date: Thu, 27 May 2021 17:44:52 +0200	[thread overview]
Message-ID: <20210527154455.358869-10-knaerzche@gmail.com> (raw)
In-Reply-To: <20210527154455.358869-1-knaerzche@gmail.com>

Add the power controller node and the correspondending qos nodes for
RK322x.
Also add the power-domain property to the nodes that are already
present.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
---

 Changes in v2:
 - moved power node to appropriate position
 - added #power-domain-cells for RK3228_PD_GPU
 - moved power-domains property after iommous property

 arch/arm/boot/dts/rk322x.dtsi | 113 ++++++++++++++++++++++++++++++++++
 1 file changed, 113 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 5774bc309eb7..42033909c606 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/clock/rk3228-cru.h>
 #include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/power/rk3228-power.h>
 
 / {
 	#address-cells = <1>;
@@ -190,6 +191,65 @@ io_domains: io-domains {
 			status = "disabled";
 		};
 
+		power: power-controller {
+			compatible = "rockchip,rk3228-power-controller";
+			#power-domain-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			power-domain@RK3228_PD_VIO {
+				reg = <RK3228_PD_VIO>;
+				clocks = <&cru ACLK_HDCP>,
+					 <&cru SCLK_HDCP>,
+					 <&cru ACLK_IEP>,
+					 <&cru HCLK_IEP>,
+					 <&cru ACLK_RGA>,
+					 <&cru HCLK_RGA>,
+					 <&cru SCLK_RGA>;
+				pm_qos = <&qos_hdcp>,
+					 <&qos_iep>,
+					 <&qos_rga_r>,
+					 <&qos_rga_w>;
+				#power-domain-cells = <0>;
+			};
+
+			power-domain@RK3228_PD_VOP {
+				reg = <RK3228_PD_VOP>;
+				clocks =<&cru ACLK_VOP>,
+					<&cru DCLK_VOP>,
+					<&cru HCLK_VOP>;
+				pm_qos = <&qos_vop>;
+				#power-domain-cells = <0>;
+			};
+
+			power-domain@RK3228_PD_VPU {
+				reg = <RK3228_PD_VPU>;
+				clocks = <&cru ACLK_VPU>,
+					 <&cru HCLK_VPU>;
+				pm_qos = <&qos_vpu>;
+				#power-domain-cells = <0>;
+			};
+
+			power-domain@RK3228_PD_RKVDEC {
+				reg = <RK3228_PD_RKVDEC>;
+				clocks = <&cru ACLK_RKVDEC>,
+					 <&cru HCLK_RKVDEC>,
+					 <&cru SCLK_VDEC_CABAC>,
+					 <&cru SCLK_VDEC_CORE>;
+				pm_qos = <&qos_rkvdec_r>,
+					 <&qos_rkvdec_w>;
+				#power-domain-cells = <0>;
+			};
+
+			power-domain@RK3228_PD_GPU {
+				reg = <RK3228_PD_GPU>;
+				clocks = <&cru ACLK_GPU>;
+				pm_qos = <&qos_gpu>;
+				#power-domain-cells = <0>;
+			};
+
+		};
+
 		u2phy0: usb2-phy@760 {
 			compatible = "rockchip,rk3228-usb2phy";
 			reg = <0x0760 0x0c>;
@@ -240,6 +300,7 @@ u2phy1_host: host-port {
 				status = "disabled";
 			};
 		};
+
 	};
 
 	uart0: serial@11010000 {
@@ -546,6 +607,7 @@ gpu: gpu@20000000 {
 				  "ppmmu1";
 		clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
 		clock-names = "bus", "core";
+		power-domains = <&power RK3228_PD_GPU>;
 		resets = <&cru SRST_GPU_A>;
 		status = "disabled";
 	};
@@ -556,6 +618,7 @@ vpu_mmu: iommu@20020800 {
 		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3228_PD_VPU>;
 		#iommu-cells = <0>;
 		status = "disabled";
 	};
@@ -566,6 +629,7 @@ vdec_mmu: iommu@20030480 {
 		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3228_PD_RKVDEC>;
 		#iommu-cells = <0>;
 		status = "disabled";
 	};
@@ -579,6 +643,7 @@ vop: vop@20050000 {
 		resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>;
 		reset-names = "axi", "ahb", "dclk";
 		iommus = <&vop_mmu>;
+		power-domains = <&power RK3228_PD_VOP>;
 		status = "disabled";
 
 		vop_out: port {
@@ -598,6 +663,7 @@ vop_mmu: iommu@20053f00 {
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3228_PD_VOP>;
 		#iommu-cells = <0>;
 		status = "disabled";
 	};
@@ -608,6 +674,7 @@ rga: rga@20060000 {
 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
 		clock-names = "aclk", "hclk", "sclk";
+		power-domains = <&power RK3228_PD_VIO>;
 		resets = <&cru SRST_RGA>, <&cru SRST_RGA_A>, <&cru SRST_RGA_H>;
 		reset-names = "core", "axi", "ahb";
 	};
@@ -618,6 +685,7 @@ iep_mmu: iommu@20070800 {
 		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3228_PD_VIO>;
 		#iommu-cells = <0>;
 		status = "disabled";
 	};
@@ -792,6 +860,51 @@ gmac: ethernet@30200000 {
 		status = "disabled";
 	};
 
+	qos_iep: qos@31030080 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31030080 0x20>;
+	};
+
+	qos_rga_w: qos@31030100 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31030100 0x20>;
+	};
+
+	qos_hdcp: qos@31030180 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31030180 0x20>;
+	};
+
+	qos_rga_r: qos@31030200 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31030200 0x20>;
+	};
+
+	qos_vpu: qos@31040000 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31040000 0x20>;
+	};
+
+	qos_gpu: qos@31050000 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31050000 0x20>;
+	};
+
+	qos_vop: qos@31060000 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31060000 0x20>;
+	};
+
+	qos_rkvdec_r: qos@31070000 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31070000 0x20>;
+	};
+
+	qos_rkvdec_w: qos@31070080 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31070080 0x20>;
+	};
+
 	gic: interrupt-controller@32010000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;
-- 
2.27.0


WARNING: multiple messages have this Message-ID (diff)
From: Alex Bee <knaerzche@gmail.com>
To: Ezequiel Garcia <ezequiel@collabora.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Lee Jones <lee.jones@linaro.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
	devicetree@vger.kernel.org
Cc: Alex Bee <knaerzche@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 09/12] ARM: dts: rockchip: add power controller for RK322x
Date: Thu, 27 May 2021 17:44:52 +0200	[thread overview]
Message-ID: <20210527154455.358869-10-knaerzche@gmail.com> (raw)
In-Reply-To: <20210527154455.358869-1-knaerzche@gmail.com>

Add the power controller node and the correspondending qos nodes for
RK322x.
Also add the power-domain property to the nodes that are already
present.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
---

 Changes in v2:
 - moved power node to appropriate position
 - added #power-domain-cells for RK3228_PD_GPU
 - moved power-domains property after iommous property

 arch/arm/boot/dts/rk322x.dtsi | 113 ++++++++++++++++++++++++++++++++++
 1 file changed, 113 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 5774bc309eb7..42033909c606 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/clock/rk3228-cru.h>
 #include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/power/rk3228-power.h>
 
 / {
 	#address-cells = <1>;
@@ -190,6 +191,65 @@ io_domains: io-domains {
 			status = "disabled";
 		};
 
+		power: power-controller {
+			compatible = "rockchip,rk3228-power-controller";
+			#power-domain-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			power-domain@RK3228_PD_VIO {
+				reg = <RK3228_PD_VIO>;
+				clocks = <&cru ACLK_HDCP>,
+					 <&cru SCLK_HDCP>,
+					 <&cru ACLK_IEP>,
+					 <&cru HCLK_IEP>,
+					 <&cru ACLK_RGA>,
+					 <&cru HCLK_RGA>,
+					 <&cru SCLK_RGA>;
+				pm_qos = <&qos_hdcp>,
+					 <&qos_iep>,
+					 <&qos_rga_r>,
+					 <&qos_rga_w>;
+				#power-domain-cells = <0>;
+			};
+
+			power-domain@RK3228_PD_VOP {
+				reg = <RK3228_PD_VOP>;
+				clocks =<&cru ACLK_VOP>,
+					<&cru DCLK_VOP>,
+					<&cru HCLK_VOP>;
+				pm_qos = <&qos_vop>;
+				#power-domain-cells = <0>;
+			};
+
+			power-domain@RK3228_PD_VPU {
+				reg = <RK3228_PD_VPU>;
+				clocks = <&cru ACLK_VPU>,
+					 <&cru HCLK_VPU>;
+				pm_qos = <&qos_vpu>;
+				#power-domain-cells = <0>;
+			};
+
+			power-domain@RK3228_PD_RKVDEC {
+				reg = <RK3228_PD_RKVDEC>;
+				clocks = <&cru ACLK_RKVDEC>,
+					 <&cru HCLK_RKVDEC>,
+					 <&cru SCLK_VDEC_CABAC>,
+					 <&cru SCLK_VDEC_CORE>;
+				pm_qos = <&qos_rkvdec_r>,
+					 <&qos_rkvdec_w>;
+				#power-domain-cells = <0>;
+			};
+
+			power-domain@RK3228_PD_GPU {
+				reg = <RK3228_PD_GPU>;
+				clocks = <&cru ACLK_GPU>;
+				pm_qos = <&qos_gpu>;
+				#power-domain-cells = <0>;
+			};
+
+		};
+
 		u2phy0: usb2-phy@760 {
 			compatible = "rockchip,rk3228-usb2phy";
 			reg = <0x0760 0x0c>;
@@ -240,6 +300,7 @@ u2phy1_host: host-port {
 				status = "disabled";
 			};
 		};
+
 	};
 
 	uart0: serial@11010000 {
@@ -546,6 +607,7 @@ gpu: gpu@20000000 {
 				  "ppmmu1";
 		clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
 		clock-names = "bus", "core";
+		power-domains = <&power RK3228_PD_GPU>;
 		resets = <&cru SRST_GPU_A>;
 		status = "disabled";
 	};
@@ -556,6 +618,7 @@ vpu_mmu: iommu@20020800 {
 		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3228_PD_VPU>;
 		#iommu-cells = <0>;
 		status = "disabled";
 	};
@@ -566,6 +629,7 @@ vdec_mmu: iommu@20030480 {
 		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3228_PD_RKVDEC>;
 		#iommu-cells = <0>;
 		status = "disabled";
 	};
@@ -579,6 +643,7 @@ vop: vop@20050000 {
 		resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>;
 		reset-names = "axi", "ahb", "dclk";
 		iommus = <&vop_mmu>;
+		power-domains = <&power RK3228_PD_VOP>;
 		status = "disabled";
 
 		vop_out: port {
@@ -598,6 +663,7 @@ vop_mmu: iommu@20053f00 {
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3228_PD_VOP>;
 		#iommu-cells = <0>;
 		status = "disabled";
 	};
@@ -608,6 +674,7 @@ rga: rga@20060000 {
 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
 		clock-names = "aclk", "hclk", "sclk";
+		power-domains = <&power RK3228_PD_VIO>;
 		resets = <&cru SRST_RGA>, <&cru SRST_RGA_A>, <&cru SRST_RGA_H>;
 		reset-names = "core", "axi", "ahb";
 	};
@@ -618,6 +685,7 @@ iep_mmu: iommu@20070800 {
 		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3228_PD_VIO>;
 		#iommu-cells = <0>;
 		status = "disabled";
 	};
@@ -792,6 +860,51 @@ gmac: ethernet@30200000 {
 		status = "disabled";
 	};
 
+	qos_iep: qos@31030080 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31030080 0x20>;
+	};
+
+	qos_rga_w: qos@31030100 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31030100 0x20>;
+	};
+
+	qos_hdcp: qos@31030180 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31030180 0x20>;
+	};
+
+	qos_rga_r: qos@31030200 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31030200 0x20>;
+	};
+
+	qos_vpu: qos@31040000 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31040000 0x20>;
+	};
+
+	qos_gpu: qos@31050000 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31050000 0x20>;
+	};
+
+	qos_vop: qos@31060000 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31060000 0x20>;
+	};
+
+	qos_rkvdec_r: qos@31070000 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31070000 0x20>;
+	};
+
+	qos_rkvdec_w: qos@31070080 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31070080 0x20>;
+	};
+
 	gic: interrupt-controller@32010000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;
-- 
2.27.0


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Alex Bee <knaerzche@gmail.com>
To: Ezequiel Garcia <ezequiel@collabora.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Lee Jones <lee.jones@linaro.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
	devicetree@vger.kernel.org
Cc: Alex Bee <knaerzche@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 09/12] ARM: dts: rockchip: add power controller for RK322x
Date: Thu, 27 May 2021 17:44:52 +0200	[thread overview]
Message-ID: <20210527154455.358869-10-knaerzche@gmail.com> (raw)
In-Reply-To: <20210527154455.358869-1-knaerzche@gmail.com>

Add the power controller node and the correspondending qos nodes for
RK322x.
Also add the power-domain property to the nodes that are already
present.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
---

 Changes in v2:
 - moved power node to appropriate position
 - added #power-domain-cells for RK3228_PD_GPU
 - moved power-domains property after iommous property

 arch/arm/boot/dts/rk322x.dtsi | 113 ++++++++++++++++++++++++++++++++++
 1 file changed, 113 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 5774bc309eb7..42033909c606 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/clock/rk3228-cru.h>
 #include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/power/rk3228-power.h>
 
 / {
 	#address-cells = <1>;
@@ -190,6 +191,65 @@ io_domains: io-domains {
 			status = "disabled";
 		};
 
+		power: power-controller {
+			compatible = "rockchip,rk3228-power-controller";
+			#power-domain-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			power-domain@RK3228_PD_VIO {
+				reg = <RK3228_PD_VIO>;
+				clocks = <&cru ACLK_HDCP>,
+					 <&cru SCLK_HDCP>,
+					 <&cru ACLK_IEP>,
+					 <&cru HCLK_IEP>,
+					 <&cru ACLK_RGA>,
+					 <&cru HCLK_RGA>,
+					 <&cru SCLK_RGA>;
+				pm_qos = <&qos_hdcp>,
+					 <&qos_iep>,
+					 <&qos_rga_r>,
+					 <&qos_rga_w>;
+				#power-domain-cells = <0>;
+			};
+
+			power-domain@RK3228_PD_VOP {
+				reg = <RK3228_PD_VOP>;
+				clocks =<&cru ACLK_VOP>,
+					<&cru DCLK_VOP>,
+					<&cru HCLK_VOP>;
+				pm_qos = <&qos_vop>;
+				#power-domain-cells = <0>;
+			};
+
+			power-domain@RK3228_PD_VPU {
+				reg = <RK3228_PD_VPU>;
+				clocks = <&cru ACLK_VPU>,
+					 <&cru HCLK_VPU>;
+				pm_qos = <&qos_vpu>;
+				#power-domain-cells = <0>;
+			};
+
+			power-domain@RK3228_PD_RKVDEC {
+				reg = <RK3228_PD_RKVDEC>;
+				clocks = <&cru ACLK_RKVDEC>,
+					 <&cru HCLK_RKVDEC>,
+					 <&cru SCLK_VDEC_CABAC>,
+					 <&cru SCLK_VDEC_CORE>;
+				pm_qos = <&qos_rkvdec_r>,
+					 <&qos_rkvdec_w>;
+				#power-domain-cells = <0>;
+			};
+
+			power-domain@RK3228_PD_GPU {
+				reg = <RK3228_PD_GPU>;
+				clocks = <&cru ACLK_GPU>;
+				pm_qos = <&qos_gpu>;
+				#power-domain-cells = <0>;
+			};
+
+		};
+
 		u2phy0: usb2-phy@760 {
 			compatible = "rockchip,rk3228-usb2phy";
 			reg = <0x0760 0x0c>;
@@ -240,6 +300,7 @@ u2phy1_host: host-port {
 				status = "disabled";
 			};
 		};
+
 	};
 
 	uart0: serial@11010000 {
@@ -546,6 +607,7 @@ gpu: gpu@20000000 {
 				  "ppmmu1";
 		clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
 		clock-names = "bus", "core";
+		power-domains = <&power RK3228_PD_GPU>;
 		resets = <&cru SRST_GPU_A>;
 		status = "disabled";
 	};
@@ -556,6 +618,7 @@ vpu_mmu: iommu@20020800 {
 		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3228_PD_VPU>;
 		#iommu-cells = <0>;
 		status = "disabled";
 	};
@@ -566,6 +629,7 @@ vdec_mmu: iommu@20030480 {
 		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3228_PD_RKVDEC>;
 		#iommu-cells = <0>;
 		status = "disabled";
 	};
@@ -579,6 +643,7 @@ vop: vop@20050000 {
 		resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>;
 		reset-names = "axi", "ahb", "dclk";
 		iommus = <&vop_mmu>;
+		power-domains = <&power RK3228_PD_VOP>;
 		status = "disabled";
 
 		vop_out: port {
@@ -598,6 +663,7 @@ vop_mmu: iommu@20053f00 {
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3228_PD_VOP>;
 		#iommu-cells = <0>;
 		status = "disabled";
 	};
@@ -608,6 +674,7 @@ rga: rga@20060000 {
 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
 		clock-names = "aclk", "hclk", "sclk";
+		power-domains = <&power RK3228_PD_VIO>;
 		resets = <&cru SRST_RGA>, <&cru SRST_RGA_A>, <&cru SRST_RGA_H>;
 		reset-names = "core", "axi", "ahb";
 	};
@@ -618,6 +685,7 @@ iep_mmu: iommu@20070800 {
 		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3228_PD_VIO>;
 		#iommu-cells = <0>;
 		status = "disabled";
 	};
@@ -792,6 +860,51 @@ gmac: ethernet@30200000 {
 		status = "disabled";
 	};
 
+	qos_iep: qos@31030080 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31030080 0x20>;
+	};
+
+	qos_rga_w: qos@31030100 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31030100 0x20>;
+	};
+
+	qos_hdcp: qos@31030180 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31030180 0x20>;
+	};
+
+	qos_rga_r: qos@31030200 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31030200 0x20>;
+	};
+
+	qos_vpu: qos@31040000 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31040000 0x20>;
+	};
+
+	qos_gpu: qos@31050000 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31050000 0x20>;
+	};
+
+	qos_vop: qos@31060000 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31060000 0x20>;
+	};
+
+	qos_rkvdec_r: qos@31070000 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31070000 0x20>;
+	};
+
+	qos_rkvdec_w: qos@31070080 {
+		compatible = "rockchip,rk3228-qos", "syscon";
+		reg = <0x31070080 0x20>;
+	};
+
 	gic: interrupt-controller@32010000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;
-- 
2.27.0


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  parent reply	other threads:[~2021-05-27 15:46 UTC|newest]

Thread overview: 202+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-25 15:22 [PATCH 00/10] Add support for older Rockchip SoCs to V4L2 hantro and rkvdec drivers Alex Bee
2021-05-25 15:22 ` Alex Bee
2021-05-25 15:22 ` Alex Bee
2021-05-25 15:22 ` [PATCH 01/10] ARM: dts: rockchip: add power controller for RK322x Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22 ` [PATCH 02/10] ARM: dts: rockchip: add power controller for RK3036 Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22 ` [PATCH 03/10] dt-bindings: mfd: syscon: add Rockchip RK3036/RK3228 qos compatibles Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:26   ` Heiko Stübner
2021-05-25 15:26     ` Heiko Stübner
2021-05-25 15:26     ` Heiko Stübner
2021-05-25 15:22 ` [PATCH 04/10] media: hantro: add support for Rockchip RK3066 Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 22:49   ` Heiko Stübner
2021-05-25 22:49     ` Heiko Stübner
2021-05-25 22:49     ` Heiko Stübner
2021-05-26 10:32   ` Ezequiel Garcia
2021-05-26 10:32     ` Ezequiel Garcia
2021-05-26 10:32     ` Ezequiel Garcia
2021-05-26 10:32     ` Ezequiel Garcia
2021-05-26 23:22     ` Alex Bee
2021-05-26 23:22       ` Alex Bee
2021-05-26 23:22       ` Alex Bee
2021-05-27  1:38       ` Ezequiel Garcia
2021-05-27  1:38         ` Ezequiel Garcia
2021-05-27  1:38         ` Ezequiel Garcia
2021-05-27  1:38         ` Ezequiel Garcia
2021-05-25 15:22 ` [PATCH 05/10] media: hantro: add support for Rockchip RK3036 Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-26 10:28   ` Ezequiel Garcia
2021-05-26 10:28     ` Ezequiel Garcia
2021-05-26 10:28     ` Ezequiel Garcia
2021-05-26 10:28     ` Ezequiel Garcia
2021-05-26 23:27     ` Alex Bee
2021-05-26 23:27       ` Alex Bee
2021-05-26 23:27       ` Alex Bee
2021-05-26 23:58       ` Heiko Stübner
2021-05-26 23:58         ` Heiko Stübner
2021-05-26 23:58         ` Heiko Stübner
2021-05-27  1:27         ` Ezequiel Garcia
2021-05-27  1:27           ` Ezequiel Garcia
2021-05-27  1:27           ` Ezequiel Garcia
2021-05-27  1:27           ` Ezequiel Garcia
2021-05-27 20:11           ` Alex Bee
2021-05-27 20:11             ` Alex Bee
2021-05-27 20:11             ` Alex Bee
2021-05-25 15:22 ` [PATCH 06/10] ARM: dts: rockchip: add vpu nodes for RK3066 and RK3188 Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22 ` [PATCH 07/10] ARM: dts: rockchip: add vpu node for RK322x Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 23:05   ` Heiko Stübner
2021-05-25 23:05     ` Heiko Stübner
2021-05-25 23:05     ` Heiko Stübner
2021-05-25 15:22 ` [PATCH 08/10] media: dt-bindings: media: rockchip-vpu: add new compatibles Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-26 12:56   ` Rob Herring
2021-05-26 12:56     ` Rob Herring
2021-05-26 12:56     ` Rob Herring
2021-05-25 15:22 ` [PATCH 09/10] ARM: dts: rockchip: add vdec node for RK322x Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22 ` [PATCH 10/10] media: dt-bindings: media: rockchip-vdec: add RK3228 compatible Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-25 15:22   ` Alex Bee
2021-05-26 12:56   ` Rob Herring
2021-05-26 12:56     ` Rob Herring
2021-05-26 12:56     ` Rob Herring
2021-05-25 23:01 ` [PATCH 00/10] Add support for older Rockchip SoCs to V4L2 hantro and rkvdec drivers Heiko Stübner
2021-05-25 23:01   ` Heiko Stübner
2021-05-25 23:01   ` Heiko Stübner
2021-05-26 23:38   ` Alex Bee
2021-05-26 23:38     ` Alex Bee
2021-05-26 23:38     ` Alex Bee
2021-05-27 15:44 ` [PATCH v2 00/12] " Alex Bee
2021-05-27 15:44   ` Alex Bee
2021-05-27 15:44   ` Alex Bee
2021-05-27 15:44   ` [PATCH v2 01/12] dt-bindings: mfd: syscon: add Rockchip RK3036/RK3228 qos compatibles Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-06-01 15:46     ` Lee Jones
2021-06-01 15:46       ` Lee Jones
2021-06-01 15:46       ` Lee Jones
2021-07-11 11:55       ` Heiko Stübner
2021-07-11 11:55         ` Heiko Stübner
2021-07-11 11:55         ` Heiko Stübner
2021-07-15 10:09         ` Alex Bee
2021-07-15 10:09           ` Alex Bee
2021-07-15 10:09           ` Alex Bee
2021-07-15 11:07           ` Lee Jones
2021-07-15 11:07             ` Lee Jones
2021-07-15 11:07             ` Lee Jones
2021-06-04 20:24     ` Rob Herring
2021-06-04 20:24       ` Rob Herring
2021-06-04 20:24       ` Rob Herring
2021-05-27 15:44   ` [PATCH v2 02/12] dt-bindings: media: rockchip-vpu: add new compatibles Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-06-04 20:44     ` Rob Herring
2021-06-04 20:44       ` Rob Herring
2021-06-04 20:44       ` Rob Herring
2021-05-27 15:44   ` [PATCH v2 03/12] dt-bindings: media: rockchip-vdec: add RK3228 compatible Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-06-04 20:45     ` Rob Herring
2021-06-04 20:45       ` Rob Herring
2021-06-04 20:45       ` Rob Herring
2021-05-27 15:44   ` [PATCH v2 04/12] media: hantro: reorder variants Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-06-11 15:26     ` Ezequiel Garcia
2021-06-11 15:26       ` Ezequiel Garcia
2021-06-11 15:26       ` Ezequiel Garcia
2021-05-27 15:44   ` [PATCH v2 05/12] media: hantro: merge Rockchip platform drivers Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-06-11 15:36     ` Ezequiel Garcia
2021-06-11 15:36       ` Ezequiel Garcia
2021-06-11 15:36       ` Ezequiel Garcia
2021-06-14 17:02       ` Alex Bee
2021-06-14 17:02         ` Alex Bee
2021-06-14 17:02         ` Alex Bee
2021-05-27 15:44   ` [PATCH v2 06/12] media: hantro: add support for Rockchip RK3066 Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-06-11 15:50     ` Ezequiel Garcia
2021-06-11 15:50       ` Ezequiel Garcia
2021-06-11 15:50       ` Ezequiel Garcia
2021-06-14 16:46       ` Alex Bee
2021-06-14 16:46         ` Alex Bee
2021-06-14 16:46         ` Alex Bee
2021-05-27 15:44   ` [PATCH v2 07/12] media: hantro: add support for Rockchip RK3036 Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-06-11 16:02     ` Ezequiel Garcia
2021-06-11 16:02       ` Ezequiel Garcia
2021-06-11 16:02       ` Ezequiel Garcia
2021-05-27 15:44   ` [PATCH v2 08/12] ARM: dts: rockchip: add power controller for RK3036 Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-06-11 15:58     ` Ezequiel Garcia
2021-06-11 15:58       ` Ezequiel Garcia
2021-06-11 15:58       ` Ezequiel Garcia
2021-06-13 16:22       ` Heiko Stuebner
2021-06-13 16:22         ` Heiko Stuebner
2021-06-13 16:22         ` Heiko Stuebner
2021-06-21 11:58         ` Alex Bee
2021-06-21 11:58           ` Alex Bee
2021-06-21 11:58           ` Alex Bee
2021-05-27 15:44   ` Alex Bee [this message]
2021-05-27 15:44     ` [PATCH v2 09/12] ARM: dts: rockchip: add power controller for RK322x Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44   ` [PATCH v2 10/12] ARM: dts: rockchip: add vpu node for RK3036 Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44   ` [PATCH v2 11/12] ARM: dts: rockchip: add vpu nodes for RK3066 and RK3188 Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44   ` [PATCH v2 12/12] ARM: dts: rockchip: add vpu and vdec node for RK322x Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-05-27 15:44     ` Alex Bee
2021-06-13 16:27   ` (subset) [PATCH v2 00/12] Add support for older Rockchip SoCs to V4L2 hantro and rkvdec drivers Heiko Stuebner
2021-06-13 16:27     ` Heiko Stuebner
2021-06-13 16:27     ` Heiko Stuebner
2021-06-14 11:09   ` Hans Verkuil
2021-06-14 11:09     ` Hans Verkuil
2021-06-14 11:09     ` Hans Verkuil
2021-06-14 11:13     ` Hans Verkuil
2021-06-14 11:13       ` Hans Verkuil
2021-06-14 11:13       ` Hans Verkuil
2021-06-21 23:04   ` (subset) " Heiko Stuebner
2021-06-21 23:04     ` Heiko Stuebner
2021-06-21 23:04     ` Heiko Stuebner
2021-06-14 21:32 ` [PATCH v3 0/6] " Alex Bee
2021-06-14 21:32   ` Alex Bee
2021-06-14 21:32   ` Alex Bee
2021-06-14 21:32   ` [PATCH v3 1/6] dt-bindings: media: rockchip-vpu: add new compatibles Alex Bee
2021-06-14 21:32     ` Alex Bee
2021-06-14 21:32     ` Alex Bee
2021-06-14 21:32   ` [PATCH v3 2/6] dt-bindings: media: rockchip-vdec: add RK3228 compatible Alex Bee
2021-06-14 21:32     ` Alex Bee
2021-06-14 21:32     ` Alex Bee
2021-06-14 21:32   ` [PATCH v3 3/6] media: hantro: reorder variants Alex Bee
2021-06-14 21:32     ` Alex Bee
2021-06-14 21:32     ` Alex Bee
2021-06-14 21:32   ` [PATCH v3 4/6] media: hantro: merge Rockchip platform drivers Alex Bee
2021-06-14 21:32     ` Alex Bee
2021-06-14 21:32     ` Alex Bee
2021-06-14 21:32   ` [PATCH v3 5/6] media: hantro: add support for Rockchip RK3066 Alex Bee
2021-06-14 21:32     ` Alex Bee
2021-06-14 21:32     ` Alex Bee
2021-06-14 21:32   ` [PATCH v3 6/6] media: hantro: add support for Rockchip RK3036 Alex Bee
2021-06-14 21:32     ` Alex Bee
2021-06-14 21:32     ` Alex Bee

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