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From: Marco Chiappero <marco.chiappero@intel.com>
To: herbert@gondor.apana.org.au
Cc: linux-crypto@vger.kernel.org, qat-linux@intel.com,
	Giovanni Cabiddu <giovanni.cabiddu@intel.com>,
	Marco Chiappero <marco.chiappero@intel.com>
Subject: [PATCH 06/10] crypto: qat - prevent spurious MSI interrupt in VF
Date: Thu, 27 May 2021 20:12:47 +0100	[thread overview]
Message-ID: <20210527191251.6317-7-marco.chiappero@intel.com> (raw)
In-Reply-To: <20210527191251.6317-1-marco.chiappero@intel.com>

From: Giovanni Cabiddu <giovanni.cabiddu@intel.com>

QAT GEN2 devices suffer from a defect where the MSI interrupt can be
sent multiple times.

If the second (spurious) interrupt is handled before the bottom half
handler runs, then the extra interrupt is effectively ignored because
the bottom half is only scheduled once.
However, if the top half runs again after the bottom half runs, this
will appear as a spurious PF to VF interrupt.

This can be avoided by checking the interrupt mask register in addition
to the interrupt source register in the interrupt handler.

This patch is based on earlier work done by Conor McLoughlin.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Co-developed-by: Marco Chiappero <marco.chiappero@intel.com>
Signed-off-by: Marco Chiappero <marco.chiappero@intel.com>
---
 drivers/crypto/qat/qat_common/adf_vf_isr.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/qat/qat_common/adf_vf_isr.c b/drivers/crypto/qat/qat_common/adf_vf_isr.c
index 3e4f64d248f9..c603979e4a4c 100644
--- a/drivers/crypto/qat/qat_common/adf_vf_isr.c
+++ b/drivers/crypto/qat/qat_common/adf_vf_isr.c
@@ -18,6 +18,7 @@
 #include "adf_pf2vf_msg.h"
 
 #define ADF_VINTSOU_OFFSET	0x204
+#define ADF_VINTMSK_OFFSET	0x208
 #define ADF_VINTSOU_BUN		BIT(0)
 #define ADF_VINTSOU_PF2VF	BIT(1)
 
@@ -161,11 +162,17 @@ static irqreturn_t adf_isr(int irq, void *privdata)
 			&GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
 	void __iomem *pmisc_bar_addr = pmisc->virt_addr;
 	bool handled = false;
-	u32 v_int;
+	u32 v_int, v_mask;
 
 	/* Read VF INT source CSR to determine the source of VF interrupt */
 	v_int = ADF_CSR_RD(pmisc_bar_addr, ADF_VINTSOU_OFFSET);
 
+	/* Read VF INT mask CSR to determine which sources are masked */
+	v_mask = ADF_CSR_RD(pmisc_bar_addr, ADF_VINTMSK_OFFSET);
+
+	/* Recompute v_int ignoring sources that are masked */
+	v_int &= ~v_mask;
+
 	/* Check for PF2VF interrupt */
 	if (v_int & ADF_VINTSOU_PF2VF) {
 		/* Disable PF to VF interrupt */
-- 
2.26.2


  parent reply	other threads:[~2021-05-27 19:13 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-27 19:12 [PATCH 00/10] crypto: qat - misc fixes Marco Chiappero
2021-05-27 19:12 ` [PATCH 01/10] crypto: qat - use proper type for vf_mask Marco Chiappero
2021-06-03 12:15   ` Herbert Xu
2021-06-04  9:25     ` Chiappero, Marco
2021-05-27 19:12 ` [PATCH 02/10] crypto: qat - remove empty sriov_configure() Marco Chiappero
2021-06-03 12:15   ` Herbert Xu
2021-06-04  9:23     ` Chiappero, Marco
2021-05-27 19:12 ` [PATCH 03/10] crypto: qat - enable interrupts only after ISR allocation Marco Chiappero
2021-05-27 19:12 ` [PATCH 04/10] crypto: qat - do not ignore errors from enable_vf2pf_comms() Marco Chiappero
2021-05-27 19:12 ` [PATCH 05/10] crypto: qat - handle both source of interrupt in VF ISR Marco Chiappero
2021-05-27 19:12 ` Marco Chiappero [this message]
2021-05-27 19:12 ` [PATCH 07/10] crypto: qat - prevent spurious MSI interrupt in PF Marco Chiappero
2021-05-27 19:12 ` [PATCH 08/10] crypto: qat - rename compatibility version definition Marco Chiappero
2021-05-27 19:12 ` [PATCH 09/10] crypto: qat - remove intermediate tasklet for vf2pf Marco Chiappero
2021-05-27 19:12 ` [PATCH 10/10] crypto: qat - fix reuse of completion variable Marco Chiappero

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