From: Rob Herring <robh@kernel.org>
To: Odelu Kukatla <okukatla@codeaurora.org>
Cc: georgi.djakov@linaro.org, bjorn.andersson@linaro.org,
evgreen@google.com, Andy Gross <agross@kernel.org>,
Georgi Djakov <djakov@kernel.org>,
Sibi Sankar <sibis@codeaurora.org>,
linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
sboyd@kernel.org, seansw@qti.qualcomm.com, elder@linaro.org,
linux-arm-msm-owner@vger.kernel.org
Subject: Re: [V3 1/3] dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280
Date: Wed, 2 Jun 2021 14:38:24 -0500 [thread overview]
Message-ID: <20210602193824.GA3848885@robh.at.kernel.org> (raw)
In-Reply-To: <1622646894-7833-2-git-send-email-okukatla@codeaurora.org>
On Wed, Jun 02, 2021 at 08:44:51PM +0530, Odelu Kukatla wrote:
> Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SC7280
> SoCs.
>
> Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
> ---
> .../devicetree/bindings/interconnect/qcom,osm-l3.yaml | 4 +++-
> include/dt-bindings/interconnect/qcom,osm-l3.h | 10 +++++++++-
> 2 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
> index d6a95c3..61e9a35 100644
> --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
> +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
> @@ -18,12 +18,14 @@ properties:
> compatible:
> enum:
> - qcom,sc7180-osm-l3
> + - qcom,sc7280-epss-l3
> - qcom,sdm845-osm-l3
> - qcom,sm8150-osm-l3
> - qcom,sm8250-epss-l3
>
> reg:
> - maxItems: 1
> + minItems: 1
> + maxItems: 4
If there is more than 1 entry, you have to define what each entry is.
>
> clocks:
> items:
> diff --git a/include/dt-bindings/interconnect/qcom,osm-l3.h b/include/dt-bindings/interconnect/qcom,osm-l3.h
> index 61ef649..99534a5 100644
> --- a/include/dt-bindings/interconnect/qcom,osm-l3.h
> +++ b/include/dt-bindings/interconnect/qcom,osm-l3.h
> @@ -1,6 +1,6 @@
> /* SPDX-License-Identifier: GPL-2.0 */
> /*
> - * Copyright (C) 2019 The Linux Foundation. All rights reserved.
> + * Copyright (C) 2019, 2021 The Linux Foundation. All rights reserved.
> */
>
> #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_OSM_L3_H
> @@ -11,5 +11,13 @@
>
> #define MASTER_EPSS_L3_APPS 0
> #define SLAVE_EPSS_L3_SHARED 1
> +#define SLAVE_EPSS_L3_CPU0 2
> +#define SLAVE_EPSS_L3_CPU1 3
> +#define SLAVE_EPSS_L3_CPU2 4
> +#define SLAVE_EPSS_L3_CPU3 5
> +#define SLAVE_EPSS_L3_CPU4 6
> +#define SLAVE_EPSS_L3_CPU5 7
> +#define SLAVE_EPSS_L3_CPU6 8
> +#define SLAVE_EPSS_L3_CPU7 9
>
> #endif
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2021-06-02 19:38 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-02 15:14 [V3 0/3] Add L3 provider support for SC7280 Odelu Kukatla
2021-06-02 15:14 ` [V3 1/3] dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280 Odelu Kukatla
2021-06-02 19:38 ` Rob Herring [this message]
2021-06-02 15:14 ` [V3 2/3] interconnect: qcom: Add EPSS L3 support " Odelu Kukatla
2021-06-02 15:14 ` [V3 3/3] arm64: dts: qcom: sc7280: Add EPSS L3 interconnect provider Odelu Kukatla
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