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* [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location
@ 2021-06-03 14:13 Zhigang Luo
  2021-06-03 14:13 ` [PATCH 2/5] drm/amdgpu: remove sriov vf gfxhub fb location programming Zhigang Luo
                   ` (4 more replies)
  0 siblings, 5 replies; 21+ messages in thread
From: Zhigang Luo @ 2021-06-03 14:13 UTC (permalink / raw)
  To: amd-gfx; +Cc: Zhigang Luo

host driver programmed fb location registers for vf, no need to
check anymore.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index ceb3968d8326..1c2d9fde9021 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1292,10 +1292,7 @@ static int gmc_v9_0_late_init(void *handle)
 static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
 					struct amdgpu_gmc *mc)
 {
-	u64 base = 0;
-
-	if (!amdgpu_sriov_vf(adev))
-		base = adev->mmhub.funcs->get_fb_location(adev);
+	u64 base = adev->mmhub.funcs->get_fb_location(adev);
 
 	/* add the xgmi offset of the physical node */
 	base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;
-- 
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* [PATCH 2/5] drm/amdgpu: remove sriov vf gfxhub fb location programming
  2021-06-03 14:13 [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location Zhigang Luo
@ 2021-06-03 14:13 ` Zhigang Luo
  2021-06-03 15:10   ` Liu, Shaoyun
  2021-06-03 14:13 ` [PATCH 3/5] drm/amdgpu: remove sriov vf mmhub system aperture and " Zhigang Luo
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 21+ messages in thread
From: Zhigang Luo @ 2021-06-03 14:13 UTC (permalink / raw)
  To: amd-gfx; +Cc: Zhigang Luo

host driver programmed the gfxhub fb location for vf, no need to
program in guest side.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 063e48df0b2d..f51fd0688eca 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -320,18 +320,6 @@ static void gfxhub_v1_0_program_invalidation(struct amdgpu_device *adev)
 
 static int gfxhub_v1_0_gart_enable(struct amdgpu_device *adev)
 {
-	if (amdgpu_sriov_vf(adev) && adev->asic_type != CHIP_ARCTURUS) {
-		/*
-		 * MC_VM_FB_LOCATION_BASE/TOP is NULL for VF, becuase they are
-		 * VF copy registers so vbios post doesn't program them, for
-		 * SRIOV driver need to program them
-		 */
-		WREG32_SOC15_RLC(GC, 0, mmMC_VM_FB_LOCATION_BASE,
-			     adev->gmc.vram_start >> 24);
-		WREG32_SOC15_RLC(GC, 0, mmMC_VM_FB_LOCATION_TOP,
-			     adev->gmc.vram_end >> 24);
-	}
-
 	/* GART Enable. */
 	gfxhub_v1_0_init_gart_aperture_regs(adev);
 	gfxhub_v1_0_init_system_aperture_regs(adev);
-- 
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* [PATCH 3/5] drm/amdgpu: remove sriov vf mmhub system aperture and fb location programming
  2021-06-03 14:13 [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location Zhigang Luo
  2021-06-03 14:13 ` [PATCH 2/5] drm/amdgpu: remove sriov vf gfxhub fb location programming Zhigang Luo
@ 2021-06-03 14:13 ` Zhigang Luo
  2021-06-03 15:11   ` Liu, Shaoyun
  2021-06-03 14:13 ` [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf Zhigang Luo
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 21+ messages in thread
From: Zhigang Luo @ 2021-06-03 14:13 UTC (permalink / raw)
  To: amd-gfx; +Cc: Zhigang Luo

host driver programmed mmhub system aperture and fb location for vf, no
need to program in guest side.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c | 17 +++--------------
 1 file changed, 3 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
index 998e674f9369..f5f7181f9af5 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
@@ -111,6 +111,9 @@ static void mmhub_v1_7_init_system_aperture_regs(struct amdgpu_device *adev)
 	WREG32_SOC15(MMHUB, 0, regMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
 	WREG32_SOC15(MMHUB, 0, regMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
 
+	if (amdgpu_sriov_vf(adev))
+		return;
+
 	/* Program the system aperture low logical page number. */
 	WREG32_SOC15(MMHUB, 0, regMC_VM_SYSTEM_APERTURE_LOW_ADDR,
 		     min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
@@ -129,8 +132,6 @@ static void mmhub_v1_7_init_system_aperture_regs(struct amdgpu_device *adev)
 		WREG32_SOC15(MMHUB, 0, regMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x3FFFFFFF);
 		WREG32_SOC15(MMHUB, 0, regMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0);
 	}
-	if (amdgpu_sriov_vf(adev))
-		return;
 
 	/* Set default page address. */
 	value = amdgpu_gmc_vram_mc2pa(adev, adev->vram_scratch.gpu_addr);
@@ -331,18 +332,6 @@ static void mmhub_v1_7_program_invalidation(struct amdgpu_device *adev)
 
 static int mmhub_v1_7_gart_enable(struct amdgpu_device *adev)
 {
-	if (amdgpu_sriov_vf(adev)) {
-		/*
-		 * MC_VM_FB_LOCATION_BASE/TOP is NULL for VF, becuase they are
-		 * VF copy registers so vbios post doesn't program them, for
-		 * SRIOV driver need to program them
-		 */
-		WREG32_SOC15(MMHUB, 0, regMC_VM_FB_LOCATION_BASE,
-			     adev->gmc.vram_start >> 24);
-		WREG32_SOC15(MMHUB, 0, regMC_VM_FB_LOCATION_TOP,
-			     adev->gmc.vram_end >> 24);
-	}
-
 	/* GART Enable. */
 	mmhub_v1_7_init_gart_aperture_regs(adev);
 	mmhub_v1_7_init_system_aperture_regs(adev);
-- 
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf
  2021-06-03 14:13 [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location Zhigang Luo
  2021-06-03 14:13 ` [PATCH 2/5] drm/amdgpu: remove sriov vf gfxhub fb location programming Zhigang Luo
  2021-06-03 14:13 ` [PATCH 3/5] drm/amdgpu: remove sriov vf mmhub system aperture and " Zhigang Luo
@ 2021-06-03 14:13 ` Zhigang Luo
  2021-06-03 15:12   ` Liu, Shaoyun
  2021-06-03 14:13 ` [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for " Zhigang Luo
  2021-06-03 15:09 ` [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location Liu, Shaoyun
  4 siblings, 1 reply; 21+ messages in thread
From: Zhigang Luo @ 2021-06-03 14:13 UTC (permalink / raw)
  To: amd-gfx; +Cc: Zhigang Luo

need to load xgmi ta for arcturus and aldebaran sriov vf.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 55378c6b9722..6bd7e39c3e75 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -170,7 +170,8 @@ static int psp_sw_init(void *handle)
 	struct psp_context *psp = &adev->psp;
 	int ret;
 
-	if (!amdgpu_sriov_vf(adev)) {
+	if ((adev->asic_type == CHIP_ARCTURUS) ||
+	    (adev->asic_type == CHIP_ALDEBARAN) || (!amdgpu_sriov_vf(adev))) {
 		ret = psp_init_microcode(psp);
 		if (ret) {
 			DRM_ERROR("Failed to load psp firmware!\n");
-- 
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for sriov vf
  2021-06-03 14:13 [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location Zhigang Luo
                   ` (2 preceding siblings ...)
  2021-06-03 14:13 ` [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf Zhigang Luo
@ 2021-06-03 14:13 ` Zhigang Luo
  2021-06-03 15:14   ` Liu, Shaoyun
  2021-06-03 15:09 ` [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location Liu, Shaoyun
  4 siblings, 1 reply; 21+ messages in thread
From: Zhigang Luo @ 2021-06-03 14:13 UTC (permalink / raw)
  To: amd-gfx; +Cc: Zhigang Luo

psp added new feature to check fw buffer address for sriov vf. the
address range must be in vf fb.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 6bd7e39c3e75..7c0f1017a46b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -2320,11 +2320,20 @@ static int psp_load_fw(struct amdgpu_device *adev)
 	if (!psp->cmd)
 		return -ENOMEM;
 
-	ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,
-					AMDGPU_GEM_DOMAIN_GTT,
-					&psp->fw_pri_bo,
-					&psp->fw_pri_mc_addr,
-					&psp->fw_pri_buf);
+	if (amdgpu_sriov_vf(adev)) {
+		ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,
+						AMDGPU_GEM_DOMAIN_VRAM,
+						&psp->fw_pri_bo,
+						&psp->fw_pri_mc_addr,
+						&psp->fw_pri_buf);
+	} else {
+		ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,
+						AMDGPU_GEM_DOMAIN_GTT,
+						&psp->fw_pri_bo,
+						&psp->fw_pri_mc_addr,
+						&psp->fw_pri_buf);
+	}
+
 	if (ret)
 		goto failed;
 
-- 
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location
  2021-06-03 14:13 [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location Zhigang Luo
                   ` (3 preceding siblings ...)
  2021-06-03 14:13 ` [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for " Zhigang Luo
@ 2021-06-03 15:09 ` Liu, Shaoyun
  2021-06-04  1:13   ` Deng, Emily
  4 siblings, 1 reply; 21+ messages in thread
From: Liu, Shaoyun @ 2021-06-03 15:09 UTC (permalink / raw)
  To: Luo, Zhigang, amd-gfx; +Cc: Luo, Zhigang

[AMD Official Use Only]

Looks ok to me . 

Reviewed-By : Shaoyun.liu <shaoyunl@amd.com>

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location

host driver programmed fb location registers for vf, no need to check anymore.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index ceb3968d8326..1c2d9fde9021 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1292,10 +1292,7 @@ static int gmc_v9_0_late_init(void *handle)  static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
 					struct amdgpu_gmc *mc)
 {
-	u64 base = 0;
-
-	if (!amdgpu_sriov_vf(adev))
-		base = adev->mmhub.funcs->get_fb_location(adev);
+	u64 base = adev->mmhub.funcs->get_fb_location(adev);
 
 	/* add the xgmi offset of the physical node */
 	base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;
--
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 2/5] drm/amdgpu: remove sriov vf gfxhub fb location programming
  2021-06-03 14:13 ` [PATCH 2/5] drm/amdgpu: remove sriov vf gfxhub fb location programming Zhigang Luo
@ 2021-06-03 15:10   ` Liu, Shaoyun
  2021-06-03 15:22     ` Luo, Zhigang
  0 siblings, 1 reply; 21+ messages in thread
From: Liu, Shaoyun @ 2021-06-03 15:10 UTC (permalink / raw)
  To: Luo, Zhigang, amd-gfx; +Cc: Luo, Zhigang

[AMD Official Use Only]

This looks will affect other ASIC , Can you double check that ? 

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: [PATCH 2/5] drm/amdgpu: remove sriov vf gfxhub fb location programming

host driver programmed the gfxhub fb location for vf, no need to program in guest side.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 063e48df0b2d..f51fd0688eca 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -320,18 +320,6 @@ static void gfxhub_v1_0_program_invalidation(struct amdgpu_device *adev)
 
 static int gfxhub_v1_0_gart_enable(struct amdgpu_device *adev)  {
-	if (amdgpu_sriov_vf(adev) && adev->asic_type != CHIP_ARCTURUS) {
-		/*
-		 * MC_VM_FB_LOCATION_BASE/TOP is NULL for VF, becuase they are
-		 * VF copy registers so vbios post doesn't program them, for
-		 * SRIOV driver need to program them
-		 */
-		WREG32_SOC15_RLC(GC, 0, mmMC_VM_FB_LOCATION_BASE,
-			     adev->gmc.vram_start >> 24);
-		WREG32_SOC15_RLC(GC, 0, mmMC_VM_FB_LOCATION_TOP,
-			     adev->gmc.vram_end >> 24);
-	}
-
 	/* GART Enable. */
 	gfxhub_v1_0_init_gart_aperture_regs(adev);
 	gfxhub_v1_0_init_system_aperture_regs(adev);
--
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 3/5] drm/amdgpu: remove sriov vf mmhub system aperture and fb location programming
  2021-06-03 14:13 ` [PATCH 3/5] drm/amdgpu: remove sriov vf mmhub system aperture and " Zhigang Luo
@ 2021-06-03 15:11   ` Liu, Shaoyun
  0 siblings, 0 replies; 21+ messages in thread
From: Liu, Shaoyun @ 2021-06-03 15:11 UTC (permalink / raw)
  To: Luo, Zhigang, amd-gfx; +Cc: Luo, Zhigang

[AMD Official Use Only]

Looks ok to me .

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: [PATCH 3/5] drm/amdgpu: remove sriov vf mmhub system aperture and fb location programming

host driver programmed mmhub system aperture and fb location for vf, no need to program in guest side.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c | 17 +++--------------
 1 file changed, 3 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
index 998e674f9369..f5f7181f9af5 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
@@ -111,6 +111,9 @@ static void mmhub_v1_7_init_system_aperture_regs(struct amdgpu_device *adev)
 	WREG32_SOC15(MMHUB, 0, regMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
 	WREG32_SOC15(MMHUB, 0, regMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
 
+	if (amdgpu_sriov_vf(adev))
+		return;
+
 	/* Program the system aperture low logical page number. */
 	WREG32_SOC15(MMHUB, 0, regMC_VM_SYSTEM_APERTURE_LOW_ADDR,
 		     min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); @@ -129,8 +132,6 @@ static void mmhub_v1_7_init_system_aperture_regs(struct amdgpu_device *adev)
 		WREG32_SOC15(MMHUB, 0, regMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x3FFFFFFF);
 		WREG32_SOC15(MMHUB, 0, regMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0);
 	}
-	if (amdgpu_sriov_vf(adev))
-		return;
 
 	/* Set default page address. */
 	value = amdgpu_gmc_vram_mc2pa(adev, adev->vram_scratch.gpu_addr); @@ -331,18 +332,6 @@ static void mmhub_v1_7_program_invalidation(struct amdgpu_device *adev)
 
 static int mmhub_v1_7_gart_enable(struct amdgpu_device *adev)  {
-	if (amdgpu_sriov_vf(adev)) {
-		/*
-		 * MC_VM_FB_LOCATION_BASE/TOP is NULL for VF, becuase they are
-		 * VF copy registers so vbios post doesn't program them, for
-		 * SRIOV driver need to program them
-		 */
-		WREG32_SOC15(MMHUB, 0, regMC_VM_FB_LOCATION_BASE,
-			     adev->gmc.vram_start >> 24);
-		WREG32_SOC15(MMHUB, 0, regMC_VM_FB_LOCATION_TOP,
-			     adev->gmc.vram_end >> 24);
-	}
-
 	/* GART Enable. */
 	mmhub_v1_7_init_gart_aperture_regs(adev);
 	mmhub_v1_7_init_system_aperture_regs(adev);
--
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf
  2021-06-03 14:13 ` [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf Zhigang Luo
@ 2021-06-03 15:12   ` Liu, Shaoyun
  2021-06-03 15:31     ` Luo, Zhigang
  0 siblings, 1 reply; 21+ messages in thread
From: Liu, Shaoyun @ 2021-06-03 15:12 UTC (permalink / raw)
  To: Luo, Zhigang, amd-gfx; +Cc: Luo, Zhigang

[AMD Official Use Only]

This one  doesn't looks apply to  XGMI TA  only , it's for whole PSP init , can  you double check it ? 


Shaoyun.liu

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf

need to load xgmi ta for arcturus and aldebaran sriov vf.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 55378c6b9722..6bd7e39c3e75 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -170,7 +170,8 @@ static int psp_sw_init(void *handle)
 	struct psp_context *psp = &adev->psp;
 	int ret;
 
-	if (!amdgpu_sriov_vf(adev)) {
+	if ((adev->asic_type == CHIP_ARCTURUS) ||
+	    (adev->asic_type == CHIP_ALDEBARAN) || (!amdgpu_sriov_vf(adev))) {
 		ret = psp_init_microcode(psp);
 		if (ret) {
 			DRM_ERROR("Failed to load psp firmware!\n");
-- 
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for sriov vf
  2021-06-03 14:13 ` [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for " Zhigang Luo
@ 2021-06-03 15:14   ` Liu, Shaoyun
  2021-06-03 15:47     ` Luo, Zhigang
  0 siblings, 1 reply; 21+ messages in thread
From: Liu, Shaoyun @ 2021-06-03 15:14 UTC (permalink / raw)
  To: Luo, Zhigang, amd-gfx; +Cc: Luo, Zhigang

[AMD Official Use Only]

Please double verify whether this feature apply to all aisc PSP supported  since this is not only apply to ARCTURUS and  ALDEBARAN. 

Shaoyun.liu

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for sriov vf

psp added new feature to check fw buffer address for sriov vf. the address range must be in vf fb.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 6bd7e39c3e75..7c0f1017a46b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -2320,11 +2320,20 @@ static int psp_load_fw(struct amdgpu_device *adev)
 	if (!psp->cmd)
 		return -ENOMEM;
 
-	ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,
-					AMDGPU_GEM_DOMAIN_GTT,
-					&psp->fw_pri_bo,
-					&psp->fw_pri_mc_addr,
-					&psp->fw_pri_buf);
+	if (amdgpu_sriov_vf(adev)) {
+		ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,
+						AMDGPU_GEM_DOMAIN_VRAM,
+						&psp->fw_pri_bo,
+						&psp->fw_pri_mc_addr,
+						&psp->fw_pri_buf);
+	} else {
+		ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,
+						AMDGPU_GEM_DOMAIN_GTT,
+						&psp->fw_pri_bo,
+						&psp->fw_pri_mc_addr,
+						&psp->fw_pri_buf);
+	}
+
 	if (ret)
 		goto failed;
 
--
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 2/5] drm/amdgpu: remove sriov vf gfxhub fb location programming
  2021-06-03 15:10   ` Liu, Shaoyun
@ 2021-06-03 15:22     ` Luo, Zhigang
  0 siblings, 0 replies; 21+ messages in thread
From: Luo, Zhigang @ 2021-06-03 15:22 UTC (permalink / raw)
  To: Liu, Shaoyun, amd-gfx

Yes, I double checked all gfx9 ASICs with sriov supported.

-----Original Message-----
From: Liu, Shaoyun <Shaoyun.Liu@amd.com> 
Sent: June 3, 2021 11:11 AM
To: Luo, Zhigang <Zhigang.Luo@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: RE: [PATCH 2/5] drm/amdgpu: remove sriov vf gfxhub fb location programming

[AMD Official Use Only]

This looks will affect other ASIC , Can you double check that ? 

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: [PATCH 2/5] drm/amdgpu: remove sriov vf gfxhub fb location programming

host driver programmed the gfxhub fb location for vf, no need to program in guest side.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 063e48df0b2d..f51fd0688eca 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -320,18 +320,6 @@ static void gfxhub_v1_0_program_invalidation(struct amdgpu_device *adev)
 
 static int gfxhub_v1_0_gart_enable(struct amdgpu_device *adev)  {
-	if (amdgpu_sriov_vf(adev) && adev->asic_type != CHIP_ARCTURUS) {
-		/*
-		 * MC_VM_FB_LOCATION_BASE/TOP is NULL for VF, becuase they are
-		 * VF copy registers so vbios post doesn't program them, for
-		 * SRIOV driver need to program them
-		 */
-		WREG32_SOC15_RLC(GC, 0, mmMC_VM_FB_LOCATION_BASE,
-			     adev->gmc.vram_start >> 24);
-		WREG32_SOC15_RLC(GC, 0, mmMC_VM_FB_LOCATION_TOP,
-			     adev->gmc.vram_end >> 24);
-	}
-
 	/* GART Enable. */
 	gfxhub_v1_0_init_gart_aperture_regs(adev);
 	gfxhub_v1_0_init_system_aperture_regs(adev);
--
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf
  2021-06-03 15:12   ` Liu, Shaoyun
@ 2021-06-03 15:31     ` Luo, Zhigang
  2021-06-07 13:51       ` Zhang, Hawking
  0 siblings, 1 reply; 21+ messages in thread
From: Luo, Zhigang @ 2021-06-03 15:31 UTC (permalink / raw)
  To: Liu, Shaoyun, amd-gfx

Yeah, it will also init psp sos and asd mircrocode. But I think it's harmless.

Thanks,
Zhigang

-----Original Message-----
From: Liu, Shaoyun <Shaoyun.Liu@amd.com> 
Sent: June 3, 2021 11:13 AM
To: Luo, Zhigang <Zhigang.Luo@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: RE: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf

[AMD Official Use Only]

This one  doesn't looks apply to  XGMI TA  only , it's for whole PSP init , can  you double check it ? 


Shaoyun.liu

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf

need to load xgmi ta for arcturus and aldebaran sriov vf.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 55378c6b9722..6bd7e39c3e75 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -170,7 +170,8 @@ static int psp_sw_init(void *handle)
 	struct psp_context *psp = &adev->psp;
 	int ret;
 
-	if (!amdgpu_sriov_vf(adev)) {
+	if ((adev->asic_type == CHIP_ARCTURUS) ||
+	    (adev->asic_type == CHIP_ALDEBARAN) || (!amdgpu_sriov_vf(adev))) {
 		ret = psp_init_microcode(psp);
 		if (ret) {
 			DRM_ERROR("Failed to load psp firmware!\n");
-- 
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for sriov vf
  2021-06-03 15:14   ` Liu, Shaoyun
@ 2021-06-03 15:47     ` Luo, Zhigang
  2021-06-03 16:43       ` Liu, Shaoyun
  0 siblings, 1 reply; 21+ messages in thread
From: Luo, Zhigang @ 2021-06-03 15:47 UTC (permalink / raw)
  To: Liu, Shaoyun, amd-gfx

All new PSP release will have this feature. And it will not cause any failure even the PSP doesn't have this feature yet.

Thanks,
Zhigang

-----Original Message-----
From: Liu, Shaoyun <Shaoyun.Liu@amd.com> 
Sent: June 3, 2021 11:15 AM
To: Luo, Zhigang <Zhigang.Luo@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: RE: [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for sriov vf

[AMD Official Use Only]

Please double verify whether this feature apply to all aisc PSP supported  since this is not only apply to ARCTURUS and  ALDEBARAN. 

Shaoyun.liu

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for sriov vf

psp added new feature to check fw buffer address for sriov vf. the address range must be in vf fb.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 6bd7e39c3e75..7c0f1017a46b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -2320,11 +2320,20 @@ static int psp_load_fw(struct amdgpu_device *adev)
 	if (!psp->cmd)
 		return -ENOMEM;
 
-	ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,
-					AMDGPU_GEM_DOMAIN_GTT,
-					&psp->fw_pri_bo,
-					&psp->fw_pri_mc_addr,
-					&psp->fw_pri_buf);
+	if (amdgpu_sriov_vf(adev)) {
+		ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,
+						AMDGPU_GEM_DOMAIN_VRAM,
+						&psp->fw_pri_bo,
+						&psp->fw_pri_mc_addr,
+						&psp->fw_pri_buf);
+	} else {
+		ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,
+						AMDGPU_GEM_DOMAIN_GTT,
+						&psp->fw_pri_bo,
+						&psp->fw_pri_mc_addr,
+						&psp->fw_pri_buf);
+	}
+
 	if (ret)
 		goto failed;
 
--
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for sriov vf
  2021-06-03 15:47     ` Luo, Zhigang
@ 2021-06-03 16:43       ` Liu, Shaoyun
  0 siblings, 0 replies; 21+ messages in thread
From: Liu, Shaoyun @ 2021-06-03 16:43 UTC (permalink / raw)
  To: Luo, Zhigang, amd-gfx, Zhang, Hawking

[AMD Official Use Only]

I will leave  Hawking to comment on this serial . 

Thanks 
Shaoyun.liu

-----Original Message-----
From: Luo, Zhigang <Zhigang.Luo@amd.com> 
Sent: Thursday, June 3, 2021 11:48 AM
To: Liu, Shaoyun <Shaoyun.Liu@amd.com>; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for sriov vf

All new PSP release will have this feature. And it will not cause any failure even the PSP doesn't have this feature yet.

Thanks,
Zhigang

-----Original Message-----
From: Liu, Shaoyun <Shaoyun.Liu@amd.com> 
Sent: June 3, 2021 11:15 AM
To: Luo, Zhigang <Zhigang.Luo@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: RE: [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for sriov vf

[AMD Official Use Only]

Please double verify whether this feature apply to all aisc PSP supported  since this is not only apply to ARCTURUS and  ALDEBARAN. 

Shaoyun.liu

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for sriov vf

psp added new feature to check fw buffer address for sriov vf. the address range must be in vf fb.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 6bd7e39c3e75..7c0f1017a46b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -2320,11 +2320,20 @@ static int psp_load_fw(struct amdgpu_device *adev)
 	if (!psp->cmd)
 		return -ENOMEM;
 
-	ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,
-					AMDGPU_GEM_DOMAIN_GTT,
-					&psp->fw_pri_bo,
-					&psp->fw_pri_mc_addr,
-					&psp->fw_pri_buf);
+	if (amdgpu_sriov_vf(adev)) {
+		ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,
+						AMDGPU_GEM_DOMAIN_VRAM,
+						&psp->fw_pri_bo,
+						&psp->fw_pri_mc_addr,
+						&psp->fw_pri_buf);
+	} else {
+		ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,
+						AMDGPU_GEM_DOMAIN_GTT,
+						&psp->fw_pri_bo,
+						&psp->fw_pri_mc_addr,
+						&psp->fw_pri_buf);
+	}
+
 	if (ret)
 		goto failed;
 
--
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location
  2021-06-03 15:09 ` [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location Liu, Shaoyun
@ 2021-06-04  1:13   ` Deng, Emily
  2021-06-04 11:14     ` Christian König
  0 siblings, 1 reply; 21+ messages in thread
From: Deng, Emily @ 2021-06-04  1:13 UTC (permalink / raw)
  To: Liu, Shaoyun, Luo, Zhigang, amd-gfx; +Cc: Luo, Zhigang

Do we need to consider backward compatibility?


Best wishes
Emily Deng


>-----Original Message-----
>From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Liu,
>Shaoyun
>Sent: Thursday, June 3, 2021 11:10 PM
>To: Luo, Zhigang <Zhigang.Luo@amd.com>; amd-gfx@lists.freedesktop.org
>Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
>Subject: RE: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb
>location
>
>[AMD Official Use Only]
>
>Looks ok to me .
>
>Reviewed-By : Shaoyun.liu <shaoyunl@amd.com>
>
>-----Original Message-----
>From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Zhigang
>Luo
>Sent: Thursday, June 3, 2021 10:13 AM
>To: amd-gfx@lists.freedesktop.org
>Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
>Subject: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb
>location
>
>host driver programmed fb location registers for vf, no need to check anymore.
>
>Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
>---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +----
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>index ceb3968d8326..1c2d9fde9021 100644
>--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>@@ -1292,10 +1292,7 @@ static int gmc_v9_0_late_init(void *handle)  static
>void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
> 					struct amdgpu_gmc *mc)
> {
>-	u64 base = 0;
>-
>-	if (!amdgpu_sriov_vf(adev))
>-		base = adev->mmhub.funcs->get_fb_location(adev);
>+	u64 base = adev->mmhub.funcs->get_fb_location(adev);
>
> 	/* add the xgmi offset of the physical node */
> 	base += adev->gmc.xgmi.physical_node_id * adev-
>>gmc.xgmi.node_segment_size;
>--
>2.17.1
>
>_______________________________________________
>amd-gfx mailing list
>amd-gfx@lists.freedesktop.org
>https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.fre
>edesktop.org%2Fmailman%2Flistinfo%2Famd-
>gfx&amp;data=04%7C01%7CEmily.Deng%40amd.com%7Cd41e78b1a3af4f08ff
>d108d926a1a2d8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63
>7583297946242271%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi
>LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Nsz
>ZyRZHCxj%2FIJ1hYoSrkv3LpTmF9FbchpNMtQ2GE5M%3D&amp;reserved=0
>_______________________________________________
>amd-gfx mailing list
>amd-gfx@lists.freedesktop.org
>https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.fre
>edesktop.org%2Fmailman%2Flistinfo%2Famd-
>gfx&amp;data=04%7C01%7CEmily.Deng%40amd.com%7Cd41e78b1a3af4f08ff
>d108d926a1a2d8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63
>7583297946242271%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi
>LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Nsz
>ZyRZHCxj%2FIJ1hYoSrkv3LpTmF9FbchpNMtQ2GE5M%3D&amp;reserved=0
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^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location
  2021-06-04  1:13   ` Deng, Emily
@ 2021-06-04 11:14     ` Christian König
  2021-06-04 13:23       ` Luo, Zhigang
  0 siblings, 1 reply; 21+ messages in thread
From: Christian König @ 2021-06-04 11:14 UTC (permalink / raw)
  To: Deng, Emily, Liu, Shaoyun, Luo, Zhigang, amd-gfx

I was just about to question the same thing.

It looks really good to me to have that cleaned up, but if this breaks 
with older versions of the hypervisor then it is a bit questionable change.

Regards,
Christian.

Am 04.06.21 um 03:13 schrieb Deng, Emily:
> Do we need to consider backward compatibility?
>
>
> Best wishes
> Emily Deng
>
>
>> -----Original Message-----
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Liu,
>> Shaoyun
>> Sent: Thursday, June 3, 2021 11:10 PM
>> To: Luo, Zhigang <Zhigang.Luo@amd.com>; amd-gfx@lists.freedesktop.org
>> Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
>> Subject: RE: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb
>> location
>>
>> [AMD Official Use Only]
>>
>> Looks ok to me .
>>
>> Reviewed-By : Shaoyun.liu <shaoyunl@amd.com>
>>
>> -----Original Message-----
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Zhigang
>> Luo
>> Sent: Thursday, June 3, 2021 10:13 AM
>> To: amd-gfx@lists.freedesktop.org
>> Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
>> Subject: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb
>> location
>>
>> host driver programmed fb location registers for vf, no need to check anymore.
>>
>> Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +----
>> 1 file changed, 1 insertion(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> index ceb3968d8326..1c2d9fde9021 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> @@ -1292,10 +1292,7 @@ static int gmc_v9_0_late_init(void *handle)  static
>> void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
>> 					struct amdgpu_gmc *mc)
>> {
>> -	u64 base = 0;
>> -
>> -	if (!amdgpu_sriov_vf(adev))
>> -		base = adev->mmhub.funcs->get_fb_location(adev);
>> +	u64 base = adev->mmhub.funcs->get_fb_location(adev);
>>
>> 	/* add the xgmi offset of the physical node */
>> 	base += adev->gmc.xgmi.physical_node_id * adev-
>>> gmc.xgmi.node_segment_size;
>> --
>> 2.17.1
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.fre
>> edesktop.org%2Fmailman%2Flistinfo%2Famd-
>> gfx&amp;data=04%7C01%7CEmily.Deng%40amd.com%7Cd41e78b1a3af4f08ff
>> d108d926a1a2d8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63
>> 7583297946242271%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi
>> LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Nsz
>> ZyRZHCxj%2FIJ1hYoSrkv3LpTmF9FbchpNMtQ2GE5M%3D&amp;reserved=0
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.fre
>> edesktop.org%2Fmailman%2Flistinfo%2Famd-
>> gfx&amp;data=04%7C01%7CEmily.Deng%40amd.com%7Cd41e78b1a3af4f08ff
>> d108d926a1a2d8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63
>> 7583297946242271%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi
>> LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Nsz
>> ZyRZHCxj%2FIJ1hYoSrkv3LpTmF9FbchpNMtQ2GE5M%3D&amp;reserved=0
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx

_______________________________________________
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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location
  2021-06-04 11:14     ` Christian König
@ 2021-06-04 13:23       ` Luo, Zhigang
  2021-06-04 13:46         ` Christian König
  0 siblings, 1 reply; 21+ messages in thread
From: Luo, Zhigang @ 2021-06-04 13:23 UTC (permalink / raw)
  To: Christian König, Deng, Emily, Liu, Shaoyun, amd-gfx

[AMD Official Use Only]

Here is our hypervisor driver compatibility policy:
        - Host.y supports Guest.y-1, Guest.y, Guest.y+1
        - Guest.y supported by Host.y-1, Host.y,Host.y+1

Host driver had the feature for gfx9 2 years ago. So, this change meet our compatibility policy.

Thanks,
Zhigang

-----Original Message-----
From: Christian König <ckoenig.leichtzumerken@gmail.com>
Sent: June 4, 2021 7:14 AM
To: Deng, Emily <Emily.Deng@amd.com>; Liu, Shaoyun <Shaoyun.Liu@amd.com>; Luo, Zhigang <Zhigang.Luo@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location

I was just about to question the same thing.

It looks really good to me to have that cleaned up, but if this breaks with older versions of the hypervisor then it is a bit questionable change.

Regards,
Christian.

Am 04.06.21 um 03:13 schrieb Deng, Emily:
> Do we need to consider backward compatibility?
>
>
> Best wishes
> Emily Deng
>
>
>> -----Original Message-----
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
>> Liu, Shaoyun
>> Sent: Thursday, June 3, 2021 11:10 PM
>> To: Luo, Zhigang <Zhigang.Luo@amd.com>; amd-gfx@lists.freedesktop.org
>> Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
>> Subject: RE: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from
>> getting fb location
>>
>> [AMD Official Use Only]
>>
>> Looks ok to me .
>>
>> Reviewed-By : Shaoyun.liu <shaoyunl@amd.com>
>>
>> -----Original Message-----
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
>> Zhigang Luo
>> Sent: Thursday, June 3, 2021 10:13 AM
>> To: amd-gfx@lists.freedesktop.org
>> Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
>> Subject: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from
>> getting fb location
>>
>> host driver programmed fb location registers for vf, no need to check anymore.
>>
>> Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +----
>> 1 file changed, 1 insertion(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> index ceb3968d8326..1c2d9fde9021 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> @@ -1292,10 +1292,7 @@ static int gmc_v9_0_late_init(void *handle)
>> static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
>>                                      struct amdgpu_gmc *mc)
>> {
>> -    u64 base = 0;
>> -
>> -    if (!amdgpu_sriov_vf(adev))
>> -            base = adev->mmhub.funcs->get_fb_location(adev);
>> +    u64 base = adev->mmhub.funcs->get_fb_location(adev);
>>
>>      /* add the xgmi offset of the physical node */
>>      base += adev->gmc.xgmi.physical_node_id * adev-
>>> gmc.xgmi.node_segment_size;
>> --
>> 2.17.1
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flis
>> ts.fre
>> edesktop.org%2Fmailman%2Flistinfo%2Famd-
>> gfx&amp;data=04%7C01%7CEmily.Deng%40amd.com%7Cd41e78b1a3af4f08ff
>> d108d926a1a2d8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63
>> 7583297946242271%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi
>> LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Nsz
>> ZyRZHCxj%2FIJ1hYoSrkv3LpTmF9FbchpNMtQ2GE5M%3D&amp;reserved=0
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flis
>> ts.fre
>> edesktop.org%2Fmailman%2Flistinfo%2Famd-
>> gfx&amp;data=04%7C01%7CEmily.Deng%40amd.com%7Cd41e78b1a3af4f08ff
>> d108d926a1a2d8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63
>> 7583297946242271%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi
>> LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Nsz
>> ZyRZHCxj%2FIJ1hYoSrkv3LpTmF9FbchpNMtQ2GE5M%3D&amp;reserved=0
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CZh
> igang.Luo%40amd.com%7C9b87dfa195ed4e84a8c808d92749e416%7C3dd8961fe4884
> e608e11a82d994e183d%7C0%7C0%7C637584020581460118%7CUnknown%7CTWFpbGZsb
> 3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%
> 7C1000&amp;sdata=3S6ZEnCCMHHlfc%2B6xmLDz7Bgn91Is7EIpMS7WRxq0Jo%3D&amp;
> reserved=0

_______________________________________________
amd-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location
  2021-06-04 13:23       ` Luo, Zhigang
@ 2021-06-04 13:46         ` Christian König
  2021-06-04 14:06           ` Luo, Zhigang
  0 siblings, 1 reply; 21+ messages in thread
From: Christian König @ 2021-06-04 13:46 UTC (permalink / raw)
  To: Luo, Zhigang, Deng, Emily, Liu, Shaoyun, amd-gfx

Well, but are you the one defining the compatibility policy?

See usually Linux kernel code compatibility policy is that existing 
stuff needs to work forever.

We could argue a bit that the hypervisor components are not open source 
nor uAPI, but that argument is rather thin.

Christian.

Am 04.06.21 um 15:23 schrieb Luo, Zhigang:
> [AMD Official Use Only]
>
> Here is our hypervisor driver compatibility policy:
>          - Host.y supports Guest.y-1, Guest.y, Guest.y+1
>          - Guest.y supported by Host.y-1, Host.y,Host.y+1
>
> Host driver had the feature for gfx9 2 years ago. So, this change meet our compatibility policy.
>
> Thanks,
> Zhigang
>
> -----Original Message-----
> From: Christian König <ckoenig.leichtzumerken@gmail.com>
> Sent: June 4, 2021 7:14 AM
> To: Deng, Emily <Emily.Deng@amd.com>; Liu, Shaoyun <Shaoyun.Liu@amd.com>; Luo, Zhigang <Zhigang.Luo@amd.com>; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location
>
> I was just about to question the same thing.
>
> It looks really good to me to have that cleaned up, but if this breaks with older versions of the hypervisor then it is a bit questionable change.
>
> Regards,
> Christian.
>
> Am 04.06.21 um 03:13 schrieb Deng, Emily:
>> Do we need to consider backward compatibility?
>>
>>
>> Best wishes
>> Emily Deng
>>
>>
>>> -----Original Message-----
>>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
>>> Liu, Shaoyun
>>> Sent: Thursday, June 3, 2021 11:10 PM
>>> To: Luo, Zhigang <Zhigang.Luo@amd.com>; amd-gfx@lists.freedesktop.org
>>> Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
>>> Subject: RE: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from
>>> getting fb location
>>>
>>> [AMD Official Use Only]
>>>
>>> Looks ok to me .
>>>
>>> Reviewed-By : Shaoyun.liu <shaoyunl@amd.com>
>>>
>>> -----Original Message-----
>>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
>>> Zhigang Luo
>>> Sent: Thursday, June 3, 2021 10:13 AM
>>> To: amd-gfx@lists.freedesktop.org
>>> Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
>>> Subject: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from
>>> getting fb location
>>>
>>> host driver programmed fb location registers for vf, no need to check anymore.
>>>
>>> Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +----
>>> 1 file changed, 1 insertion(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> index ceb3968d8326..1c2d9fde9021 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> @@ -1292,10 +1292,7 @@ static int gmc_v9_0_late_init(void *handle)
>>> static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
>>>                                       struct amdgpu_gmc *mc)
>>> {
>>> -    u64 base = 0;
>>> -
>>> -    if (!amdgpu_sriov_vf(adev))
>>> -            base = adev->mmhub.funcs->get_fb_location(adev);
>>> +    u64 base = adev->mmhub.funcs->get_fb_location(adev);
>>>
>>>       /* add the xgmi offset of the physical node */
>>>       base += adev->gmc.xgmi.physical_node_id * adev-
>>>> gmc.xgmi.node_segment_size;
>>> --
>>> 2.17.1
>>>
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx@lists.freedesktop.org
>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flis
>>> ts.fre
>>> edesktop.org%2Fmailman%2Flistinfo%2Famd-
>>> gfx&amp;data=04%7C01%7CEmily.Deng%40amd.com%7Cd41e78b1a3af4f08ff
>>> d108d926a1a2d8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63
>>> 7583297946242271%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi
>>> LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Nsz
>>> ZyRZHCxj%2FIJ1hYoSrkv3LpTmF9FbchpNMtQ2GE5M%3D&amp;reserved=0
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx@lists.freedesktop.org
>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flis
>>> ts.fre
>>> edesktop.org%2Fmailman%2Flistinfo%2Famd-
>>> gfx&amp;data=04%7C01%7CEmily.Deng%40amd.com%7Cd41e78b1a3af4f08ff
>>> d108d926a1a2d8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63
>>> 7583297946242271%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi
>>> LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Nsz
>>> ZyRZHCxj%2FIJ1hYoSrkv3LpTmF9FbchpNMtQ2GE5M%3D&amp;reserved=0
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
>> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CZh
>> igang.Luo%40amd.com%7C9b87dfa195ed4e84a8c808d92749e416%7C3dd8961fe4884
>> e608e11a82d994e183d%7C0%7C0%7C637584020581460118%7CUnknown%7CTWFpbGZsb
>> 3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%
>> 7C1000&amp;sdata=3S6ZEnCCMHHlfc%2B6xmLDz7Bgn91Is7EIpMS7WRxq0Jo%3D&amp;
>> reserved=0

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location
  2021-06-04 13:46         ` Christian König
@ 2021-06-04 14:06           ` Luo, Zhigang
  0 siblings, 0 replies; 21+ messages in thread
From: Luo, Zhigang @ 2021-06-04 14:06 UTC (permalink / raw)
  To: Christian König, Deng, Emily, Liu, Shaoyun, amd-gfx, Nieto, David M

[AMD Official Use Only]

The policy is defined by our virtualization team to guarantee end user experience and reduce maintenance work.

Added David, virtualization team architect.

David, could you help to add more comments?

Thanks,
Zhigang

-----Original Message-----
From: Christian König <ckoenig.leichtzumerken@gmail.com>
Sent: June 4, 2021 9:46 AM
To: Luo, Zhigang <Zhigang.Luo@amd.com>; Deng, Emily <Emily.Deng@amd.com>; Liu, Shaoyun <Shaoyun.Liu@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location

Well, but are you the one defining the compatibility policy?

See usually Linux kernel code compatibility policy is that existing stuff needs to work forever.

We could argue a bit that the hypervisor components are not open source nor uAPI, but that argument is rather thin.

Christian.

Am 04.06.21 um 15:23 schrieb Luo, Zhigang:
> [AMD Official Use Only]
>
> Here is our hypervisor driver compatibility policy:
>          - Host.y supports Guest.y-1, Guest.y, Guest.y+1
>          - Guest.y supported by Host.y-1, Host.y,Host.y+1
>
> Host driver had the feature for gfx9 2 years ago. So, this change meet our compatibility policy.
>
> Thanks,
> Zhigang
>
> -----Original Message-----
> From: Christian König <ckoenig.leichtzumerken@gmail.com>
> Sent: June 4, 2021 7:14 AM
> To: Deng, Emily <Emily.Deng@amd.com>; Liu, Shaoyun
> <Shaoyun.Liu@amd.com>; Luo, Zhigang <Zhigang.Luo@amd.com>;
> amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from
> getting fb location
>
> I was just about to question the same thing.
>
> It looks really good to me to have that cleaned up, but if this breaks with older versions of the hypervisor then it is a bit questionable change.
>
> Regards,
> Christian.
>
> Am 04.06.21 um 03:13 schrieb Deng, Emily:
>> Do we need to consider backward compatibility?
>>
>>
>> Best wishes
>> Emily Deng
>>
>>
>>> -----Original Message-----
>>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
>>> Liu, Shaoyun
>>> Sent: Thursday, June 3, 2021 11:10 PM
>>> To: Luo, Zhigang <Zhigang.Luo@amd.com>;
>>> amd-gfx@lists.freedesktop.org
>>> Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
>>> Subject: RE: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from
>>> getting fb location
>>>
>>> [AMD Official Use Only]
>>>
>>> Looks ok to me .
>>>
>>> Reviewed-By : Shaoyun.liu <shaoyunl@amd.com>
>>>
>>> -----Original Message-----
>>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
>>> Zhigang Luo
>>> Sent: Thursday, June 3, 2021 10:13 AM
>>> To: amd-gfx@lists.freedesktop.org
>>> Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
>>> Subject: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from
>>> getting fb location
>>>
>>> host driver programmed fb location registers for vf, no need to check anymore.
>>>
>>> Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +----
>>> 1 file changed, 1 insertion(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> index ceb3968d8326..1c2d9fde9021 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> @@ -1292,10 +1292,7 @@ static int gmc_v9_0_late_init(void *handle)
>>> static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
>>>                                       struct amdgpu_gmc *mc) {
>>> -    u64 base = 0;
>>> -
>>> -    if (!amdgpu_sriov_vf(adev))
>>> -            base = adev->mmhub.funcs->get_fb_location(adev);
>>> +    u64 base = adev->mmhub.funcs->get_fb_location(adev);
>>>
>>>       /* add the xgmi offset of the physical node */
>>>       base += adev->gmc.xgmi.physical_node_id * adev-
>>>> gmc.xgmi.node_segment_size;
>>> --
>>> 2.17.1
>>>
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx@lists.freedesktop.org
>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fli
>>> s
>>> ts.fre
>>> edesktop.org%2Fmailman%2Flistinfo%2Famd-
>>> gfx&amp;data=04%7C01%7CEmily.Deng%40amd.com%7Cd41e78b1a3af4f08ff
>>> d108d926a1a2d8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63
>>> 7583297946242271%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi
>>> LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Nsz
>>> ZyRZHCxj%2FIJ1hYoSrkv3LpTmF9FbchpNMtQ2GE5M%3D&amp;reserved=0
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx@lists.freedesktop.org
>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fli
>>> s
>>> ts.fre
>>> edesktop.org%2Fmailman%2Flistinfo%2Famd-
>>> gfx&amp;data=04%7C01%7CEmily.Deng%40amd.com%7Cd41e78b1a3af4f08ff
>>> d108d926a1a2d8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63
>>> 7583297946242271%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi
>>> LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Nsz
>>> ZyRZHCxj%2FIJ1hYoSrkv3LpTmF9FbchpNMtQ2GE5M%3D&amp;reserved=0
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flis
>> t
>> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CZ
>> h
>> igang.Luo%40amd.com%7C9b87dfa195ed4e84a8c808d92749e416%7C3dd8961fe488
>> 4
>> e608e11a82d994e183d%7C0%7C0%7C637584020581460118%7CUnknown%7CTWFpbGZs
>> b
>> 3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D
>> %
>> 7C1000&amp;sdata=3S6ZEnCCMHHlfc%2B6xmLDz7Bgn91Is7EIpMS7WRxq0Jo%3D&amp
>> ;
>> reserved=0

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf
  2021-06-03 15:31     ` Luo, Zhigang
@ 2021-06-07 13:51       ` Zhang, Hawking
  2021-06-07 13:59         ` Luo, Zhigang
  0 siblings, 1 reply; 21+ messages in thread
From: Zhang, Hawking @ 2021-06-07 13:51 UTC (permalink / raw)
  To: Luo, Zhigang, Liu, Shaoyun, amd-gfx

[AMD Official Use Only]

You can call psp_init_ta_microcode directly in sriov vf case so you don't need to initialize unnecessary psp firmware structures. 

Regards,
Hawking
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Luo, Zhigang
Sent: Thursday, June 3, 2021 23:32
To: Liu, Shaoyun <Shaoyun.Liu@amd.com>; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf

Yeah, it will also init psp sos and asd mircrocode. But I think it's harmless.

Thanks,
Zhigang

-----Original Message-----
From: Liu, Shaoyun <Shaoyun.Liu@amd.com> 
Sent: June 3, 2021 11:13 AM
To: Luo, Zhigang <Zhigang.Luo@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: RE: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf

[AMD Official Use Only]

This one  doesn't looks apply to  XGMI TA  only , it's for whole PSP init , can  you double check it ? 


Shaoyun.liu

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf

need to load xgmi ta for arcturus and aldebaran sriov vf.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 55378c6b9722..6bd7e39c3e75 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -170,7 +170,8 @@ static int psp_sw_init(void *handle)
 	struct psp_context *psp = &adev->psp;
 	int ret;
 
-	if (!amdgpu_sriov_vf(adev)) {
+	if ((adev->asic_type == CHIP_ARCTURUS) ||
+	    (adev->asic_type == CHIP_ALDEBARAN) || (!amdgpu_sriov_vf(adev))) {
 		ret = psp_init_microcode(psp);
 		if (ret) {
 			DRM_ERROR("Failed to load psp firmware!\n");
-- 
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf
  2021-06-07 13:51       ` Zhang, Hawking
@ 2021-06-07 13:59         ` Luo, Zhigang
  0 siblings, 0 replies; 21+ messages in thread
From: Luo, Zhigang @ 2021-06-07 13:59 UTC (permalink / raw)
  To: Zhang, Hawking, Liu, Shaoyun, amd-gfx

[Public]

Okay. I will update the change as you suggested.

Thanks,
Zhigang

-----Original Message-----
From: Zhang, Hawking <Hawking.Zhang@amd.com>
Sent: June 7, 2021 9:52 AM
To: Luo, Zhigang <Zhigang.Luo@amd.com>; Liu, Shaoyun <Shaoyun.Liu@amd.com>; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf

[AMD Official Use Only]

You can call psp_init_ta_microcode directly in sriov vf case so you don't need to initialize unnecessary psp firmware structures.

Regards,
Hawking
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Luo, Zhigang
Sent: Thursday, June 3, 2021 23:32
To: Liu, Shaoyun <Shaoyun.Liu@amd.com>; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf

Yeah, it will also init psp sos and asd mircrocode. But I think it's harmless.

Thanks,
Zhigang

-----Original Message-----
From: Liu, Shaoyun <Shaoyun.Liu@amd.com>
Sent: June 3, 2021 11:13 AM
To: Luo, Zhigang <Zhigang.Luo@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: RE: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf

[AMD Official Use Only]

This one  doesn't looks apply to  XGMI TA  only , it's for whole PSP init , can  you double check it ?


Shaoyun.liu

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang <Zhigang.Luo@amd.com>
Subject: [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf

need to load xgmi ta for arcturus and aldebaran sriov vf.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 55378c6b9722..6bd7e39c3e75 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -170,7 +170,8 @@ static int psp_sw_init(void *handle)
        struct psp_context *psp = &adev->psp;
        int ret;

-       if (!amdgpu_sriov_vf(adev)) {
+       if ((adev->asic_type == CHIP_ARCTURUS) ||
+           (adev->asic_type == CHIP_ALDEBARAN) || (!amdgpu_sriov_vf(adev))) {
                ret = psp_init_microcode(psp);
                if (ret) {
                        DRM_ERROR("Failed to load psp firmware!\n");
--
2.17.1

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^ permalink raw reply	[flat|nested] 21+ messages in thread

end of thread, other threads:[~2021-06-07 13:59 UTC | newest]

Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-03 14:13 [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location Zhigang Luo
2021-06-03 14:13 ` [PATCH 2/5] drm/amdgpu: remove sriov vf gfxhub fb location programming Zhigang Luo
2021-06-03 15:10   ` Liu, Shaoyun
2021-06-03 15:22     ` Luo, Zhigang
2021-06-03 14:13 ` [PATCH 3/5] drm/amdgpu: remove sriov vf mmhub system aperture and " Zhigang Luo
2021-06-03 15:11   ` Liu, Shaoyun
2021-06-03 14:13 ` [PATCH 4/5] drm/amdgpu: add psp microcode init for arcturus and aldebaran sriov vf Zhigang Luo
2021-06-03 15:12   ` Liu, Shaoyun
2021-06-03 15:31     ` Luo, Zhigang
2021-06-07 13:51       ` Zhang, Hawking
2021-06-07 13:59         ` Luo, Zhigang
2021-06-03 14:13 ` [PATCH 5/5] drm/amdgpu: allocate psp fw private buffer from VRAM for " Zhigang Luo
2021-06-03 15:14   ` Liu, Shaoyun
2021-06-03 15:47     ` Luo, Zhigang
2021-06-03 16:43       ` Liu, Shaoyun
2021-06-03 15:09 ` [PATCH 1/5] drm/amdgpu: remove sriov vf checking from getting fb location Liu, Shaoyun
2021-06-04  1:13   ` Deng, Emily
2021-06-04 11:14     ` Christian König
2021-06-04 13:23       ` Luo, Zhigang
2021-06-04 13:46         ` Christian König
2021-06-04 14:06           ` Luo, Zhigang

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