From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA8E8C47082 for ; Thu, 3 Jun 2021 14:34:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CF099613F1 for ; Thu, 3 Jun 2021 14:34:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231652AbhFCOgY (ORCPT ); Thu, 3 Jun 2021 10:36:24 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:47326 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231630AbhFCOgX (ORCPT ); Thu, 3 Jun 2021 10:36:23 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 153EYWa5016247; Thu, 3 Jun 2021 09:34:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1622730872; bh=d25adAQTHIhK8xu231K6wCqeHrpmx4tmRcUXIbpfpDI=; h=From:To:CC:Subject:Date; b=PRmk8x1244nP/+6Sm9gFVHvb1CIo7UPEMRzXR3aLX0VV5PsVzHD09WVpfVaMSLW3z juCANTfWNXFfC/pIUbtKnpQdOR7AIsQFyalNSHUn+vP5ObvS66p5da0VgjV0TWnG4w wclSL9U8HBCb40/4aUB5cpAkI1OnMDqdh0BzIzKo= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 153EYWMo096967 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 3 Jun 2021 09:34:32 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Thu, 3 Jun 2021 09:34:31 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Thu, 3 Jun 2021 09:34:32 -0500 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 153EYRDI011740; Thu, 3 Jun 2021 09:34:28 -0500 From: Kishon Vijay Abraham I To: Nishanth Menon , Tero Kristo , Rob Herring CC: , , , Kishon Vijay Abraham I , Lokesh Vutla Subject: [PATCH v2 0/4] J721E: Use external clock in EVM for SERDES Date: Thu, 3 Jun 2021 20:04:23 +0530 Message-ID: <20210603143427.28735-1-kishon@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org J721E EVM has clock generator that feeds both to the SERDES and to the PCIe slot present in the EVM. In order to use common reference clock on either side of the link, configure SERDES to use external reference clock. Previously SERDES used internal reference clock and the attached device used clock from clock generator in the EVM. Changes from v1: 1) Fixed clock names as suggested by Nishanth 2) Limit to < 100 lines v1: http://lore.kernell.org/r/20210512151209.27560-1-kishon@ti.com Kishon Vijay Abraham I (4): arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES arm64: dts: ti: k3-j721e-main: Add #clock-cells property to serdes DT node arm64: dts: ti: k3-j721e-common-proc-board: Use external clock for SERDES arm64: dts: ti: k3-j721e-common-proc-board: Re-name "link" name as "phy" .../dts/ti/k3-j721e-common-proc-board.dts | 52 ++++++++++- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 86 +++++++++++-------- 2 files changed, 98 insertions(+), 40 deletions(-) -- 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58DB0C47082 for ; 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Thu, 3 Jun 2021 09:34:28 -0500 From: Kishon Vijay Abraham I To: Nishanth Menon , Tero Kristo , Rob Herring CC: , , , Kishon Vijay Abraham I , Lokesh Vutla Subject: [PATCH v2 0/4] J721E: Use external clock in EVM for SERDES Date: Thu, 3 Jun 2021 20:04:23 +0530 Message-ID: <20210603143427.28735-1-kishon@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210603_073434_530049_8EF77425 X-CRM114-Status: UNSURE ( 7.47 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org J721E EVM has clock generator that feeds both to the SERDES and to the PCIe slot present in the EVM. In order to use common reference clock on either side of the link, configure SERDES to use external reference clock. Previously SERDES used internal reference clock and the attached device used clock from clock generator in the EVM. Changes from v1: 1) Fixed clock names as suggested by Nishanth 2) Limit to < 100 lines v1: http://lore.kernell.org/r/20210512151209.27560-1-kishon@ti.com Kishon Vijay Abraham I (4): arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES arm64: dts: ti: k3-j721e-main: Add #clock-cells property to serdes DT node arm64: dts: ti: k3-j721e-common-proc-board: Use external clock for SERDES arm64: dts: ti: k3-j721e-common-proc-board: Re-name "link" name as "phy" .../dts/ti/k3-j721e-common-proc-board.dts | 52 ++++++++++- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 86 +++++++++++-------- 2 files changed, 98 insertions(+), 40 deletions(-) -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel