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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id m7sm3856470wrv.35.2021.06.03.08.59.16 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Jun 2021 08:59:17 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 15/45] target/arm: use raise_exception_ra for stack limit exception Date: Thu, 3 Jun 2021 16:58:34 +0100 Message-Id: <20210603155904.26021-16-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210603155904.26021-1-peter.maydell@linaro.org> References: <20210603155904.26021-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Jamie Iles The sequence cpu_restore_state() + raise_exception() is equivalent to raise_exception_ra(), so use that instead. (In this case we never cared about the syndrome value, because M-profile doesn't use the syndrome; the old code was just written unnecessarily awkwardly.) Cc: Richard Henderson Cc: Peter Maydell Signed-off-by: Jamie Iles [PMM: Retain edited version of comment; rewrite commit message] Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/m_helper.c | 5 +---- target/arm/op_helper.c | 9 +++------ 2 files changed, 4 insertions(+), 10 deletions(-) diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index eda74e55450..074c5434550 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -2601,10 +2601,7 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val) limit = is_psp ? env->v7m.psplim[false] : env->v7m.msplim[false]; if (val < limit) { - CPUState *cs = env_cpu(env); - - cpu_restore_state(cs, GETPC(), true); - raise_exception(env, EXCP_STKOF, 0, 1); + raise_exception_ra(env, EXCP_STKOF, 0, 1, GETPC()); } if (is_psp) { diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index 4132f5e430f..e98fd863057 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -95,15 +95,12 @@ void HELPER(v8m_stackcheck)(CPUARMState *env, uint32_t newvalue) * raising an exception if the limit is breached. */ if (newvalue < v7m_sp_limit(env)) { - CPUState *cs = env_cpu(env); - /* * Stack limit exceptions are a rare case, so rather than syncing - * PC/condbits before the call, we use cpu_restore_state() to - * get them right before raising the exception. + * PC/condbits before the call, we use raise_exception_ra() so + * that cpu_restore_state() will sort them out. */ - cpu_restore_state(cs, GETPC(), true); - raise_exception(env, EXCP_STKOF, 0, 1); + raise_exception_ra(env, EXCP_STKOF, 0, 1, GETPC()); } } -- 2.20.1