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[81.231.232.130]) by smtp.gmail.com with ESMTPSA id w4sm412213ljo.1.2021.06.03.09.30.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Jun 2021 09:30:18 -0700 (PDT) Date: Thu, 3 Jun 2021 18:30:18 +0200 From: "Edgar E. Iglesias" To: Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= Subject: Re: [PATCH 3/6] target/microblaze: Assert transaction failures have exception enabled Message-ID: <20210603163018.GJ477672@toto> References: <20210603090310.2749892-1-f4bug@amsat.org> <20210603090310.2749892-4-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20210603090310.2749892-4-f4bug@amsat.org> Received-SPF: pass client-ip=2a00:1450:4864:20::135; envelope-from=edgar.iglesias@gmail.com; helo=mail-lf1-x135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Alistair Francis , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, Jun 03, 2021 at 11:03:07AM +0200, Philippe Mathieu-Daudé wrote: > If exceptions are disabled, we must not get a transaction failure. > Assert they are enabled passed that point. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/microblaze/op_helper.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c > index 8d20522ee88..1048e656e27 100644 > --- a/target/microblaze/op_helper.c > +++ b/target/microblaze/op_helper.c > @@ -122,9 +122,7 @@ void mb_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, > access_type == MMU_INST_FETCH ? "INST_FETCH" : > (access_type == MMU_DATA_LOAD ? "DATA_LOAD" : "DATA_STORE")); > > - if (!(env->msr & MSR_EE)) { > - return; > - } > + assert(env->msr & MSR_EE); This doesn't look correct. MSR_EE is a runtime flag... > > if (access_type == MMU_INST_FETCH) { > if (!cpu->cfg.iopb_bus_exception) { > -- > 2.26.3 >