From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E82C8C4708F for ; Fri, 4 Jun 2021 06:10:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C6CDE6140B for ; Fri, 4 Jun 2021 06:10:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229948AbhFDGLw (ORCPT ); Fri, 4 Jun 2021 02:11:52 -0400 Received: from ZXSHCAS1.zhaoxin.com ([203.148.12.81]:34941 "EHLO ZXSHCAS1.zhaoxin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229820AbhFDGLv (ORCPT ); Fri, 4 Jun 2021 02:11:51 -0400 X-Greylist: delayed 902 seconds by postgrey-1.27 at vger.kernel.org; Fri, 04 Jun 2021 02:11:50 EDT Received: from zxbjmbx2.zhaoxin.com (10.29.252.164) by ZXSHCAS1.zhaoxin.com (10.28.252.161) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Fri, 4 Jun 2021 13:54:56 +0800 Received: from zx.zhaoxin.com (10.28.64.91) by zxbjmbx2.zhaoxin.com (10.29.252.164) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Fri, 4 Jun 2021 13:54:55 +0800 From: Cody Yao-oc To: , , , , , , , , , , CC: , , CodyYao-oc Subject: [PATCH] x86/perf: Fixed obtaining address error about performance monitor MSR on old Inel CPU. Date: Fri, 4 Jun 2021 13:54:38 +0800 Message-ID: <20210604055438.17705-1-CodyYao-oc@zhaoxin.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.28.64.91] X-ClientProxiedBy: ZXSHCAS1.zhaoxin.com (10.28.252.161) To zxbjmbx2.zhaoxin.com (10.29.252.164) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: CodyYao-oc Fix "obtain wrong msr address" bug in function nmi_perfctr_msr_to_bit and nmi_eventsel_msr_to_bit. In X86_VENDOR_INTEL switch branch, if all of the check conditions are not met, code flow will slip to X86_VENDOR_ZHAOXIN branch which may lead to incorrect information. Therefore, "fallthrough" should be changed to "break" to avoid it. Signed-off-by: CodyYao-oc --- arch/x86/kernel/cpu/perfctr-watchdog.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c index 3ef5868ac588..7aecb2fc3186 100644 --- a/arch/x86/kernel/cpu/perfctr-watchdog.c +++ b/arch/x86/kernel/cpu/perfctr-watchdog.c @@ -63,7 +63,7 @@ static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr) case 15: return msr - MSR_P4_BPU_PERFCTR0; } - fallthrough; + break; case X86_VENDOR_ZHAOXIN: case X86_VENDOR_CENTAUR: return msr - MSR_ARCH_PERFMON_PERFCTR0; @@ -96,7 +96,7 @@ static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr) case 15: return msr - MSR_P4_BSU_ESCR0; } - fallthrough; + break; case X86_VENDOR_ZHAOXIN: case X86_VENDOR_CENTAUR: return msr - MSR_ARCH_PERFMON_EVENTSEL0; -- 2.17.1