* [PATCH] board: stm32mp1: correct the property name for eth
@ 2021-06-04 16:25 Patrick Delaunay
0 siblings, 0 replies; 4+ messages in thread
From: Patrick Delaunay @ 2021-06-04 16:25 UTC (permalink / raw)
To: u-boot
Cc: Marek Vasut, Christophe Roullier, Patrick Delaunay,
Patrice Chotard, U-Boot STM32, u-boot
Use the correct name for STMicroelectronics phys config properties,
replace '_' by '-':
"st,eth_clk_sel" => "st,eth-clk-sel"
"st,eth-ref-clk-sel" => st,eth-clk-sel"
These property name are aligned with the upstreamed Linux kernel binding:
linux/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
See Linux kernel commit "dt-bindings: net: stmmac: add phys config
properties" merged in v5.1-rc1.
This patch allow to reuse the kernel device tree directly in U-Boot.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
---
board/dhelectronics/dh_stm32mp1/board.c | 4 ++--
board/st/stm32mp1/stm32mp1.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c
index ac1af718d4..d7c1857c16 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -660,11 +660,11 @@ int board_interface_eth_init(struct udevice *dev,
bool eth_ref_clk_sel_reg = false;
/* Gigabit Ethernet 125MHz clock selection. */
- eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
+ eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
/* Ethernet 50Mhz RMII clock selection */
eth_ref_clk_sel_reg =
- dev_read_bool(dev, "st,eth_ref_clk_sel");
+ dev_read_bool(dev, "st,eth-ref-clk-sel");
syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 261ec15e1b..18b8870269 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -733,11 +733,11 @@ int board_interface_eth_init(struct udevice *dev,
bool eth_ref_clk_sel_reg = false;
/* Gigabit Ethernet 125MHz clock selection. */
- eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
+ eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
/* Ethernet 50Mhz RMII clock selection */
eth_ref_clk_sel_reg =
- dev_read_bool(dev, "st,eth_ref_clk_sel");
+ dev_read_bool(dev, "st,eth-ref-clk-sel");
syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] board: stm32mp1: correct the property name for eth
2021-06-04 16:30 Patrick Delaunay
2021-06-18 6:32 ` Patrice CHOTARD
@ 2021-06-18 7:02 ` Patrice CHOTARD
1 sibling, 0 replies; 4+ messages in thread
From: Patrice CHOTARD @ 2021-06-18 7:02 UTC (permalink / raw)
To: Patrick Delaunay, u-boot
Cc: Marek Vasut, Christophe Roullier, U-Boot STM32, u-boot
Hi Patrick
It seems that my previous reviewed-by of this patch encountered an issue, so do it again.
On 6/4/21 6:30 PM, Patrick Delaunay wrote:
> Use the correct name for STMicroelectronics phys config properties,
> replace '_' by '-':
> "st,eth_clk_sel" => "st,eth-clk-sel"
> "st,eth-ref-clk-sel" => st,eth-clk-sel"
>
> These property name are aligned with the upstreamed Linux kernel binding:
> linux/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
>
> See Linux kernel commit "dt-bindings: net: stmmac: add phys config
> properties" merged in v5.1-rc1.
>
> This patch allow to reuse the kernel device tree directly in U-Boot.
>
> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
> ---
>
> board/dhelectronics/dh_stm32mp1/board.c | 4 ++--
> board/st/stm32mp1/stm32mp1.c | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c
> index ac1af718d4..d7c1857c16 100644
> --- a/board/dhelectronics/dh_stm32mp1/board.c
> +++ b/board/dhelectronics/dh_stm32mp1/board.c
> @@ -660,11 +660,11 @@ int board_interface_eth_init(struct udevice *dev,
> bool eth_ref_clk_sel_reg = false;
>
> /* Gigabit Ethernet 125MHz clock selection. */
> - eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
> + eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
>
> /* Ethernet 50Mhz RMII clock selection */
> eth_ref_clk_sel_reg =
> - dev_read_bool(dev, "st,eth_ref_clk_sel");
> + dev_read_bool(dev, "st,eth-ref-clk-sel");
>
> syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
>
> diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
> index 261ec15e1b..18b8870269 100644
> --- a/board/st/stm32mp1/stm32mp1.c
> +++ b/board/st/stm32mp1/stm32mp1.c
> @@ -733,11 +733,11 @@ int board_interface_eth_init(struct udevice *dev,
> bool eth_ref_clk_sel_reg = false;
>
> /* Gigabit Ethernet 125MHz clock selection. */
> - eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
> + eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
>
> /* Ethernet 50Mhz RMII clock selection */
> eth_ref_clk_sel_reg =
> - dev_read_bool(dev, "st,eth_ref_clk_sel");
> + dev_read_bool(dev, "st,eth-ref-clk-sel");
>
> syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
>
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] board: stm32mp1: correct the property name for eth
2021-06-04 16:30 Patrick Delaunay
@ 2021-06-18 6:32 ` Patrice CHOTARD
2021-06-18 7:02 ` Patrice CHOTARD
1 sibling, 0 replies; 4+ messages in thread
From: Patrice CHOTARD @ 2021-06-18 6:32 UTC (permalink / raw)
To: Patrick Delaunay, u-boot
Cc: Marek Vasut, Christophe Roullier, U-Boot STM32, u-boot
Hi Patrick
On 6/4/21 6:30 PM, Patrick Delaunay wrote:
> Use the correct name for STMicroelectronics phys config properties,
> replace '_' by '-':
> "st,eth_clk_sel" => "st,eth-clk-sel"
> "st,eth-ref-clk-sel" => st,eth-clk-sel"
>
> These property name are aligned with the upstreamed Linux kernel binding:
> linux/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
>
> See Linux kernel commit "dt-bindings: net: stmmac: add phys config
> properties" merged in v5.1-rc1.
>
> This patch allow to reuse the kernel device tree directly in U-Boot.
>
> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
> ---
>
> board/dhelectronics/dh_stm32mp1/board.c | 4 ++--
> board/st/stm32mp1/stm32mp1.c | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c
> index ac1af718d4..d7c1857c16 100644
> --- a/board/dhelectronics/dh_stm32mp1/board.c
> +++ b/board/dhelectronics/dh_stm32mp1/board.c
> @@ -660,11 +660,11 @@ int board_interface_eth_init(struct udevice *dev,
> bool eth_ref_clk_sel_reg = false;
>
> /* Gigabit Ethernet 125MHz clock selection. */
> - eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
> + eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
>
> /* Ethernet 50Mhz RMII clock selection */
> eth_ref_clk_sel_reg =
> - dev_read_bool(dev, "st,eth_ref_clk_sel");
> + dev_read_bool(dev, "st,eth-ref-clk-sel");
>
> syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
>
> diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
> index 261ec15e1b..18b8870269 100644
> --- a/board/st/stm32mp1/stm32mp1.c
> +++ b/board/st/stm32mp1/stm32mp1.c
> @@ -733,11 +733,11 @@ int board_interface_eth_init(struct udevice *dev,
> bool eth_ref_clk_sel_reg = false;
>
> /* Gigabit Ethernet 125MHz clock selection. */
> - eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
> + eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
>
> /* Ethernet 50Mhz RMII clock selection */
> eth_ref_clk_sel_reg =
> - dev_read_bool(dev, "st,eth_ref_clk_sel");
> + dev_read_bool(dev, "st,eth-ref-clk-sel");
>
> syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
>
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH] board: stm32mp1: correct the property name for eth
@ 2021-06-04 16:30 Patrick Delaunay
2021-06-18 6:32 ` Patrice CHOTARD
2021-06-18 7:02 ` Patrice CHOTARD
0 siblings, 2 replies; 4+ messages in thread
From: Patrick Delaunay @ 2021-06-04 16:30 UTC (permalink / raw)
To: u-boot
Cc: Marek Vasut, Christophe Roullier, Patrick Delaunay,
Patrice Chotard, U-Boot STM32, u-boot
Use the correct name for STMicroelectronics phys config properties,
replace '_' by '-':
"st,eth_clk_sel" => "st,eth-clk-sel"
"st,eth-ref-clk-sel" => st,eth-clk-sel"
These property name are aligned with the upstreamed Linux kernel binding:
linux/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
See Linux kernel commit "dt-bindings: net: stmmac: add phys config
properties" merged in v5.1-rc1.
This patch allow to reuse the kernel device tree directly in U-Boot.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
---
board/dhelectronics/dh_stm32mp1/board.c | 4 ++--
board/st/stm32mp1/stm32mp1.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c
index ac1af718d4..d7c1857c16 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -660,11 +660,11 @@ int board_interface_eth_init(struct udevice *dev,
bool eth_ref_clk_sel_reg = false;
/* Gigabit Ethernet 125MHz clock selection. */
- eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
+ eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
/* Ethernet 50Mhz RMII clock selection */
eth_ref_clk_sel_reg =
- dev_read_bool(dev, "st,eth_ref_clk_sel");
+ dev_read_bool(dev, "st,eth-ref-clk-sel");
syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 261ec15e1b..18b8870269 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -733,11 +733,11 @@ int board_interface_eth_init(struct udevice *dev,
bool eth_ref_clk_sel_reg = false;
/* Gigabit Ethernet 125MHz clock selection. */
- eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
+ eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
/* Ethernet 50Mhz RMII clock selection */
eth_ref_clk_sel_reg =
- dev_read_bool(dev, "st,eth_ref_clk_sel");
+ dev_read_bool(dev, "st,eth-ref-clk-sel");
syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
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2021-06-04 16:25 [PATCH] board: stm32mp1: correct the property name for eth Patrick Delaunay
2021-06-04 16:30 Patrick Delaunay
2021-06-18 6:32 ` Patrice CHOTARD
2021-06-18 7:02 ` Patrice CHOTARD
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