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Mon, 7 Jun 2021 11:17:43 -0400 (EDT) Date: Mon, 7 Jun 2021 17:17:40 +0200 From: Maxime Ripard To: Arnd Bergmann Cc: Will Deacon , Mark Rutland , emma@anholt.net, Marek Szyprowski , linux-arm-kernel@lists.infradead.org, kernel-team@android.com, Catalin Marinas , Ard Biesheuvel , Vincent Whitchurch , Bartlomiej Zolnierkiewicz , dri-devel Subject: Re: [PATCH] arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES) Message-ID: <20210607151740.moncryl5zv3ahq4s@gilmour> References: <4d0c8318-bad8-2be7-e292-fc8f70c198de@samsung.com> <20210602135123.GD12753@C02TD0UTHF1T.local> <130ce34f-460a-0046-f722-00144f2d5502@samsung.com> <20210604100114.GC64162@C02TD0UTHF1T.local> <0d10411d-49fe-fbca-0479-e2983af16aa8@samsung.com> <20210607120118.GC97489@C02TD0UTHF1T.local> <20210607130859.GD97489@C02TD0UTHF1T.local> <20210607133953.GB7330@willie-the-truck> MIME-Version: 1.0 In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210607_081750_663099_A7B17E75 X-CRM114-Status: GOOD ( 23.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============4258054060287650012==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============4258054060287650012== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="tu5rdijrpja4fgx7" Content-Disposition: inline --tu5rdijrpja4fgx7 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Jun 07, 2021 at 03:57:41PM +0200, Arnd Bergmann wrote: > On Mon, Jun 7, 2021 at 3:39 PM Will Deacon wrote: > > > > [Adding VC4 folks -- please see the KASAN splat below!] > > > > Background here is that reducing ARCH_DMA_MINALIGN to 64 on arm64 (queu= ed in > > -next) is causing vc4 to hang on Rpi3b due to a probable driver bug. >=20 > The great news for the patch that caused it is that this has nothing to > do with DMA alignment. >=20 > > On Mon, Jun 07, 2021 at 02:08:59PM +0100, Mark Rutland wrote: > > > On Mon, Jun 07, 2021 at 01:01:18PM +0100, Mark Rutland wrote: > > > > On Mon, Jun 07, 2021 at 11:58:32AM +0200, Marek Szyprowski wrote: >=20 > > > [ 3.728042] BUG: KASAN: slab-out-of-bounds in vc4_atomic_commit_ta= il+0x1cc/0x910 > > > [ 3.728123] Read of size 8 at addr ffff000007360440 by task kworke= r/u8:0/7 >=20 > This is offset 0x40 into struct vc4_hvs_state, which is the > 'pending_commit' pointer > for the array index 4, i.e. one after the end of the structure. >=20 > > > [ 3.728495] kasan_report+0x1dc/0x240 > > > [ 3.728529] __asan_load8+0x98/0xd4 > > > [ 3.728565] vc4_atomic_commit_tail+0x1cc/0x910 >=20 > It seems to be this loop: >=20 > for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) { > struct vc4_crtc_state *vc4_crtc_state =3D > to_vc4_crtc_state(old_crtc_state); > unsigned int channel =3D vc4_crtc_state->assigned_channel; > int ret; >=20 > if (channel =3D=3D VC4_HVS_CHANNEL_DISABLED) > continue; >=20 > if (!old_hvs_state->fifo_state[channel].in_use) > continue; >=20 > ret =3D > drm_crtc_commit_wait(old_hvs_state->fifo_state[i].pending_commit); > if (ret) > drm_err(dev, "Timed out waiting for commit\n"); > } >=20 > I notice that it checks index 'fifos_state[channel].in_use', but then > uses a different index 'i' for looking at the 'pending_commit' field > beyond the end of the array. >=20 > This code was introduced by Maxime Ripard in commit 9ec03d7f1ed3 > ("drm/vc4: kms: Wait on previous FIFO users before a commit"). Awesome, I tried to find out that bug a few weeks ago but couldn't reproduce the KASAN spat. You're right, it should be channel here instead of i. Since you did the whole work, do you want to send the patch? maxime --tu5rdijrpja4fgx7 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHQEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYL44lAAKCRDj7w1vZxhR xYTnAQC+O2TXSIpP+CfIi/ZKSNaVHwoQyB8g+t22EGIjOarX2AD4uXPEkFyW+EkM AfZOLs6fvWKl2I7vWL4S7qVSgiCrCg== =SAcg -----END PGP SIGNATURE----- --tu5rdijrpja4fgx7-- --===============4258054060287650012== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============4258054060287650012==-- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6688C47082 for ; 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Mon, 7 Jun 2021 11:17:43 -0400 (EDT) Date: Mon, 7 Jun 2021 17:17:40 +0200 From: Maxime Ripard To: Arnd Bergmann Subject: Re: [PATCH] arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES) Message-ID: <20210607151740.moncryl5zv3ahq4s@gilmour> References: <4d0c8318-bad8-2be7-e292-fc8f70c198de@samsung.com> <20210602135123.GD12753@C02TD0UTHF1T.local> <130ce34f-460a-0046-f722-00144f2d5502@samsung.com> <20210604100114.GC64162@C02TD0UTHF1T.local> <0d10411d-49fe-fbca-0479-e2983af16aa8@samsung.com> <20210607120118.GC97489@C02TD0UTHF1T.local> <20210607130859.GD97489@C02TD0UTHF1T.local> <20210607133953.GB7330@willie-the-truck> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="tu5rdijrpja4fgx7" Content-Disposition: inline In-Reply-To: X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , emma@anholt.net, Bartlomiej Zolnierkiewicz , Will Deacon , Vincent Whitchurch , dri-devel , Catalin Marinas , kernel-team@android.com, Ard Biesheuvel , linux-arm-kernel@lists.infradead.org, Marek Szyprowski Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" --tu5rdijrpja4fgx7 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Jun 07, 2021 at 03:57:41PM +0200, Arnd Bergmann wrote: > On Mon, Jun 7, 2021 at 3:39 PM Will Deacon wrote: > > > > [Adding VC4 folks -- please see the KASAN splat below!] > > > > Background here is that reducing ARCH_DMA_MINALIGN to 64 on arm64 (queu= ed in > > -next) is causing vc4 to hang on Rpi3b due to a probable driver bug. >=20 > The great news for the patch that caused it is that this has nothing to > do with DMA alignment. >=20 > > On Mon, Jun 07, 2021 at 02:08:59PM +0100, Mark Rutland wrote: > > > On Mon, Jun 07, 2021 at 01:01:18PM +0100, Mark Rutland wrote: > > > > On Mon, Jun 07, 2021 at 11:58:32AM +0200, Marek Szyprowski wrote: >=20 > > > [ 3.728042] BUG: KASAN: slab-out-of-bounds in vc4_atomic_commit_ta= il+0x1cc/0x910 > > > [ 3.728123] Read of size 8 at addr ffff000007360440 by task kworke= r/u8:0/7 >=20 > This is offset 0x40 into struct vc4_hvs_state, which is the > 'pending_commit' pointer > for the array index 4, i.e. one after the end of the structure. >=20 > > > [ 3.728495] kasan_report+0x1dc/0x240 > > > [ 3.728529] __asan_load8+0x98/0xd4 > > > [ 3.728565] vc4_atomic_commit_tail+0x1cc/0x910 >=20 > It seems to be this loop: >=20 > for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) { > struct vc4_crtc_state *vc4_crtc_state =3D > to_vc4_crtc_state(old_crtc_state); > unsigned int channel =3D vc4_crtc_state->assigned_channel; > int ret; >=20 > if (channel =3D=3D VC4_HVS_CHANNEL_DISABLED) > continue; >=20 > if (!old_hvs_state->fifo_state[channel].in_use) > continue; >=20 > ret =3D > drm_crtc_commit_wait(old_hvs_state->fifo_state[i].pending_commit); > if (ret) > drm_err(dev, "Timed out waiting for commit\n"); > } >=20 > I notice that it checks index 'fifos_state[channel].in_use', but then > uses a different index 'i' for looking at the 'pending_commit' field > beyond the end of the array. >=20 > This code was introduced by Maxime Ripard in commit 9ec03d7f1ed3 > ("drm/vc4: kms: Wait on previous FIFO users before a commit"). Awesome, I tried to find out that bug a few weeks ago but couldn't reproduce the KASAN spat. You're right, it should be channel here instead of i. Since you did the whole work, do you want to send the patch? maxime --tu5rdijrpja4fgx7 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHQEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYL44lAAKCRDj7w1vZxhR xYTnAQC+O2TXSIpP+CfIi/ZKSNaVHwoQyB8g+t22EGIjOarX2AD4uXPEkFyW+EkM AfZOLs6fvWKl2I7vWL4S7qVSgiCrCg== =SAcg -----END PGP SIGNATURE----- --tu5rdijrpja4fgx7--