* [RFC PATCH 00/13] ASoC: qcom: Add AudioReach support
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
This patchset adds ASoC driver support to configure signal processing
framework ("AudioReach") which is integral part of Qualcomm next
generation audio SDK and will be deployed on upcoming Qualcomm chipsets.
It makes use of ASoC Topology to load graphs on to the DSP which is then
managed by APM (Audio Processing Manager) service to prepare/start/stop.
Here is simpified high-level block diagram of AudioReach:
___________________________________________________________
| CPU (Application Processor) |
| +---------+ +---------+ +---------+ |
| | q6apm | | q6apm | | q6afe | |
| | dais | <------> | | <-----> | bedais | |
| +---------+ +---------+ +---------+ |
| ^ ^ |
| | | +---------+ |
| +---------+ v +---------->|topology | |
| | q6prm | +---------+ | | |
| | |<-------->| GPR | +---------+ |
| +---------+ +---------+ |
| ^ |
|____________________________|______________________________|
|
| RPMSG (IPC over GLINK)
____________________________|______________________________
| | |
| +-----------------------+ |
| | | |
| v v q6 (Audio DSP) |
|+-----+ +----------------------------------+ |
|| PRM | | APM (Audio Processing Manager) | |
|+-----+ | . Graph Management | |
| | . Command Handing | |
| | . Event Management | |
| | ... | |
| +----------------------------------+ |
| ^ |
|____________________________|______________________________|
|
| LPASS AIF
____________________________|______________________________
| | Audio I/O |
| v |
| +--------------------------------------------------+ |
| | Audio devices | |
| | CODEC | HDMI-TX | PCM | SLIMBUS | I2S |MI2S |...| |
| | | |
| +--------------------------------------------------+ |
|___________________________________________________________|
AudioReach has constructs of sub-graph, container and modules.
Each sub-graph can have N containers and each Container can have N Modules
and connections between them can be linear or non-linear.
An audio function can be realized with one or many connected
sub-graphs. There are also control/event paths between modules that can
be wired up while building graph to achieve various control mechanism
between modules. These concepts of Sub-Graph, Containers and Modules
are represented in ASoC topology.
Here is simple I2S graph with a Write Shared Memory and a
Volume control module within a single Subgraph (1) with one Container (1)
and 5 modules.
____________________________________________________________
| Sub-Graph [1] |
| _______________________________________________________ |
| | Container [1] | |
| | [WR_SH] -> [PCM DEC] -> [PCM CONV] -> [VOL]-> [I2S-EP]| |
| |_______________________________________________________| |
|____________________________________________________________|
For now this graph is split into two subgraphs to achieve dpcm like below:
________________________________________________ _________________
| Sub-Graph [1] | | Sub-Graph [2] |
| ____________________________________________ | | _____________ |
| | Container [1] | | | |Container [2]| |
| | [WR_SH] -> [PCM DEC] -> [PCM CONV] -> [VOL]| | | | [I2S-EP] | |
| |____________________________________________| | | |_____________| |
|________________________________________________| |_________________|
_________________
| Sub-Graph [3] |
| _____________ |
| |Container [3]| |
| | [DMA-EP] | |
| |_____________| |
|_________________|
This patchset adds very minimal support for AudioReach which includes
supporting sub-graphs containing CODEC DMA ports and simple PCM
Decoder/Encoder and Logger Modules. Additional capabilities will
be built over time to expose features offered by AudioReach.
This patchset is Tested on SM8250 SoC based Qualcomm Robotics Platform RB5
and SM9250 MTP with WSA881X Smart Speaker Amplifiers, DMICs connected via
VA Macro and WCD938x Codec connected via TX and RX Macro.
Sample WIP ASoC graphs are available at
https://git.linaro.org/people/srinivas.kandagatla/audioreach-topology.git/
Thanks,
srini
Srinivas Kandagatla (13):
soc: dt-bindings: qcom: add gpr bindings
soc: qcom: add gpr driver support
ASoC: qcom: dt-bindings: add bindings Audio Processing manager
ASoC: qcom: audioreach: add basic pkt alloc support
ASoC: qcom: audioreach: add q6apm support
ASoC: qcom: audioreach: add module configuration command helpers
ASoC: qcom: audioreach: add topology support
ASoC: qcom: audioreach: add q6apm-dai support
ASoC: qcom: audioreach: add bedai support
ASoC: qcom: dt-bindings: add bindings for Proxy Resource Manager
ASoC: qcom: audioreach: add q6prm support
ASoC: qcom: dt-bindings: add audioreach soundcard compatibles
ASoC: qcom: sm8250: Add audioreach support
.../bindings/soc/qcom/qcom,gpr.yaml | 74 ++
.../devicetree/bindings/sound/qcom,q6apm.yaml | 72 ++
.../devicetree/bindings/sound/qcom,q6prm.yaml | 43 +
.../bindings/sound/qcom,sm8250.yaml | 43 +
drivers/soc/qcom/Kconfig | 9 +
drivers/soc/qcom/Makefile | 1 +
drivers/soc/qcom/gpr.c | 487 ++++++++
include/dt-bindings/soc/qcom,gpr.h | 18 +
include/dt-bindings/sound/qcom,q6apm.h | 215 ++++
include/dt-bindings/sound/qcom,q6prm.h | 205 ++++
include/linux/soc/qcom/gpr.h | 127 ++
include/uapi/sound/snd_ar_tokens.h | 200 +++
sound/soc/qcom/Kconfig | 20 +
sound/soc/qcom/Makefile | 1 +
sound/soc/qcom/audioreach/Makefile | 12 +
sound/soc/qcom/audioreach/audioreach.c | 1082 +++++++++++++++++
sound/soc/qcom/audioreach/audioreach.h | 649 ++++++++++
sound/soc/qcom/audioreach/q6apm-bedai.c | 377 ++++++
sound/soc/qcom/audioreach/q6apm-dai.c | 494 ++++++++
sound/soc/qcom/audioreach/q6apm.c | 962 +++++++++++++++
sound/soc/qcom/audioreach/q6apm.h | 171 +++
sound/soc/qcom/audioreach/q6prm.c | 412 +++++++
sound/soc/qcom/audioreach/topology.c | 848 +++++++++++++
sound/soc/qcom/sm8250.c | 144 ++-
24 files changed, 6665 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gpr.yaml
create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6prm.yaml
create mode 100644 drivers/soc/qcom/gpr.c
create mode 100644 include/dt-bindings/soc/qcom,gpr.h
create mode 100644 include/dt-bindings/sound/qcom,q6apm.h
create mode 100644 include/dt-bindings/sound/qcom,q6prm.h
create mode 100644 include/linux/soc/qcom/gpr.h
create mode 100644 include/uapi/sound/snd_ar_tokens.h
create mode 100644 sound/soc/qcom/audioreach/Makefile
create mode 100644 sound/soc/qcom/audioreach/audioreach.c
create mode 100644 sound/soc/qcom/audioreach/audioreach.h
create mode 100644 sound/soc/qcom/audioreach/q6apm-bedai.c
create mode 100644 sound/soc/qcom/audioreach/q6apm-dai.c
create mode 100644 sound/soc/qcom/audioreach/q6apm.c
create mode 100644 sound/soc/qcom/audioreach/q6apm.h
create mode 100644 sound/soc/qcom/audioreach/q6prm.c
create mode 100644 sound/soc/qcom/audioreach/topology.c
--
2.21.0
^ permalink raw reply [flat|nested] 42+ messages in thread* [RFC PATCH 01/13] soc: dt-bindings: qcom: add gpr bindings
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-07 15:28 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: plai, tiwai, robh, devicetree, perex, alsa-devel, linux-kernel,
lgirdwood, bgoswami, Srinivas Kandagatla
Qualcomm Generic Packet router aka GPR is the IPC mechanism found
in AudioReach next generation signal processing framework to perform
command and response messages between various processors.
GPR has concepts of static and dynamic port, all static services like
APM (Audio Processing Manager), PRM (Proxy resource manager) have
fixed port numbers where as dynamic services like graphs have dynamic
port numbers which are allocated at runtime. All GPR packet messages
will have source and destination domain and port along with opcode
and payload.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../bindings/soc/qcom/qcom,gpr.yaml | 74 +++++++++++++++++++
1 file changed, 74 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gpr.yaml
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,gpr.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,gpr.yaml
new file mode 100644
index 000000000000..cc08ec51de6a
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,gpr.yaml
@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/qcom/qcom,gpr.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcomm Generic Packet Router binding
+
+maintainers:
+ - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+
+description: |
+ This binding describes the Qualcomm Generic Packet Router,Shared Memory Manager,
+ used to send and receive packets between Audio DSP and Application processor.
+
+properties:
+ compatible:
+ const: qcom,gpr
+
+ qcom,glink-channels:
+ const: adsp_apps
+ description:
+ glink channel associated with gpr function
+
+ qcom,gpr-domain:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2, 3]
+ description:
+ Selects the processor domain for gpr
+ 1 = Modem Domain
+ 2 = Audio DSP Domain
+ 3 = Application Processor Domain
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+#GPR Services
+patternProperties:
+ 'gprservice@[0-9]+$':
+ type: object
+ description:
+ GPR node's client devices use subnodes for desired static port services.
+
+ properties:
+ reg:
+ maxItems: 1
+ description: Service port id
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - qcom,glink-channels
+ - qcom,gpr-domain
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/soc/qcom,gpr.h>
+ gpr {
+ compatible = "qcom,gpr";
+ qcom,glink-channels = "adsp_apps";
+ qcom,gpr-domain = <GPR_DOMAIN_ID_ADSP>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gprservice@1 {
+ reg = <GPR_APM_MODULE_IID>;
+ };
+ };
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* [RFC PATCH 01/13] soc: dt-bindings: qcom: add gpr bindings
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
Qualcomm Generic Packet router aka GPR is the IPC mechanism found
in AudioReach next generation signal processing framework to perform
command and response messages between various processors.
GPR has concepts of static and dynamic port, all static services like
APM (Audio Processing Manager), PRM (Proxy resource manager) have
fixed port numbers where as dynamic services like graphs have dynamic
port numbers which are allocated at runtime. All GPR packet messages
will have source and destination domain and port along with opcode
and payload.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../bindings/soc/qcom/qcom,gpr.yaml | 74 +++++++++++++++++++
1 file changed, 74 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gpr.yaml
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,gpr.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,gpr.yaml
new file mode 100644
index 000000000000..cc08ec51de6a
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,gpr.yaml
@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/qcom/qcom,gpr.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcomm Generic Packet Router binding
+
+maintainers:
+ - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+
+description: |
+ This binding describes the Qualcomm Generic Packet Router,Shared Memory Manager,
+ used to send and receive packets between Audio DSP and Application processor.
+
+properties:
+ compatible:
+ const: qcom,gpr
+
+ qcom,glink-channels:
+ const: adsp_apps
+ description:
+ glink channel associated with gpr function
+
+ qcom,gpr-domain:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2, 3]
+ description:
+ Selects the processor domain for gpr
+ 1 = Modem Domain
+ 2 = Audio DSP Domain
+ 3 = Application Processor Domain
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+#GPR Services
+patternProperties:
+ 'gprservice@[0-9]+$':
+ type: object
+ description:
+ GPR node's client devices use subnodes for desired static port services.
+
+ properties:
+ reg:
+ maxItems: 1
+ description: Service port id
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - qcom,glink-channels
+ - qcom,gpr-domain
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/soc/qcom,gpr.h>
+ gpr {
+ compatible = "qcom,gpr";
+ qcom,glink-channels = "adsp_apps";
+ qcom,gpr-domain = <GPR_DOMAIN_ID_ADSP>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gprservice@1 {
+ reg = <GPR_APM_MODULE_IID>;
+ };
+ };
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: [RFC PATCH 01/13] soc: dt-bindings: qcom: add gpr bindings
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-08 20:50 ` Rob Herring
-1 siblings, 0 replies; 42+ messages in thread
From: Rob Herring @ 2021-06-08 20:50 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: bjorn.andersson, bgoswami, alsa-devel, linux-kernel, lgirdwood,
perex, devicetree, broonie, plai, tiwai
On Mon, 07 Jun 2021 16:28:24 +0100, Srinivas Kandagatla wrote:
> Qualcomm Generic Packet router aka GPR is the IPC mechanism found
> in AudioReach next generation signal processing framework to perform
> command and response messages between various processors.
>
> GPR has concepts of static and dynamic port, all static services like
> APM (Audio Processing Manager), PRM (Proxy resource manager) have
> fixed port numbers where as dynamic services like graphs have dynamic
> port numbers which are allocated at runtime. All GPR packet messages
> will have source and destination domain and port along with opcode
> and payload.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> .../bindings/soc/qcom/qcom,gpr.yaml | 74 +++++++++++++++++++
> 1 file changed, 74 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gpr.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/soc/qcom/qcom,gpr.example.dts:19:18: fatal error: dt-bindings/soc/qcom,gpr.h: No such file or directory
19 | #include <dt-bindings/soc/qcom,gpr.h>
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[1]: *** [scripts/Makefile.lib:380: Documentation/devicetree/bindings/soc/qcom/qcom,gpr.example.dt.yaml] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1416: dt_binding_check] Error 2
\ndoc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/1488752
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [RFC PATCH 01/13] soc: dt-bindings: qcom: add gpr bindings
@ 2021-06-08 20:50 ` Rob Herring
0 siblings, 0 replies; 42+ messages in thread
From: Rob Herring @ 2021-06-08 20:50 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: devicetree, alsa-devel, bgoswami, tiwai, linux-kernel, plai,
lgirdwood, broonie, bjorn.andersson
On Mon, 07 Jun 2021 16:28:24 +0100, Srinivas Kandagatla wrote:
> Qualcomm Generic Packet router aka GPR is the IPC mechanism found
> in AudioReach next generation signal processing framework to perform
> command and response messages between various processors.
>
> GPR has concepts of static and dynamic port, all static services like
> APM (Audio Processing Manager), PRM (Proxy resource manager) have
> fixed port numbers where as dynamic services like graphs have dynamic
> port numbers which are allocated at runtime. All GPR packet messages
> will have source and destination domain and port along with opcode
> and payload.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> .../bindings/soc/qcom/qcom,gpr.yaml | 74 +++++++++++++++++++
> 1 file changed, 74 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gpr.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/soc/qcom/qcom,gpr.example.dts:19:18: fatal error: dt-bindings/soc/qcom,gpr.h: No such file or directory
19 | #include <dt-bindings/soc/qcom,gpr.h>
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[1]: *** [scripts/Makefile.lib:380: Documentation/devicetree/bindings/soc/qcom/qcom,gpr.example.dt.yaml] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1416: dt_binding_check] Error 2
\ndoc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/1488752
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 42+ messages in thread
* [RFC PATCH 02/13] soc: qcom: add gpr driver support
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-07 15:28 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: plai, tiwai, robh, devicetree, perex, alsa-devel, linux-kernel,
lgirdwood, bgoswami, Srinivas Kandagatla
Qualcomm Generic Packet router aka GPR is the IPC mechanism found
in AudioReach next generation signal processing framework to perform
command and response messages between various processors.
GPR has concepts of static and dynamic port, all static services like
APM (Audio Processing Manager), PRM (Proxy resource manager) have
fixed port numbers where as dynamic services like graphs have dynamic
port numbers which are allocated at runtime. All GPR packet messages
will have source and destination domain and port along with opcode
and payload.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
drivers/soc/qcom/Kconfig | 9 +
drivers/soc/qcom/Makefile | 1 +
drivers/soc/qcom/gpr.c | 487 +++++++++++++++++++++++++++++
include/dt-bindings/soc/qcom,gpr.h | 18 ++
include/linux/soc/qcom/gpr.h | 127 ++++++++
5 files changed, 642 insertions(+)
create mode 100644 drivers/soc/qcom/gpr.c
create mode 100644 include/dt-bindings/soc/qcom,gpr.h
create mode 100644 include/linux/soc/qcom/gpr.h
diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index 79b568f82a1c..66eb4a3e4bae 100644
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -209,4 +209,13 @@ config QCOM_APR
application processor and QDSP6. APR is
used by audio driver to configure QDSP6
ASM, ADM and AFE modules.
+
+config QCOM_GPR
+ tristate "Qualcomm GPR Bus (Gecko Packet Router)"
+ depends on ARCH_QCOM || COMPILE_TEST
+ depends on RPMSG
+ help
+ Enable GPR IPC protocol support between
+ application processor and QDSP6. GPR is
+ used by audio driver to configure QDSP6.
endmenu
diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
index ad675a6593d0..2e4c4fdac77a 100644
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_QCOM_SMSM) += smsm.o
obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o
obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
obj-$(CONFIG_QCOM_APR) += apr.o
+obj-$(CONFIG_QCOM_GPR) += gpr.o
obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
diff --git a/drivers/soc/qcom/gpr.c b/drivers/soc/qcom/gpr.c
new file mode 100644
index 000000000000..7c0c0fe67d92
--- /dev/null
+++ b/drivers/soc/qcom/gpr.c
@@ -0,0 +1,487 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2021, Linaro Limited
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/spinlock.h>
+#include <linux/idr.h>
+#include <linux/slab.h>
+#include <linux/workqueue.h>
+#include <linux/of_device.h>
+#include <linux/soc/qcom/gpr.h>
+#include <linux/delay.h>
+#include <linux/rpmsg.h>
+#include <linux/of.h>
+
+/* Some random values tbh which does not collide with static modules */
+#define GPR_DYNAMIC_PORT_START 0x10000000
+#define GPR_DYNAMIC_PORT_END 0x20000000
+
+struct gpr_rx_buf {
+ struct list_head node;
+ int len;
+ uint8_t buf[];
+};
+
+struct gpr {
+ struct rpmsg_endpoint *ch;
+ struct device *dev;
+ spinlock_t ports_lock;
+ spinlock_t rx_lock;
+ struct idr ports_idr;
+ int dest_domain_id;
+ struct workqueue_struct *rxwq;
+ struct work_struct rx_work;
+ struct list_head rx_list;
+};
+
+struct gpr_pkt *gpr_alloc_pkt(struct gpr_port *port, int payload_size,
+ uint32_t opcode, uint32_t token,
+ uint32_t dest_port)
+{
+ int pkt_size = GPR_HDR_SIZE + payload_size;
+ struct gpr *gpr = port->gpr;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ p = kzalloc(pkt_size, GFP_KERNEL);
+ if (!p)
+ return ERR_PTR(-ENOMEM);
+
+ pkt = p;
+ pkt->hdr.version = GPR_PKT_VER;
+ pkt->hdr.hdr_size = GPR_PKT_HEADER_WORD_SIZE;
+ pkt->hdr.pkt_size = pkt_size;
+ pkt->hdr.dest_port = dest_port;
+ pkt->hdr.src_port = port->id;
+ pkt->hdr.dest_domain = gpr->dest_domain_id;
+ pkt->hdr.src_domain = GPR_DOMAIN_ID_APPS;
+ pkt->hdr.token = token;
+ pkt->hdr.opcode = opcode;
+
+ return pkt;
+}
+EXPORT_SYMBOL_GPL(gpr_alloc_pkt);
+
+void gpr_free_pkt(struct gpr_port *port, struct gpr_pkt *pkt)
+{
+ kfree(pkt);
+}
+EXPORT_SYMBOL_GPL(gpr_free_pkt);
+
+int gpr_send_port_pkt(struct gpr_port *port, struct gpr_pkt *pkt)
+{
+ struct gpr *gpr = port->gpr;
+ struct gpr_hdr *hdr;
+ unsigned long flags;
+ int ret;
+
+ hdr = &pkt->hdr;
+
+ spin_lock_irqsave(&port->lock, flags);
+ ret = rpmsg_trysend(gpr->ch, pkt, hdr->pkt_size);
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ return ret ? ret : hdr->pkt_size;
+}
+EXPORT_SYMBOL_GPL(gpr_send_port_pkt);
+
+static void gpr_dev_release(struct device *dev)
+{
+ struct gpr_device *gdev = to_gpr_device(dev);
+
+ kfree(gdev);
+}
+
+static int gpr_callback(struct rpmsg_device *rpdev, void *buf,
+ int len, void *priv, u32 addr)
+{
+ struct gpr *gpr = dev_get_drvdata(&rpdev->dev);
+ struct gpr_rx_buf *abuf;
+ unsigned long flags;
+
+ abuf = kzalloc(sizeof(*abuf) + len, GFP_ATOMIC);
+ if (!abuf)
+ return -ENOMEM;
+
+ abuf->len = len;
+ memcpy(abuf->buf, buf, len);
+
+ spin_lock_irqsave(&gpr->rx_lock, flags);
+ list_add_tail(&abuf->node, &gpr->rx_list);
+ spin_unlock_irqrestore(&gpr->rx_lock, flags);
+
+ queue_work(gpr->rxwq, &gpr->rx_work);
+
+ return 0;
+}
+
+static int gpr_do_rx_callback(struct gpr *gpr, struct gpr_rx_buf *abuf)
+{
+ uint16_t hdr_size, ver;
+ struct gpr_port *port = NULL;
+ struct gpr_resp_pkt resp;
+ struct gpr_hdr *hdr;
+ unsigned long flags;
+ void *buf = abuf->buf;
+ int len = abuf->len;
+
+ hdr = buf;
+ ver = hdr->version;
+ if (ver > GPR_PKT_VER + 1)
+ return -EINVAL;
+
+ hdr_size = hdr->hdr_size;
+ if (hdr_size < GPR_PKT_HEADER_WORD_SIZE) {
+ dev_err(gpr->dev, "GPR: Wrong hdr size:%d\n", hdr_size);
+ return -EINVAL;
+ }
+
+ if (hdr->pkt_size < GPR_PKT_HEADER_BYTE_SIZE || hdr->pkt_size != len) {
+ dev_err(gpr->dev, "GPR: Wrong packet size\n");
+ return -EINVAL;
+ }
+
+ resp.hdr = *hdr;
+ resp.payload_size = hdr->pkt_size - (hdr_size * 4);
+
+ /*
+ * NOTE: hdr_size is not same as GPR_HDR_SIZE as remote can include
+ * optional headers in to gpr_hdr which should be ignored
+ */
+ if (resp.payload_size > 0)
+ resp.payload = buf + (hdr_size * 4);
+
+
+ spin_lock_irqsave(&gpr->ports_lock, flags);
+ port = idr_find(&gpr->ports_idr, hdr->dest_port);
+ spin_unlock_irqrestore(&gpr->ports_lock, flags);
+
+ if (!port) {
+ dev_err(gpr->dev, "GPR: Port(%x) is not registered\n",
+ hdr->dest_port);
+ return -EINVAL;
+ }
+
+ if (port->callback)
+ port->callback(&resp, port->priv, 0);
+
+ return 0;
+}
+
+static void gpr_rxwq(struct work_struct *work)
+{
+ struct gpr *gpr = container_of(work, struct gpr, rx_work);
+ struct gpr_rx_buf *abuf, *b;
+ unsigned long flags;
+
+ if (!list_empty(&gpr->rx_list)) {
+ list_for_each_entry_safe(abuf, b, &gpr->rx_list, node) {
+ gpr_do_rx_callback(gpr, abuf);
+ spin_lock_irqsave(&gpr->rx_lock, flags);
+ list_del(&abuf->node);
+ spin_unlock_irqrestore(&gpr->rx_lock, flags);
+ kfree(abuf);
+ }
+ }
+}
+
+static int gpr_device_match(struct device *dev, struct device_driver *drv)
+{
+ /* Attempt an OF style match first */
+ if (of_driver_match_device(dev, drv))
+ return 1;
+
+ return 0;
+}
+
+static int gpr_device_probe(struct device *dev)
+{
+ struct gpr_device *gdev = to_gpr_device(dev);
+ struct gpr_driver *adrv = to_gpr_driver(dev->driver);
+ int ret;
+
+ ret = adrv->probe(gdev);
+ if (!ret)
+ gdev->port.callback = adrv->callback;
+
+ return ret;
+}
+
+static int gpr_device_remove(struct device *dev)
+{
+ struct gpr_device *gdev = to_gpr_device(dev);
+ struct gpr_driver *adrv;
+ struct gpr *gpr = dev_get_drvdata(gdev->dev.parent);
+
+ if (dev->driver) {
+ adrv = to_gpr_driver(dev->driver);
+ if (adrv->remove)
+ adrv->remove(gdev);
+ spin_lock(&gpr->ports_lock);
+ idr_remove(&gpr->ports_idr, gdev->port_id);
+ spin_unlock(&gpr->ports_lock);
+ }
+
+ return 0;
+}
+
+static int gpr_uevent(struct device *dev, struct kobj_uevent_env *env)
+{
+ struct gpr_device *gdev = to_gpr_device(dev);
+ int ret;
+
+ ret = of_device_uevent_modalias(dev, env);
+ if (ret != -ENODEV)
+ return ret;
+
+ return add_uevent_var(env, "MODALIAS=gpr:%s", gdev->name);
+}
+
+struct bus_type gprbus = {
+ .name = "gprbus",
+ .match = gpr_device_match,
+ .probe = gpr_device_probe,
+ .uevent = gpr_uevent,
+ .remove = gpr_device_remove,
+};
+EXPORT_SYMBOL_GPL(gprbus);
+
+void gpr_free_port(struct gpr_port *port)
+{
+ struct gpr *gpr = port->gpr;
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpr->ports_lock, flags);
+ idr_remove(&gpr->ports_idr, port->id);
+ spin_unlock_irqrestore(&gpr->ports_lock, flags);
+
+ kfree(port);
+}
+EXPORT_SYMBOL_GPL(gpr_free_port);
+
+struct gpr_port *gpr_alloc_port(struct gpr_device* gdev, struct device *dev,
+ gpr_port_cb cb, void *priv)
+{
+ struct gpr *gpr = dev_get_drvdata(gdev->dev.parent);
+ struct gpr_port *port;
+ int id;
+
+ port = kzalloc(sizeof(*port), GFP_KERNEL);
+ if (!port)
+ return ERR_PTR(-ENOMEM);
+
+ port->callback = cb;
+ port->gpr = gpr;
+ port->priv = priv;
+ port->dev = dev;
+ spin_lock_init(&port->lock);
+
+ spin_lock(&gpr->ports_lock);
+ id = idr_alloc_cyclic(&gpr->ports_idr, port, GPR_DYNAMIC_PORT_START,
+ GPR_DYNAMIC_PORT_END, GFP_ATOMIC);
+ if (id < 0) {
+ dev_err(dev, "Unable to allocate dynamic GPR src port\n");
+ kfree(port);
+ spin_unlock(&gpr->ports_lock);
+ return ERR_PTR(-ENOMEM);
+ }
+ port->id = id;
+ spin_unlock(&gpr->ports_lock);
+
+ dev_info(dev, "Adding GPR src port (%x)\n", port->id);
+
+ return port;
+}
+EXPORT_SYMBOL_GPL(gpr_alloc_port);
+
+static int gpr_add_device(struct device *dev, struct device_node *np,
+ u32 port_id, u32 domain_id)
+{
+ struct gpr *gpr = dev_get_drvdata(dev);
+ struct gpr_device *gdev = NULL;
+ int ret;
+
+ gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
+ if (!gdev)
+ return -ENOMEM;
+
+ gdev->port_id = port_id;
+ gdev->domain_id = domain_id;
+ if (np)
+ snprintf(gdev->name, GPR_NAME_SIZE, "%pOFn", np);
+
+ dev_set_name(&gdev->dev, "gprport:%s:%x:%x", gdev->name,
+ domain_id, port_id);
+
+ gdev->dev.bus = &gprbus;
+ gdev->dev.parent = dev;
+ gdev->dev.of_node = np;
+ gdev->dev.release = gpr_dev_release;
+ gdev->dev.driver = NULL;
+
+ gdev->port.gpr = gpr;
+ gdev->port.priv = gdev;
+ gdev->port.id = port_id;
+ spin_lock_init(&gdev->port.lock);
+
+ spin_lock(&gpr->ports_lock);
+ idr_alloc(&gpr->ports_idr, &gdev->port, port_id,
+ port_id + 1, GFP_ATOMIC);
+ spin_unlock(&gpr->ports_lock);
+
+ dev_info(dev, "Adding GPR dev: %s\n", dev_name(&gdev->dev));
+
+ ret = device_register(&gdev->dev);
+ if (ret) {
+ dev_err(dev, "device_register failed: %d\n", ret);
+ put_device(&gdev->dev);
+ }
+
+ return ret;
+}
+
+static void of_register_gpr_devices(struct device *dev)
+{
+ struct gpr *gpr = dev_get_drvdata(dev);
+ struct device_node *node;
+
+ for_each_child_of_node(dev->of_node, node) {
+ u32 port_id;
+ u32 domain_id;
+
+ if (of_property_read_u32(node, "reg", &port_id))
+ continue;
+
+ domain_id = gpr->dest_domain_id;
+
+ if (gpr_add_device(dev, node, port_id, domain_id))
+ dev_err(dev, "Failed to add gpr %d port\n", port_id);
+ }
+}
+
+static int gpr_probe(struct rpmsg_device *rpdev)
+{
+ struct device *dev = &rpdev->dev;
+ struct gpr *gpr;
+ int ret;
+
+ gpr = devm_kzalloc(dev, sizeof(*gpr), GFP_KERNEL);
+ if (!gpr)
+ return -ENOMEM;
+
+ ret = of_property_read_u32(dev->of_node, "qcom,gpr-domain",
+ &gpr->dest_domain_id);
+ if (ret) {
+ dev_err(dev, "GPR Domain ID not specified in DT\n");
+ return ret;
+ }
+
+ dev_set_drvdata(dev, gpr);
+ gpr->ch = rpdev->ept;
+ gpr->dev = dev;
+ gpr->rxwq = create_singlethread_workqueue("qcom_gpr_rx");
+ if (!gpr->rxwq) {
+ dev_err(gpr->dev, "Failed to start Rx WQ\n");
+ return -ENOMEM;
+ }
+ INIT_WORK(&gpr->rx_work, gpr_rxwq);
+
+ INIT_LIST_HEAD(&gpr->rx_list);
+ spin_lock_init(&gpr->rx_lock);
+ spin_lock_init(&gpr->ports_lock);
+ idr_init(&gpr->ports_idr);
+
+ of_register_gpr_devices(dev);
+
+ return 0;
+}
+
+static int gpr_remove_device(struct device *dev, void *null)
+{
+ struct gpr_device *gdev = to_gpr_device(dev);
+
+ device_unregister(&gdev->dev);
+
+ return 0;
+}
+
+static void gpr_remove(struct rpmsg_device *rpdev)
+{
+ struct gpr *gpr = dev_get_drvdata(&rpdev->dev);
+
+ device_for_each_child(&rpdev->dev, NULL, gpr_remove_device);
+ flush_workqueue(gpr->rxwq);
+ destroy_workqueue(gpr->rxwq);
+}
+
+/*
+ * __gpr_driver_register() - Client driver registration with gprbus
+ *
+ * @drv:Client driver to be associated with client-device.
+ * @owner: owning module/driver
+ *
+ * This API will register the client driver with the gprbus
+ * It is called from the driver's module-init function.
+ */
+int __gpr_driver_register(struct gpr_driver *drv, struct module *owner)
+{
+ drv->driver.bus = &gprbus;
+ drv->driver.owner = owner;
+
+ return driver_register(&drv->driver);
+}
+EXPORT_SYMBOL_GPL(__gpr_driver_register);
+
+/*
+ * gpr_driver_unregister() - Undo effect of gpr_driver_register
+ *
+ * @drv: Client driver to be unregistered
+ */
+void gpr_driver_unregister(struct gpr_driver *drv)
+{
+ driver_unregister(&drv->driver);
+}
+EXPORT_SYMBOL_GPL(gpr_driver_unregister);
+
+static const struct of_device_id gpr_of_match[] = {
+ { .compatible = "qcom,gpr", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, gpr_of_match);
+
+static struct rpmsg_driver gpr_driver = {
+ .probe = gpr_probe,
+ .remove = gpr_remove,
+ .callback = gpr_callback,
+ .drv = {
+ .name = "qcom,gpr",
+ .of_match_table = gpr_of_match,
+ },
+};
+
+static int __init gpr_init(void)
+{
+ int ret;
+
+ ret = bus_register(&gprbus);
+ if (!ret)
+ ret = register_rpmsg_driver(&gpr_driver);
+ else
+ bus_unregister(&gprbus);
+
+ return ret;
+}
+
+static void __exit gpr_exit(void)
+{
+ bus_unregister(&gprbus);
+ unregister_rpmsg_driver(&gpr_driver);
+}
+
+subsys_initcall(gpr_init);
+module_exit(gpr_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Qualcomm GPR Bus");
diff --git a/include/dt-bindings/soc/qcom,gpr.h b/include/dt-bindings/soc/qcom,gpr.h
new file mode 100644
index 000000000000..1c68906e079c
--- /dev/null
+++ b/include/dt-bindings/soc/qcom,gpr.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_QCOM_GPR_H
+#define __DT_BINDINGS_QCOM_GPR_H
+
+/* DOMAINS */
+
+#define GPR_DOMAIN_ID_MODEM 1
+#define GPR_DOMAIN_ID_ADSP 2
+#define GPR_DOMAIN_ID_APPS 3
+
+/* Static Services */
+
+#define GPR_APM_MODULE_IID 1
+#define GPR_PRM_MODULE_IID 2
+#define GPR_AMDB_MODULE_IID 3
+#define GPR_VCPM_MODULE_IID 4
+
+#endif /* __DT_BINDINGS_QCOM_GPR_H */
diff --git a/include/linux/soc/qcom/gpr.h b/include/linux/soc/qcom/gpr.h
new file mode 100644
index 000000000000..05cbbc407a49
--- /dev/null
+++ b/include/linux/soc/qcom/gpr.h
@@ -0,0 +1,127 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __QCOM_GPR_H_
+#define __QCOM_GPR_H_
+
+#include <linux/spinlock.h>
+#include <linux/device.h>
+#include <dt-bindings/soc/qcom,gpr.h>
+
+#define APM_MODULE_INSTANCE_ID GPR_APM_MODULE_IID
+#define PRM_MODULE_INSTANCE_ID GPR_PRM_MODULE_IID
+#define AMDB_MODULE_INSTANCE_ID GPR_AMDB_MODULE_IID
+#define VCPM_MODULE_INSTANCE_ID GPR_VCPM_MODULE_IID
+
+struct gpr_hdr {
+ uint32_t version:4;
+ uint32_t hdr_size:4;
+ uint32_t pkt_size:24;
+ uint32_t dest_domain:8;
+ uint32_t src_domain:8;
+ uint32_t reserved:16;
+ uint32_t src_port;
+ uint32_t dest_port;
+ uint32_t token;
+ uint32_t opcode;
+} __packed;
+
+struct gpr_pkt {
+ struct gpr_hdr hdr;
+ uint32_t payload[0];
+};
+
+struct gpr_resp_pkt {
+ struct gpr_hdr hdr;
+ void *payload;
+ int payload_size;
+};
+
+#define GPR_HDR_SIZE sizeof(struct gpr_hdr)
+#define GPR_PKT_VER 0x0
+#define GPR_PKT_HEADER_WORD_SIZE ((sizeof(struct gpr_pkt) + 3) >> 2)
+#define GPR_PKT_HEADER_BYTE_SIZE (GPR_PKT_HEADER_WORD_SIZE << 2)
+#define GPR_DOMAIN_ID_MODEM 1
+#define GPR_DOMAIN_ID_ADSP 2
+#define GPR_DOMAIN_ID_APPS 3
+
+#define GPR_BASIC_RSP_RESULT 0x02001005
+struct gpr_ibasic_rsp_result_t {
+ uint32_t opcode;
+ uint32_t status;
+};
+
+#define GPR_BASIC_EVT_ACCEPTED 0x02001006
+struct gpr_ibasic_rsp_accepted_t {
+ uint32_t opcode;
+};
+
+extern struct bus_type gprbus;
+typedef int (*gpr_port_cb) (struct gpr_resp_pkt *d, void *priv, int op);
+
+struct gpr_port {
+ struct device *dev;
+ gpr_port_cb callback;
+ struct gpr *gpr;
+ spinlock_t lock;
+ int id;
+ void *priv;
+};
+
+#define GPR_NAME_SIZE 128
+struct gpr_device {
+ struct device dev;
+ uint16_t port_id;
+ uint16_t domain_id;
+ uint32_t version;
+ char name[GPR_NAME_SIZE];
+ struct gpr_port port;
+};
+
+#define to_gpr_device(d) container_of(d, struct gpr_device, dev)
+
+struct gpr_driver {
+ int (*probe)(struct gpr_device *sl);
+ int (*remove)(struct gpr_device *sl);
+ int (*callback)(struct gpr_resp_pkt *d, void *data, int op);
+ struct device_driver driver;
+};
+
+#define to_gpr_driver(d) container_of(d, struct gpr_driver, driver)
+
+/*
+ * use a macro to avoid include chaining to get THIS_MODULE
+ */
+#define gpr_driver_register(drv) __gpr_driver_register(drv, THIS_MODULE)
+
+int __gpr_driver_register(struct gpr_driver *drv, struct module *owner);
+void gpr_driver_unregister(struct gpr_driver *drv);
+
+/**
+ * module_gpr_driver() - Helper macro for registering a aprbus driver
+ * @__aprbus_driver: aprbus_driver struct
+ *
+ * Helper macro for aprbus drivers which do not do anything special in
+ * module init/exit. This eliminates a lot of boilerplate. Each module
+ * may only use this macro once, and calling it replaces module_init()
+ * and module_exit()
+ */
+#define module_gpr_driver(__gpr_driver) \
+ module_driver(__gpr_driver, gpr_driver_register, \
+ gpr_driver_unregister)
+
+struct gpr_port *gpr_alloc_port(struct gpr_device *gdev, struct device *dev,
+ gpr_port_cb cb, void *priv);
+void gpr_free_port(struct gpr_port *port);
+
+struct gpr_pkt *gpr_alloc_pkt(struct gpr_port *port, int payload_size,
+ uint32_t opcode, uint32_t token,
+ uint32_t dest_port);
+void gpr_free_pkt(struct gpr_port *port, struct gpr_pkt *pkt);
+
+int gpr_send_port_pkt(struct gpr_port *port, struct gpr_pkt *pkt);
+static inline int gpr_send_pkt(struct gpr_device *gdev, struct gpr_pkt *pkt)
+{
+ return gpr_send_port_pkt(&gdev->port, pkt);
+}
+
+#endif /* __QCOM_GPR_H_ */
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* [RFC PATCH 02/13] soc: qcom: add gpr driver support
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
Qualcomm Generic Packet router aka GPR is the IPC mechanism found
in AudioReach next generation signal processing framework to perform
command and response messages between various processors.
GPR has concepts of static and dynamic port, all static services like
APM (Audio Processing Manager), PRM (Proxy resource manager) have
fixed port numbers where as dynamic services like graphs have dynamic
port numbers which are allocated at runtime. All GPR packet messages
will have source and destination domain and port along with opcode
and payload.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
drivers/soc/qcom/Kconfig | 9 +
drivers/soc/qcom/Makefile | 1 +
drivers/soc/qcom/gpr.c | 487 +++++++++++++++++++++++++++++
include/dt-bindings/soc/qcom,gpr.h | 18 ++
include/linux/soc/qcom/gpr.h | 127 ++++++++
5 files changed, 642 insertions(+)
create mode 100644 drivers/soc/qcom/gpr.c
create mode 100644 include/dt-bindings/soc/qcom,gpr.h
create mode 100644 include/linux/soc/qcom/gpr.h
diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index 79b568f82a1c..66eb4a3e4bae 100644
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -209,4 +209,13 @@ config QCOM_APR
application processor and QDSP6. APR is
used by audio driver to configure QDSP6
ASM, ADM and AFE modules.
+
+config QCOM_GPR
+ tristate "Qualcomm GPR Bus (Gecko Packet Router)"
+ depends on ARCH_QCOM || COMPILE_TEST
+ depends on RPMSG
+ help
+ Enable GPR IPC protocol support between
+ application processor and QDSP6. GPR is
+ used by audio driver to configure QDSP6.
endmenu
diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
index ad675a6593d0..2e4c4fdac77a 100644
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_QCOM_SMSM) += smsm.o
obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o
obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
obj-$(CONFIG_QCOM_APR) += apr.o
+obj-$(CONFIG_QCOM_GPR) += gpr.o
obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
diff --git a/drivers/soc/qcom/gpr.c b/drivers/soc/qcom/gpr.c
new file mode 100644
index 000000000000..7c0c0fe67d92
--- /dev/null
+++ b/drivers/soc/qcom/gpr.c
@@ -0,0 +1,487 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2021, Linaro Limited
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/spinlock.h>
+#include <linux/idr.h>
+#include <linux/slab.h>
+#include <linux/workqueue.h>
+#include <linux/of_device.h>
+#include <linux/soc/qcom/gpr.h>
+#include <linux/delay.h>
+#include <linux/rpmsg.h>
+#include <linux/of.h>
+
+/* Some random values tbh which does not collide with static modules */
+#define GPR_DYNAMIC_PORT_START 0x10000000
+#define GPR_DYNAMIC_PORT_END 0x20000000
+
+struct gpr_rx_buf {
+ struct list_head node;
+ int len;
+ uint8_t buf[];
+};
+
+struct gpr {
+ struct rpmsg_endpoint *ch;
+ struct device *dev;
+ spinlock_t ports_lock;
+ spinlock_t rx_lock;
+ struct idr ports_idr;
+ int dest_domain_id;
+ struct workqueue_struct *rxwq;
+ struct work_struct rx_work;
+ struct list_head rx_list;
+};
+
+struct gpr_pkt *gpr_alloc_pkt(struct gpr_port *port, int payload_size,
+ uint32_t opcode, uint32_t token,
+ uint32_t dest_port)
+{
+ int pkt_size = GPR_HDR_SIZE + payload_size;
+ struct gpr *gpr = port->gpr;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ p = kzalloc(pkt_size, GFP_KERNEL);
+ if (!p)
+ return ERR_PTR(-ENOMEM);
+
+ pkt = p;
+ pkt->hdr.version = GPR_PKT_VER;
+ pkt->hdr.hdr_size = GPR_PKT_HEADER_WORD_SIZE;
+ pkt->hdr.pkt_size = pkt_size;
+ pkt->hdr.dest_port = dest_port;
+ pkt->hdr.src_port = port->id;
+ pkt->hdr.dest_domain = gpr->dest_domain_id;
+ pkt->hdr.src_domain = GPR_DOMAIN_ID_APPS;
+ pkt->hdr.token = token;
+ pkt->hdr.opcode = opcode;
+
+ return pkt;
+}
+EXPORT_SYMBOL_GPL(gpr_alloc_pkt);
+
+void gpr_free_pkt(struct gpr_port *port, struct gpr_pkt *pkt)
+{
+ kfree(pkt);
+}
+EXPORT_SYMBOL_GPL(gpr_free_pkt);
+
+int gpr_send_port_pkt(struct gpr_port *port, struct gpr_pkt *pkt)
+{
+ struct gpr *gpr = port->gpr;
+ struct gpr_hdr *hdr;
+ unsigned long flags;
+ int ret;
+
+ hdr = &pkt->hdr;
+
+ spin_lock_irqsave(&port->lock, flags);
+ ret = rpmsg_trysend(gpr->ch, pkt, hdr->pkt_size);
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ return ret ? ret : hdr->pkt_size;
+}
+EXPORT_SYMBOL_GPL(gpr_send_port_pkt);
+
+static void gpr_dev_release(struct device *dev)
+{
+ struct gpr_device *gdev = to_gpr_device(dev);
+
+ kfree(gdev);
+}
+
+static int gpr_callback(struct rpmsg_device *rpdev, void *buf,
+ int len, void *priv, u32 addr)
+{
+ struct gpr *gpr = dev_get_drvdata(&rpdev->dev);
+ struct gpr_rx_buf *abuf;
+ unsigned long flags;
+
+ abuf = kzalloc(sizeof(*abuf) + len, GFP_ATOMIC);
+ if (!abuf)
+ return -ENOMEM;
+
+ abuf->len = len;
+ memcpy(abuf->buf, buf, len);
+
+ spin_lock_irqsave(&gpr->rx_lock, flags);
+ list_add_tail(&abuf->node, &gpr->rx_list);
+ spin_unlock_irqrestore(&gpr->rx_lock, flags);
+
+ queue_work(gpr->rxwq, &gpr->rx_work);
+
+ return 0;
+}
+
+static int gpr_do_rx_callback(struct gpr *gpr, struct gpr_rx_buf *abuf)
+{
+ uint16_t hdr_size, ver;
+ struct gpr_port *port = NULL;
+ struct gpr_resp_pkt resp;
+ struct gpr_hdr *hdr;
+ unsigned long flags;
+ void *buf = abuf->buf;
+ int len = abuf->len;
+
+ hdr = buf;
+ ver = hdr->version;
+ if (ver > GPR_PKT_VER + 1)
+ return -EINVAL;
+
+ hdr_size = hdr->hdr_size;
+ if (hdr_size < GPR_PKT_HEADER_WORD_SIZE) {
+ dev_err(gpr->dev, "GPR: Wrong hdr size:%d\n", hdr_size);
+ return -EINVAL;
+ }
+
+ if (hdr->pkt_size < GPR_PKT_HEADER_BYTE_SIZE || hdr->pkt_size != len) {
+ dev_err(gpr->dev, "GPR: Wrong packet size\n");
+ return -EINVAL;
+ }
+
+ resp.hdr = *hdr;
+ resp.payload_size = hdr->pkt_size - (hdr_size * 4);
+
+ /*
+ * NOTE: hdr_size is not same as GPR_HDR_SIZE as remote can include
+ * optional headers in to gpr_hdr which should be ignored
+ */
+ if (resp.payload_size > 0)
+ resp.payload = buf + (hdr_size * 4);
+
+
+ spin_lock_irqsave(&gpr->ports_lock, flags);
+ port = idr_find(&gpr->ports_idr, hdr->dest_port);
+ spin_unlock_irqrestore(&gpr->ports_lock, flags);
+
+ if (!port) {
+ dev_err(gpr->dev, "GPR: Port(%x) is not registered\n",
+ hdr->dest_port);
+ return -EINVAL;
+ }
+
+ if (port->callback)
+ port->callback(&resp, port->priv, 0);
+
+ return 0;
+}
+
+static void gpr_rxwq(struct work_struct *work)
+{
+ struct gpr *gpr = container_of(work, struct gpr, rx_work);
+ struct gpr_rx_buf *abuf, *b;
+ unsigned long flags;
+
+ if (!list_empty(&gpr->rx_list)) {
+ list_for_each_entry_safe(abuf, b, &gpr->rx_list, node) {
+ gpr_do_rx_callback(gpr, abuf);
+ spin_lock_irqsave(&gpr->rx_lock, flags);
+ list_del(&abuf->node);
+ spin_unlock_irqrestore(&gpr->rx_lock, flags);
+ kfree(abuf);
+ }
+ }
+}
+
+static int gpr_device_match(struct device *dev, struct device_driver *drv)
+{
+ /* Attempt an OF style match first */
+ if (of_driver_match_device(dev, drv))
+ return 1;
+
+ return 0;
+}
+
+static int gpr_device_probe(struct device *dev)
+{
+ struct gpr_device *gdev = to_gpr_device(dev);
+ struct gpr_driver *adrv = to_gpr_driver(dev->driver);
+ int ret;
+
+ ret = adrv->probe(gdev);
+ if (!ret)
+ gdev->port.callback = adrv->callback;
+
+ return ret;
+}
+
+static int gpr_device_remove(struct device *dev)
+{
+ struct gpr_device *gdev = to_gpr_device(dev);
+ struct gpr_driver *adrv;
+ struct gpr *gpr = dev_get_drvdata(gdev->dev.parent);
+
+ if (dev->driver) {
+ adrv = to_gpr_driver(dev->driver);
+ if (adrv->remove)
+ adrv->remove(gdev);
+ spin_lock(&gpr->ports_lock);
+ idr_remove(&gpr->ports_idr, gdev->port_id);
+ spin_unlock(&gpr->ports_lock);
+ }
+
+ return 0;
+}
+
+static int gpr_uevent(struct device *dev, struct kobj_uevent_env *env)
+{
+ struct gpr_device *gdev = to_gpr_device(dev);
+ int ret;
+
+ ret = of_device_uevent_modalias(dev, env);
+ if (ret != -ENODEV)
+ return ret;
+
+ return add_uevent_var(env, "MODALIAS=gpr:%s", gdev->name);
+}
+
+struct bus_type gprbus = {
+ .name = "gprbus",
+ .match = gpr_device_match,
+ .probe = gpr_device_probe,
+ .uevent = gpr_uevent,
+ .remove = gpr_device_remove,
+};
+EXPORT_SYMBOL_GPL(gprbus);
+
+void gpr_free_port(struct gpr_port *port)
+{
+ struct gpr *gpr = port->gpr;
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpr->ports_lock, flags);
+ idr_remove(&gpr->ports_idr, port->id);
+ spin_unlock_irqrestore(&gpr->ports_lock, flags);
+
+ kfree(port);
+}
+EXPORT_SYMBOL_GPL(gpr_free_port);
+
+struct gpr_port *gpr_alloc_port(struct gpr_device* gdev, struct device *dev,
+ gpr_port_cb cb, void *priv)
+{
+ struct gpr *gpr = dev_get_drvdata(gdev->dev.parent);
+ struct gpr_port *port;
+ int id;
+
+ port = kzalloc(sizeof(*port), GFP_KERNEL);
+ if (!port)
+ return ERR_PTR(-ENOMEM);
+
+ port->callback = cb;
+ port->gpr = gpr;
+ port->priv = priv;
+ port->dev = dev;
+ spin_lock_init(&port->lock);
+
+ spin_lock(&gpr->ports_lock);
+ id = idr_alloc_cyclic(&gpr->ports_idr, port, GPR_DYNAMIC_PORT_START,
+ GPR_DYNAMIC_PORT_END, GFP_ATOMIC);
+ if (id < 0) {
+ dev_err(dev, "Unable to allocate dynamic GPR src port\n");
+ kfree(port);
+ spin_unlock(&gpr->ports_lock);
+ return ERR_PTR(-ENOMEM);
+ }
+ port->id = id;
+ spin_unlock(&gpr->ports_lock);
+
+ dev_info(dev, "Adding GPR src port (%x)\n", port->id);
+
+ return port;
+}
+EXPORT_SYMBOL_GPL(gpr_alloc_port);
+
+static int gpr_add_device(struct device *dev, struct device_node *np,
+ u32 port_id, u32 domain_id)
+{
+ struct gpr *gpr = dev_get_drvdata(dev);
+ struct gpr_device *gdev = NULL;
+ int ret;
+
+ gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
+ if (!gdev)
+ return -ENOMEM;
+
+ gdev->port_id = port_id;
+ gdev->domain_id = domain_id;
+ if (np)
+ snprintf(gdev->name, GPR_NAME_SIZE, "%pOFn", np);
+
+ dev_set_name(&gdev->dev, "gprport:%s:%x:%x", gdev->name,
+ domain_id, port_id);
+
+ gdev->dev.bus = &gprbus;
+ gdev->dev.parent = dev;
+ gdev->dev.of_node = np;
+ gdev->dev.release = gpr_dev_release;
+ gdev->dev.driver = NULL;
+
+ gdev->port.gpr = gpr;
+ gdev->port.priv = gdev;
+ gdev->port.id = port_id;
+ spin_lock_init(&gdev->port.lock);
+
+ spin_lock(&gpr->ports_lock);
+ idr_alloc(&gpr->ports_idr, &gdev->port, port_id,
+ port_id + 1, GFP_ATOMIC);
+ spin_unlock(&gpr->ports_lock);
+
+ dev_info(dev, "Adding GPR dev: %s\n", dev_name(&gdev->dev));
+
+ ret = device_register(&gdev->dev);
+ if (ret) {
+ dev_err(dev, "device_register failed: %d\n", ret);
+ put_device(&gdev->dev);
+ }
+
+ return ret;
+}
+
+static void of_register_gpr_devices(struct device *dev)
+{
+ struct gpr *gpr = dev_get_drvdata(dev);
+ struct device_node *node;
+
+ for_each_child_of_node(dev->of_node, node) {
+ u32 port_id;
+ u32 domain_id;
+
+ if (of_property_read_u32(node, "reg", &port_id))
+ continue;
+
+ domain_id = gpr->dest_domain_id;
+
+ if (gpr_add_device(dev, node, port_id, domain_id))
+ dev_err(dev, "Failed to add gpr %d port\n", port_id);
+ }
+}
+
+static int gpr_probe(struct rpmsg_device *rpdev)
+{
+ struct device *dev = &rpdev->dev;
+ struct gpr *gpr;
+ int ret;
+
+ gpr = devm_kzalloc(dev, sizeof(*gpr), GFP_KERNEL);
+ if (!gpr)
+ return -ENOMEM;
+
+ ret = of_property_read_u32(dev->of_node, "qcom,gpr-domain",
+ &gpr->dest_domain_id);
+ if (ret) {
+ dev_err(dev, "GPR Domain ID not specified in DT\n");
+ return ret;
+ }
+
+ dev_set_drvdata(dev, gpr);
+ gpr->ch = rpdev->ept;
+ gpr->dev = dev;
+ gpr->rxwq = create_singlethread_workqueue("qcom_gpr_rx");
+ if (!gpr->rxwq) {
+ dev_err(gpr->dev, "Failed to start Rx WQ\n");
+ return -ENOMEM;
+ }
+ INIT_WORK(&gpr->rx_work, gpr_rxwq);
+
+ INIT_LIST_HEAD(&gpr->rx_list);
+ spin_lock_init(&gpr->rx_lock);
+ spin_lock_init(&gpr->ports_lock);
+ idr_init(&gpr->ports_idr);
+
+ of_register_gpr_devices(dev);
+
+ return 0;
+}
+
+static int gpr_remove_device(struct device *dev, void *null)
+{
+ struct gpr_device *gdev = to_gpr_device(dev);
+
+ device_unregister(&gdev->dev);
+
+ return 0;
+}
+
+static void gpr_remove(struct rpmsg_device *rpdev)
+{
+ struct gpr *gpr = dev_get_drvdata(&rpdev->dev);
+
+ device_for_each_child(&rpdev->dev, NULL, gpr_remove_device);
+ flush_workqueue(gpr->rxwq);
+ destroy_workqueue(gpr->rxwq);
+}
+
+/*
+ * __gpr_driver_register() - Client driver registration with gprbus
+ *
+ * @drv:Client driver to be associated with client-device.
+ * @owner: owning module/driver
+ *
+ * This API will register the client driver with the gprbus
+ * It is called from the driver's module-init function.
+ */
+int __gpr_driver_register(struct gpr_driver *drv, struct module *owner)
+{
+ drv->driver.bus = &gprbus;
+ drv->driver.owner = owner;
+
+ return driver_register(&drv->driver);
+}
+EXPORT_SYMBOL_GPL(__gpr_driver_register);
+
+/*
+ * gpr_driver_unregister() - Undo effect of gpr_driver_register
+ *
+ * @drv: Client driver to be unregistered
+ */
+void gpr_driver_unregister(struct gpr_driver *drv)
+{
+ driver_unregister(&drv->driver);
+}
+EXPORT_SYMBOL_GPL(gpr_driver_unregister);
+
+static const struct of_device_id gpr_of_match[] = {
+ { .compatible = "qcom,gpr", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, gpr_of_match);
+
+static struct rpmsg_driver gpr_driver = {
+ .probe = gpr_probe,
+ .remove = gpr_remove,
+ .callback = gpr_callback,
+ .drv = {
+ .name = "qcom,gpr",
+ .of_match_table = gpr_of_match,
+ },
+};
+
+static int __init gpr_init(void)
+{
+ int ret;
+
+ ret = bus_register(&gprbus);
+ if (!ret)
+ ret = register_rpmsg_driver(&gpr_driver);
+ else
+ bus_unregister(&gprbus);
+
+ return ret;
+}
+
+static void __exit gpr_exit(void)
+{
+ bus_unregister(&gprbus);
+ unregister_rpmsg_driver(&gpr_driver);
+}
+
+subsys_initcall(gpr_init);
+module_exit(gpr_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Qualcomm GPR Bus");
diff --git a/include/dt-bindings/soc/qcom,gpr.h b/include/dt-bindings/soc/qcom,gpr.h
new file mode 100644
index 000000000000..1c68906e079c
--- /dev/null
+++ b/include/dt-bindings/soc/qcom,gpr.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_QCOM_GPR_H
+#define __DT_BINDINGS_QCOM_GPR_H
+
+/* DOMAINS */
+
+#define GPR_DOMAIN_ID_MODEM 1
+#define GPR_DOMAIN_ID_ADSP 2
+#define GPR_DOMAIN_ID_APPS 3
+
+/* Static Services */
+
+#define GPR_APM_MODULE_IID 1
+#define GPR_PRM_MODULE_IID 2
+#define GPR_AMDB_MODULE_IID 3
+#define GPR_VCPM_MODULE_IID 4
+
+#endif /* __DT_BINDINGS_QCOM_GPR_H */
diff --git a/include/linux/soc/qcom/gpr.h b/include/linux/soc/qcom/gpr.h
new file mode 100644
index 000000000000..05cbbc407a49
--- /dev/null
+++ b/include/linux/soc/qcom/gpr.h
@@ -0,0 +1,127 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __QCOM_GPR_H_
+#define __QCOM_GPR_H_
+
+#include <linux/spinlock.h>
+#include <linux/device.h>
+#include <dt-bindings/soc/qcom,gpr.h>
+
+#define APM_MODULE_INSTANCE_ID GPR_APM_MODULE_IID
+#define PRM_MODULE_INSTANCE_ID GPR_PRM_MODULE_IID
+#define AMDB_MODULE_INSTANCE_ID GPR_AMDB_MODULE_IID
+#define VCPM_MODULE_INSTANCE_ID GPR_VCPM_MODULE_IID
+
+struct gpr_hdr {
+ uint32_t version:4;
+ uint32_t hdr_size:4;
+ uint32_t pkt_size:24;
+ uint32_t dest_domain:8;
+ uint32_t src_domain:8;
+ uint32_t reserved:16;
+ uint32_t src_port;
+ uint32_t dest_port;
+ uint32_t token;
+ uint32_t opcode;
+} __packed;
+
+struct gpr_pkt {
+ struct gpr_hdr hdr;
+ uint32_t payload[0];
+};
+
+struct gpr_resp_pkt {
+ struct gpr_hdr hdr;
+ void *payload;
+ int payload_size;
+};
+
+#define GPR_HDR_SIZE sizeof(struct gpr_hdr)
+#define GPR_PKT_VER 0x0
+#define GPR_PKT_HEADER_WORD_SIZE ((sizeof(struct gpr_pkt) + 3) >> 2)
+#define GPR_PKT_HEADER_BYTE_SIZE (GPR_PKT_HEADER_WORD_SIZE << 2)
+#define GPR_DOMAIN_ID_MODEM 1
+#define GPR_DOMAIN_ID_ADSP 2
+#define GPR_DOMAIN_ID_APPS 3
+
+#define GPR_BASIC_RSP_RESULT 0x02001005
+struct gpr_ibasic_rsp_result_t {
+ uint32_t opcode;
+ uint32_t status;
+};
+
+#define GPR_BASIC_EVT_ACCEPTED 0x02001006
+struct gpr_ibasic_rsp_accepted_t {
+ uint32_t opcode;
+};
+
+extern struct bus_type gprbus;
+typedef int (*gpr_port_cb) (struct gpr_resp_pkt *d, void *priv, int op);
+
+struct gpr_port {
+ struct device *dev;
+ gpr_port_cb callback;
+ struct gpr *gpr;
+ spinlock_t lock;
+ int id;
+ void *priv;
+};
+
+#define GPR_NAME_SIZE 128
+struct gpr_device {
+ struct device dev;
+ uint16_t port_id;
+ uint16_t domain_id;
+ uint32_t version;
+ char name[GPR_NAME_SIZE];
+ struct gpr_port port;
+};
+
+#define to_gpr_device(d) container_of(d, struct gpr_device, dev)
+
+struct gpr_driver {
+ int (*probe)(struct gpr_device *sl);
+ int (*remove)(struct gpr_device *sl);
+ int (*callback)(struct gpr_resp_pkt *d, void *data, int op);
+ struct device_driver driver;
+};
+
+#define to_gpr_driver(d) container_of(d, struct gpr_driver, driver)
+
+/*
+ * use a macro to avoid include chaining to get THIS_MODULE
+ */
+#define gpr_driver_register(drv) __gpr_driver_register(drv, THIS_MODULE)
+
+int __gpr_driver_register(struct gpr_driver *drv, struct module *owner);
+void gpr_driver_unregister(struct gpr_driver *drv);
+
+/**
+ * module_gpr_driver() - Helper macro for registering a aprbus driver
+ * @__aprbus_driver: aprbus_driver struct
+ *
+ * Helper macro for aprbus drivers which do not do anything special in
+ * module init/exit. This eliminates a lot of boilerplate. Each module
+ * may only use this macro once, and calling it replaces module_init()
+ * and module_exit()
+ */
+#define module_gpr_driver(__gpr_driver) \
+ module_driver(__gpr_driver, gpr_driver_register, \
+ gpr_driver_unregister)
+
+struct gpr_port *gpr_alloc_port(struct gpr_device *gdev, struct device *dev,
+ gpr_port_cb cb, void *priv);
+void gpr_free_port(struct gpr_port *port);
+
+struct gpr_pkt *gpr_alloc_pkt(struct gpr_port *port, int payload_size,
+ uint32_t opcode, uint32_t token,
+ uint32_t dest_port);
+void gpr_free_pkt(struct gpr_port *port, struct gpr_pkt *pkt);
+
+int gpr_send_port_pkt(struct gpr_port *port, struct gpr_pkt *pkt);
+static inline int gpr_send_pkt(struct gpr_device *gdev, struct gpr_pkt *pkt)
+{
+ return gpr_send_port_pkt(&gdev->port, pkt);
+}
+
+#endif /* __QCOM_GPR_H_ */
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [RFC PATCH 03/13] ASoC: qcom: dt-bindings: add bindings Audio Processing manager
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-07 15:28 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: plai, tiwai, robh, devicetree, perex, alsa-devel, linux-kernel,
lgirdwood, bgoswami, Srinivas Kandagatla
This patch adds bindings support for Qualcomm Audio Processing Manager
service in Audio DSP.
Audio Process Manager is one of the static service in DSP which is
responsible for Command/response handling, graph Management
and Control/Event management between modules.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../devicetree/bindings/sound/qcom,q6apm.yaml | 72 +++++++++++++++++++
1 file changed, 72 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
new file mode 100644
index 000000000000..9906ef935206
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/sound/qcom,q6apm.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcomm Audio Process Manager binding
+
+maintainers:
+ - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+
+description: |
+ This binding describes the Qualcomm Audio Process Manager service in DSP
+
+properties:
+ compatible:
+ const: qcom,q6apm
+
+ reg:
+ maxItems: 1
+
+#APM Services
+patternProperties:
+ "^.*@[0-9a-f]+$":
+ type: object
+ description:
+ APM devices use subnodes for services.
+
+ properties:
+ compatible:
+ enum:
+ - qcom,q6apm-dai
+ - qcom,q6apm-bedai
+
+ iommus:
+ maxItems: 1
+
+ "#sound-dai-cels":
+ const: 1
+
+ required:
+ - compatible
+ - reg
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: true
+
+examples:
+ - |
+ gpr {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gprservice@1 {
+ compatible = "qcom,q6apm";
+ reg = <1>;
+
+ q6apm-dai {
+ compatible = "qcom,q6apm-dai";
+ #sound-dai-cels = <1>;
+ };
+
+ q6apm-bedai {
+ compatible = "qcom,q6apm-bedai";
+ #sound-dai-cels = <1>;
+ };
+ };
+ };
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* [RFC PATCH 03/13] ASoC: qcom: dt-bindings: add bindings Audio Processing manager
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
This patch adds bindings support for Qualcomm Audio Processing Manager
service in Audio DSP.
Audio Process Manager is one of the static service in DSP which is
responsible for Command/response handling, graph Management
and Control/Event management between modules.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../devicetree/bindings/sound/qcom,q6apm.yaml | 72 +++++++++++++++++++
1 file changed, 72 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
new file mode 100644
index 000000000000..9906ef935206
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/sound/qcom,q6apm.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcomm Audio Process Manager binding
+
+maintainers:
+ - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+
+description: |
+ This binding describes the Qualcomm Audio Process Manager service in DSP
+
+properties:
+ compatible:
+ const: qcom,q6apm
+
+ reg:
+ maxItems: 1
+
+#APM Services
+patternProperties:
+ "^.*@[0-9a-f]+$":
+ type: object
+ description:
+ APM devices use subnodes for services.
+
+ properties:
+ compatible:
+ enum:
+ - qcom,q6apm-dai
+ - qcom,q6apm-bedai
+
+ iommus:
+ maxItems: 1
+
+ "#sound-dai-cels":
+ const: 1
+
+ required:
+ - compatible
+ - reg
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: true
+
+examples:
+ - |
+ gpr {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gprservice@1 {
+ compatible = "qcom,q6apm";
+ reg = <1>;
+
+ q6apm-dai {
+ compatible = "qcom,q6apm-dai";
+ #sound-dai-cels = <1>;
+ };
+
+ q6apm-bedai {
+ compatible = "qcom,q6apm-bedai";
+ #sound-dai-cels = <1>;
+ };
+ };
+ };
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: [RFC PATCH 03/13] ASoC: qcom: dt-bindings: add bindings Audio Processing manager
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-18 20:16 ` Rob Herring
-1 siblings, 0 replies; 42+ messages in thread
From: Rob Herring @ 2021-06-18 20:16 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: bjorn.andersson, broonie, plai, tiwai, devicetree, perex,
alsa-devel, linux-kernel, lgirdwood, bgoswami
On Mon, Jun 07, 2021 at 04:28:26PM +0100, Srinivas Kandagatla wrote:
> This patch adds bindings support for Qualcomm Audio Processing Manager
> service in Audio DSP.
>
> Audio Process Manager is one of the static service in DSP which is
> responsible for Command/response handling, graph Management
> and Control/Event management between modules.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> .../devicetree/bindings/sound/qcom,q6apm.yaml | 72 +++++++++++++++++++
> 1 file changed, 72 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
>
> diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
> new file mode 100644
> index 000000000000..9906ef935206
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
> @@ -0,0 +1,72 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/sound/qcom,q6apm.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm Audio Process Manager binding
> +
> +maintainers:
> + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> +
> +description: |
> + This binding describes the Qualcomm Audio Process Manager service in DSP
> +
> +properties:
> + compatible:
> + const: qcom,q6apm
> +
> + reg:
> + maxItems: 1
> +
> +#APM Services
> +patternProperties:
> + "^.*@[0-9a-f]+$":
You can drop '^.*'.
> + type: object
> + description:
> + APM devices use subnodes for services.
> +
> + properties:
> + compatible:
> + enum:
> + - qcom,q6apm-dai
> + - qcom,q6apm-bedai
> +
> + iommus:
> + maxItems: 1
> +
> + "#sound-dai-cels":
cells?
How is this optional?
> + const: 1
> +
> + required:
> + - compatible
> + - reg
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: true
This needs to be false and fix whatever is missing.
> +
> +examples:
> + - |
> + gpr {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + gprservice@1 {
> + compatible = "qcom,q6apm";
> + reg = <1>;
> +
> + q6apm-dai {
This doesn't match what you have in the schema at all.
> + compatible = "qcom,q6apm-dai";
> + #sound-dai-cels = <1>;
> + };
> +
> + q6apm-bedai {
> + compatible = "qcom,q6apm-bedai";
> + #sound-dai-cels = <1>;
> + };
> + };
> + };
> --
> 2.21.0
>
>
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [RFC PATCH 03/13] ASoC: qcom: dt-bindings: add bindings Audio Processing manager
@ 2021-06-18 20:16 ` Rob Herring
0 siblings, 0 replies; 42+ messages in thread
From: Rob Herring @ 2021-06-18 20:16 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: devicetree, alsa-devel, bgoswami, lgirdwood, tiwai, plai,
linux-kernel, broonie, bjorn.andersson
On Mon, Jun 07, 2021 at 04:28:26PM +0100, Srinivas Kandagatla wrote:
> This patch adds bindings support for Qualcomm Audio Processing Manager
> service in Audio DSP.
>
> Audio Process Manager is one of the static service in DSP which is
> responsible for Command/response handling, graph Management
> and Control/Event management between modules.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> .../devicetree/bindings/sound/qcom,q6apm.yaml | 72 +++++++++++++++++++
> 1 file changed, 72 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
>
> diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
> new file mode 100644
> index 000000000000..9906ef935206
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
> @@ -0,0 +1,72 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/sound/qcom,q6apm.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm Audio Process Manager binding
> +
> +maintainers:
> + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> +
> +description: |
> + This binding describes the Qualcomm Audio Process Manager service in DSP
> +
> +properties:
> + compatible:
> + const: qcom,q6apm
> +
> + reg:
> + maxItems: 1
> +
> +#APM Services
> +patternProperties:
> + "^.*@[0-9a-f]+$":
You can drop '^.*'.
> + type: object
> + description:
> + APM devices use subnodes for services.
> +
> + properties:
> + compatible:
> + enum:
> + - qcom,q6apm-dai
> + - qcom,q6apm-bedai
> +
> + iommus:
> + maxItems: 1
> +
> + "#sound-dai-cels":
cells?
How is this optional?
> + const: 1
> +
> + required:
> + - compatible
> + - reg
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: true
This needs to be false and fix whatever is missing.
> +
> +examples:
> + - |
> + gpr {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + gprservice@1 {
> + compatible = "qcom,q6apm";
> + reg = <1>;
> +
> + q6apm-dai {
This doesn't match what you have in the schema at all.
> + compatible = "qcom,q6apm-dai";
> + #sound-dai-cels = <1>;
> + };
> +
> + q6apm-bedai {
> + compatible = "qcom,q6apm-bedai";
> + #sound-dai-cels = <1>;
> + };
> + };
> + };
> --
> 2.21.0
>
>
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [RFC PATCH 03/13] ASoC: qcom: dt-bindings: add bindings Audio Processing manager
2021-06-18 20:16 ` Rob Herring
@ 2021-07-12 8:20 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-07-12 8:20 UTC (permalink / raw)
To: Rob Herring
Cc: bjorn.andersson, broonie, plai, tiwai, devicetree, perex,
alsa-devel, linux-kernel, lgirdwood, bgoswami
On 18/06/2021 21:16, Rob Herring wrote:
> On Mon, Jun 07, 2021 at 04:28:26PM +0100, Srinivas Kandagatla wrote:
>> This patch adds bindings support for Qualcomm Audio Processing Manager
>> service in Audio DSP.
>>
>> Audio Process Manager is one of the static service in DSP which is
>> responsible for Command/response handling, graph Management
>> and Control/Event management between modules.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>> .../devicetree/bindings/sound/qcom,q6apm.yaml | 72 +++++++++++++++++++
>> 1 file changed, 72 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
>> new file mode 100644
>> index 000000000000..9906ef935206
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
>> @@ -0,0 +1,72 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: "http://devicetree.org/schemas/sound/qcom,q6apm.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>> +
>> +title: Qualcomm Audio Process Manager binding
>> +
>> +maintainers:
>> + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> +
>> +description: |
>> + This binding describes the Qualcomm Audio Process Manager service in DSP
>> +
>> +properties:
>> + compatible:
>> + const: qcom,q6apm
>> +
>> + reg:
>> + maxItems: 1
>> +
>> +#APM Services
>> +patternProperties:
>> + "^.*@[0-9a-f]+$":
>
> You can drop '^.*'.
Thanks Rob for review,
will fix this along other comments in next spin.
--srini
>
>> + type: object
>> + description:
>> + APM devices use subnodes for services.
>> +
>> + properties:
>> + compatible:
>> + enum:
>> + - qcom,q6apm-dai
>> + - qcom,q6apm-bedai
>> +
>> + iommus:
>> + maxItems: 1
>> +
>> + "#sound-dai-cels":
>
> cells?
>
> How is this optional?
>
>> + const: 1
>> +
>> + required:
>> + - compatible
>> + - reg
>> +
>> + additionalProperties: false
>> +
>> +required:
>> + - compatible
>> + - reg
>> +
>> +additionalProperties: true
>
> This needs to be false and fix whatever is missing.
>
>> +
>> +examples:
>> + - |
>> + gpr {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + gprservice@1 {
>> + compatible = "qcom,q6apm";
>> + reg = <1>;
>> +
>> + q6apm-dai {
>
> This doesn't match what you have in the schema at all.
>
>> + compatible = "qcom,q6apm-dai";
>> + #sound-dai-cels = <1>;
>> + };
>> +
>> + q6apm-bedai {
>> + compatible = "qcom,q6apm-bedai";
>> + #sound-dai-cels = <1>;
>> + };
>> + };
>> + };
>> --
>> 2.21.0
>>
>>
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [RFC PATCH 03/13] ASoC: qcom: dt-bindings: add bindings Audio Processing manager
@ 2021-07-12 8:20 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-07-12 8:20 UTC (permalink / raw)
To: Rob Herring
Cc: devicetree, alsa-devel, bgoswami, lgirdwood, tiwai, plai,
linux-kernel, broonie, bjorn.andersson
On 18/06/2021 21:16, Rob Herring wrote:
> On Mon, Jun 07, 2021 at 04:28:26PM +0100, Srinivas Kandagatla wrote:
>> This patch adds bindings support for Qualcomm Audio Processing Manager
>> service in Audio DSP.
>>
>> Audio Process Manager is one of the static service in DSP which is
>> responsible for Command/response handling, graph Management
>> and Control/Event management between modules.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>> .../devicetree/bindings/sound/qcom,q6apm.yaml | 72 +++++++++++++++++++
>> 1 file changed, 72 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
>> new file mode 100644
>> index 000000000000..9906ef935206
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml
>> @@ -0,0 +1,72 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: "http://devicetree.org/schemas/sound/qcom,q6apm.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>> +
>> +title: Qualcomm Audio Process Manager binding
>> +
>> +maintainers:
>> + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> +
>> +description: |
>> + This binding describes the Qualcomm Audio Process Manager service in DSP
>> +
>> +properties:
>> + compatible:
>> + const: qcom,q6apm
>> +
>> + reg:
>> + maxItems: 1
>> +
>> +#APM Services
>> +patternProperties:
>> + "^.*@[0-9a-f]+$":
>
> You can drop '^.*'.
Thanks Rob for review,
will fix this along other comments in next spin.
--srini
>
>> + type: object
>> + description:
>> + APM devices use subnodes for services.
>> +
>> + properties:
>> + compatible:
>> + enum:
>> + - qcom,q6apm-dai
>> + - qcom,q6apm-bedai
>> +
>> + iommus:
>> + maxItems: 1
>> +
>> + "#sound-dai-cels":
>
> cells?
>
> How is this optional?
>
>> + const: 1
>> +
>> + required:
>> + - compatible
>> + - reg
>> +
>> + additionalProperties: false
>> +
>> +required:
>> + - compatible
>> + - reg
>> +
>> +additionalProperties: true
>
> This needs to be false and fix whatever is missing.
>
>> +
>> +examples:
>> + - |
>> + gpr {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + gprservice@1 {
>> + compatible = "qcom,q6apm";
>> + reg = <1>;
>> +
>> + q6apm-dai {
>
> This doesn't match what you have in the schema at all.
>
>> + compatible = "qcom,q6apm-dai";
>> + #sound-dai-cels = <1>;
>> + };
>> +
>> + q6apm-bedai {
>> + compatible = "qcom,q6apm-bedai";
>> + #sound-dai-cels = <1>;
>> + };
>> + };
>> + };
>> --
>> 2.21.0
>>
>>
^ permalink raw reply [flat|nested] 42+ messages in thread
* [RFC PATCH 04/13] ASoC: qcom: audioreach: add basic pkt alloc support
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-07 15:28 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: plai, tiwai, robh, devicetree, perex, alsa-devel, linux-kernel,
lgirdwood, bgoswami, Srinivas Kandagatla
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
sound/soc/qcom/Kconfig | 7 +
sound/soc/qcom/Makefile | 1 +
sound/soc/qcom/audioreach/Makefile | 6 +
sound/soc/qcom/audioreach/audioreach.c | 279 +++++++++++
sound/soc/qcom/audioreach/audioreach.h | 624 +++++++++++++++++++++++++
5 files changed, 917 insertions(+)
create mode 100644 sound/soc/qcom/audioreach/Makefile
create mode 100644 sound/soc/qcom/audioreach/audioreach.c
create mode 100644 sound/soc/qcom/audioreach/audioreach.h
diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
index cc7c1de2f1d9..3070eccb6064 100644
--- a/sound/soc/qcom/Kconfig
+++ b/sound/soc/qcom/Kconfig
@@ -103,6 +103,13 @@ config SND_SOC_QDSP6
audio drivers. This includes q6asm, q6adm,
q6afe interfaces to DSP using apr.
+config SND_SOC_QCOM_AUDIOREACH
+ tristate "SoC ALSA audio drives for Qualcomm AUDIOREACH"
+ depends on QCOM_GPR
+ help
+ Support for AudioReach in QDSP
+
+
config SND_SOC_MSM8996
tristate "SoC Machine driver for MSM8996 and APQ8096 boards"
depends on QCOM_APR
diff --git a/sound/soc/qcom/Makefile b/sound/soc/qcom/Makefile
index 1600ae55bd34..bfa5d44f9592 100644
--- a/sound/soc/qcom/Makefile
+++ b/sound/soc/qcom/Makefile
@@ -33,3 +33,4 @@ obj-$(CONFIG_SND_SOC_QCOM_COMMON) += snd-soc-qcom-common.o
#DSP lib
obj-$(CONFIG_SND_SOC_QDSP6) += qdsp6/
+obj-${CONFIG_SND_SOC_QCOM_AUDIOREACH} += audioreach/
diff --git a/sound/soc/qcom/audioreach/Makefile b/sound/soc/qcom/audioreach/Makefile
new file mode 100644
index 000000000000..575edbed29a2
--- /dev/null
+++ b/sound/soc/qcom/audioreach/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0-only
+snd-ar-objs := audioreach.o
+
+obj-$(CONFIG_SND_SOC_QCOM_AUDIOREACH) += snd-ar.o
+
+
diff --git a/sound/soc/qcom/audioreach/audioreach.c b/sound/soc/qcom/audioreach/audioreach.c
new file mode 100644
index 000000000000..617163473b1c
--- /dev/null
+++ b/sound/soc/qcom/audioreach/audioreach.c
@@ -0,0 +1,279 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2020, Linaro Limited
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/soc/qcom/gpr.h>
+#include <dt-bindings/soc/qcom,gpr.h>
+#include "audioreach.h"
+
+/* SubGraph Config */
+struct apm_sub_graph_data {
+ //Subgraph Config
+ struct apm_sub_graph_cfg sub_graph_cfg;
+
+ //sub graph perf mode
+ struct apm_prop_data perf_data;
+ struct apm_sg_prop_id_perf_mode perf;
+
+ // direction
+ struct apm_prop_data dir_data;
+ struct apm_sg_prop_id_direction dir;
+
+ // sid
+ struct apm_prop_data sid_data;
+ struct apm_sg_prop_id_scenario_id sid;
+
+} __packed;
+
+#define APM_SUB_GRAPH_CFG_NPROP 3
+
+struct apm_sub_graph_params {
+ struct apm_module_param_data param_data;
+ uint32_t num_sub_graphs;
+ struct apm_sub_graph_data sg_cfg[0];
+} __packed;
+
+#define APM_SUB_GRAPH_PSIZE(n) ALIGN(sizeof(struct apm_sub_graph_params) + \
+ n * sizeof(struct apm_sub_graph_data), 8)
+/* container config */
+struct apm_container_obj {
+ struct apm_container_cfg container_cfg;
+ /* Capablity ID list */
+ struct apm_prop_data cap_data;
+ uint32_t num_capablity_id;
+ uint32_t capability_id;
+
+ /* Container graph Position */
+ struct apm_prop_data pos_data;
+ struct apm_cont_prop_id_graph_pos pos;
+
+ /* Container Stack size */
+ struct apm_prop_data stack_data;
+ struct apm_cont_prop_id_stack_size stack;
+
+ /* Container proc domain id */
+ struct apm_prop_data domain_data;
+ struct apm_cont_prop_id_domain domain;
+} __packed;
+
+struct apm_container_params {
+ struct apm_module_param_data param_data;
+ uint32_t num_containers;
+ struct apm_container_obj cont_obj[0];
+} __packed;
+
+#define APM_CONTAINER_PSIZE(n) ALIGN(sizeof(struct apm_container_params) + \
+ n * sizeof(struct apm_container_obj), 8)
+
+/* Module List config */
+struct apm_mod_list_obj {
+ /* Modules list cfg */
+ uint32_t sub_graph_id;
+ uint32_t container_id;
+ uint32_t num_modules;
+ struct apm_module_obj mod_cfg[0];
+} __packed;
+
+struct apm_module_list_params {
+ struct apm_module_param_data param_data;
+ uint32_t num_modules_list;
+ /* Module list config array */
+ struct apm_mod_list_obj mod_list_obj[0];
+
+} __packed;
+
+#define APM_MOD_LIST_OBJ_PSIZE(m) (sizeof(struct apm_mod_list_obj) + \
+ m * sizeof(struct apm_module_obj))
+
+/* n modules list m mod per list */
+#define APM_MOD_LIST_PSIZE(n, m) ALIGN(sizeof(struct apm_module_list_params) + \
+ n * (sizeof(struct apm_mod_list_obj) + \
+ m * sizeof(struct apm_module_obj)), 8)
+
+/* Module Properties */
+struct apm_mod_prop_obj {
+ u32 instance_id;
+ u32 num_props;
+ struct apm_prop_data prop_data_1;
+ struct apm_module_prop_id_port_info prop_id_port;
+} __packed;
+
+struct apm_prop_list_params {
+ struct apm_module_param_data param_data;
+ u32 num_modules_prop_cfg;
+ struct apm_mod_prop_obj mod_prop_obj[0];
+
+} __packed;
+
+#define APM_MOD_PROP_PSIZE(n) ALIGN(sizeof(struct apm_prop_list_params) + \
+ n * sizeof(struct apm_mod_prop_obj), 8)
+
+/* Module Connections */
+struct apm_mod_conn_list_params {
+ struct apm_module_param_data param_data;
+ u32 num_connections;
+ struct apm_module_conn_obj conn_obj[0];
+
+} __packed;
+
+#define APM_MOD_CONN_PSIZE(n) ALIGN(sizeof(struct apm_mod_conn_list_params) + \
+ n * sizeof(struct apm_module_conn_obj), 8)
+
+struct apm_graph_open_params {
+ struct apm_cmd_header *cmd_header;
+ struct apm_sub_graph_params *sg_data;
+ struct apm_container_params *cont_data;
+ struct apm_module_list_params *mod_list_data;
+ struct apm_prop_list_params *mod_prop_data;
+ struct apm_mod_conn_list_params *mod_conn_list_data;
+} __packed;
+
+struct apm_pcm_module_media_fmt_cmd {
+ struct apm_module_param_data param_data;
+ struct param_id_pcm_output_format_cfg header;
+ struct payload_pcm_output_format_cfg media_cfg;
+} __packed;
+
+struct apm_rd_shmem_module_config_cmd {
+ struct apm_module_param_data param_data;
+ struct param_id_rd_sh_mem_cfg cfg;
+} __packed;
+
+struct apm_sh_module_media_fmt_cmd {
+ struct media_format header;
+ struct payload_media_fmt_pcm cfg;
+} __packed;
+
+#define APM_SHMEM_FMT_CFG_PSIZE(n) ALIGN( \
+ sizeof(struct apm_sh_module_media_fmt_cmd) + \
+ n * sizeof(uint8_t), 8)
+
+/* num of channels as argument */
+#define APM_PCM_MODULE_FMT_CMD_PSIZE(n) ALIGN( \
+ sizeof(struct apm_pcm_module_media_fmt_cmd) + \
+ n * sizeof(uint8_t), 8)
+#define APM_PCM_OUT_FMT_CFG_PSIZE(n) ALIGN((sizeof( \
+ struct payload_pcm_output_format_cfg) + \
+ n * sizeof(uint8_t)), 4)
+
+struct apm_i2s_module_intf_cfg {
+ struct apm_module_param_data param_data;
+ struct param_id_i2s_intf_cfg cfg;
+} __packed;
+#define APM_I2S_INTF_CFG_PSIZE ALIGN(sizeof(struct apm_i2s_module_intf_cfg), \
+ 8)
+
+struct apm_module_hw_ep_mf_cfg {
+ struct apm_module_param_data param_data;
+ struct param_id_hw_ep_mf mf;
+} __packed;
+#define APM_HW_EP_CFG_PSIZE ALIGN( \
+ sizeof(struct apm_module_hw_ep_mf_cfg), \
+ 8)
+
+struct apm_module_frame_size_factor_cfg {
+ struct apm_module_param_data param_data;
+ uint32_t frame_size_factor;
+} __packed;
+#define APM_FS_CFG_PSIZE ALIGN( \
+ sizeof(struct apm_module_frame_size_factor_cfg), \
+ 8)
+
+struct apm_module_hw_ep_power_mode_cfg {
+ struct apm_module_param_data param_data;
+ struct param_id_hw_ep_power_mode_cfg power_mode;
+} __packed;
+#define APM_HW_EP_PMODE_CFG_PSIZE ALIGN( \
+ sizeof(struct apm_module_hw_ep_power_mode_cfg), \
+ 8)
+
+struct apm_module_hw_ep_dma_data_align_cfg {
+ struct apm_module_param_data param_data;
+ struct param_id_hw_ep_dma_data_align align;
+} __packed;
+#define APM_HW_EP_DALIGN_CFG_PSIZE ALIGN( \
+ sizeof(struct apm_module_hw_ep_dma_data_align_cfg), \
+ 8)
+
+struct apm_gain_module_cfg {
+ struct apm_module_param_data param_data;
+ struct param_id_gain_cfg gain_cfg;
+} __packed;
+#define APM_GAIN_CFG_PSIZE ALIGN(sizeof(struct apm_gain_module_cfg), 8)
+
+struct apm_codec_dma_module_intf_cfg {
+ struct apm_module_param_data param_data;
+ struct param_id_codec_dma_intf_cfg cfg;
+} __packed;
+#define APM_CDMA_INTF_CFG_PSIZE ALIGN( \
+ sizeof(struct apm_codec_dma_module_intf_cfg), 8)
+
+static void *__audioreach_alloc_pkt(int payload_size, uint32_t opcode,
+ uint32_t token, uint32_t src_port,
+ uint32_t dest_port, bool has_cmd_hdr)
+{
+ struct apm_cmd_header *cmd_header;
+ struct gpr_pkt *pkt;
+ void *p;
+ int pkt_size = GPR_HDR_SIZE + payload_size;
+
+ if (has_cmd_hdr)
+ pkt_size += APM_CMD_HDR_SIZE;
+
+ p = kzalloc(pkt_size, GFP_KERNEL);
+ if (!p)
+ return ERR_PTR(-ENOMEM);
+
+ pkt = p;
+ pkt->hdr.version = GPR_PKT_VER;
+ pkt->hdr.hdr_size = 6;////GPR_PKT_HEADER_WORD_SIZE;
+ pkt->hdr.pkt_size = pkt_size;
+ pkt->hdr.dest_port = dest_port;
+ pkt->hdr.src_port = src_port;
+
+ pkt->hdr.dest_domain = GPR_DOMAIN_ID_ADSP;
+ pkt->hdr.src_domain = GPR_DOMAIN_ID_APPS;
+ pkt->hdr.token = token;
+ pkt->hdr.opcode = opcode;
+
+ if (has_cmd_hdr) {
+ p = p + GPR_HDR_SIZE;
+ cmd_header = p;
+ cmd_header->payload_size = payload_size;
+ }
+
+ return pkt;
+}
+
+void *audioreach_alloc_pkt(int payload_size, uint32_t opcode,
+ uint32_t token, uint32_t src_port,
+ uint32_t dest_port)
+{
+ return __audioreach_alloc_pkt(payload_size, opcode, token, src_port,
+ dest_port, false);
+}
+
+void *audioreach_alloc_apm_pkt(int pkt_size, uint32_t opcode,
+ uint32_t token, uint32_t src_port)
+{
+ return __audioreach_alloc_pkt(pkt_size, opcode, token, src_port,
+ APM_MODULE_INSTANCE_ID, false);
+}
+
+void *audioreach_alloc_cmd_pkt(int payload_size, uint32_t opcode,
+ uint32_t token, uint32_t src_port,
+ uint32_t dest_port)
+{
+ return __audioreach_alloc_pkt(payload_size, opcode, token, src_port,
+ dest_port, true);
+}
+
+void *audioreach_alloc_apm_cmd_pkt(int pkt_size, uint32_t opcode,
+ uint32_t token)
+{
+ return __audioreach_alloc_pkt(pkt_size, opcode, token,
+ GPR_APM_MODULE_IID,
+ APM_MODULE_INSTANCE_ID,
+ true);
+}
diff --git a/sound/soc/qcom/audioreach/audioreach.h b/sound/soc/qcom/audioreach/audioreach.h
new file mode 100644
index 000000000000..872e400dce6c
--- /dev/null
+++ b/sound/soc/qcom/audioreach/audioreach.h
@@ -0,0 +1,624 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __AUDIOREACH_H__
+#define __AUDIOREACH_H__
+#include <linux/types.h>
+#include <linux/soc/qcom/gpr.h>
+#include <sound/soc.h>
+
+/* Module IDs */
+#define MODULE_ID_WR_SHARED_MEM_EP 0x07001000
+#define MODULE_ID_RD_SHARED_MEM_EP 0x07001001
+#define MODULE_ID_GAIN 0x07001002
+#define MODULE_ID_PCM_CNV 0x07001003
+#define MODULE_ID_PCM_ENC 0x07001004
+#define MODULE_ID_PCM_DEC 0x07001005
+#define MODULE_ID_CODEC_DMA_SINK 0x07001023
+#define MODULE_ID_CODEC_DMA_SOURCE 0x07001024
+#define MODULE_ID_I2S_SINK 0x0700100A
+#define MODULE_ID_I2S_SOURCE 0x0700100b
+#define MODULE_ID_DATA_LOGGING 0x0700101A
+
+#define APM_CMD_GET_SPF_STATE 0x01001021
+#define APM_CMD_RSP_GET_SPF_STATE 0x02001007
+
+#define APM_MODULE_INSTANCE_ID 0x00000001
+#define PRM_MODULE_INSTANCE_ID 0x00000002
+#define AMDB_MODULE_INSTANCE_ID 0x00000003
+#define VCPM_MODULE_INSTANCE_ID 0x00000004
+
+#define APM_CMD_GRAPH_OPEN 0x01001000
+#define APM_CMD_GRAPH_PREPARE 0x01001001
+#define APM_CMD_GRAPH_START 0x01001002
+#define APM_CMD_GRAPH_STOP 0x01001003
+#define APM_CMD_GRAPH_CLOSE 0x01001004
+#define APM_CMD_GRAPH_FLUSH 0x01001005
+#define APM_CMD_SET_CFG 0x01001006
+#define APM_CMD_GET_CFG 0x01001007
+#define APM_CMD_SHARED_MEM_MAP_REGIONS 0x0100100c
+#define APM_CMD_SHARED_MEM_UNMAP_REGIONS 0x0100100d
+#define APM_CMD_RSP_SHARED_MEM_MAP_REGIONS 0x02001001
+#define APM_CMD_RSP_GET_CFG 0x02001000
+#define APM_CMD_CLOSE_ALL 0x01001013
+#define APM_CMD_REGISTER_SHARED_CFG 0x0100100A
+
+#define APM_MEMORY_MAP_SHMEM8_4K_POOL 3
+struct apm_cmd_shared_mem_map_regions {
+ uint16_t mem_pool_id;
+ uint16_t num_regions;
+ uint32_t property_flag;
+} __packed;
+
+struct apm_shared_map_region_payload {
+ uint32_t shm_addr_lsw;
+ uint32_t shm_addr_msw;
+ uint32_t mem_size_bytes;
+} __packed;
+
+struct apm_cmd_shared_mem_unmap_regions {
+ uint32_t mem_map_handle;
+} __packed;
+
+struct apm_cmd_rsp_shared_mem_map_regions {
+ uint32_t mem_map_handle;
+} __packed;
+
+/* APM module */
+#define APM_PARAM_ID_SUB_GRAPH_LIST 0x08001005
+
+#define APM_PARAM_ID_MODULE_LIST 0x08001002
+struct apm_param_id_modules_list {
+ uint32_t num_modules_list;
+} __packed;
+
+#define APM_PARAM_ID_MODULE_PROP 0x08001003
+struct apm_param_id_module_prop {
+ uint32_t num_modules_prop_cfg;
+} __packed;
+
+struct apm_module_prop_cfg {
+ uint32_t instance_id;
+ uint32_t num_props;
+} __packed;
+
+#define APM_PARAM_ID_MODULE_CONN 0x08001004
+struct apm_param_id_module_conn {
+ uint32_t num_connections;
+} __packed;
+
+struct apm_module_conn_obj {
+ uint32_t src_mod_inst_id;
+ uint32_t src_mod_op_port_id;
+ uint32_t dst_mod_inst_id;
+ uint32_t dst_mod_ip_port_id;
+} __packed;
+
+#define APM_PARAM_ID_GAIN 0x08001006
+struct param_id_gain_cfg {
+ uint16_t gain;
+ uint16_t reserved;
+};
+
+#define PARAM_ID_PCM_OUTPUT_FORMAT_CFG 0x08001008
+struct param_id_pcm_output_format_cfg {
+ uint32_t data_format;
+ uint32_t fmt_id;
+ uint32_t payload_size;
+} __packed;
+
+struct payload_pcm_output_format_cfg {
+ uint16_t bit_width;
+ uint16_t alignment;
+ uint16_t bits_per_sample;
+ uint16_t q_factor;
+ uint16_t endianness;
+ uint16_t interleaved;
+ uint16_t reserved;
+ uint16_t num_channels;
+ uint8_t channel_mapping[0];
+} __packed;
+
+#define PARAM_ID_ENC_BITRATE 0x08001052
+struct param_id_enc_bitrate_param {
+ uint32_t bitrate;
+} __packed;
+
+#define DATA_FORMAT_FIXED_POINT 1
+#define PCM_LSB_ALIGNED 1
+#define PCM_MSB_ALIGNED 2
+#define PCM_LITTLE_ENDIAN 1
+#define PCM_BIT_ENDIAN 2
+
+#define MEDIA_FMT_ID_PCM 0x09001000
+#define PCM_CHANNEL_L 1
+#define PCM_CHANNEL_R 2
+#define SAMPLE_RATE_48K 48000
+#define BIT_WIDTH_16 16
+
+#define APM_PARAM_ID_PROP_PORT_INFO 0x08001015
+struct apm_modules_prop_info {
+ uint32_t max_ip_port;
+ uint32_t max_op_port;
+} __packed;
+
+//Shared memory module
+#define DATA_CMD_WR_SH_MEM_EP_DATA_BUFFER 0x04001000
+#define WR_SH_MEM_EP_TIMESTAMP_VALID_FLAG BIT(31)
+#define WR_SH_MEM_EP_LAST_BUFFER_FLAG BIT(30)
+#define WR_SH_MEM_EP_TS_CONTINUE_FLAG BIT(29)
+#define WR_SH_MEM_EP_EOF_FLAG BIT(4)
+struct apm_data_cmd_wr_sh_mem_ep_data_buffer {
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t buf_size;
+ uint32_t timestamp_lsw;
+ uint32_t timestamp_msw;
+ uint32_t flags;
+} __packed;
+
+#define DATA_CMD_WR_SH_MEM_EP_DATA_BUFFER_V2 0x0400100A
+struct apm_data_cmd_wr_sh_mem_ep_data_buffer_v2 {
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t buf_size;
+ uint32_t timestamp_lsw;
+ uint32_t timestamp_msw;
+ uint32_t flags;
+ uint32_t md_addr_lsw;
+ uint32_t md_addr_msw;
+ uint32_t md_map_handle;
+ uint32_t md_buf_size;
+} __packed;
+
+#define DATA_CMD_RSP_WR_SH_MEM_EP_DATA_BUFFER_DONE 0x05001000
+struct data_cmd_rsp_wr_sh_mem_ep_data_buffer_done {
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t status;
+
+} __packed;
+
+#define DATA_CMD_RSP_WR_SH_MEM_EP_DATA_BUFFER_DONE_V2 0x05001004
+struct data_cmd_rsp_wr_sh_mem_ep_data_buffer_done_v2 {
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t status;
+ uint32_t md_buf_addr_lsw;
+ uint32_t md_buf_addr_msw;
+ uint32_t md_mem_map_handle;
+ uint32_t md_status;
+} __packed;
+
+#define PARAM_ID_MEDIA_FORMAT 0x0800100C
+#define DATA_CMD_WR_SH_MEM_EP_MEDIA_FORMAT 0x04001001
+struct apm_media_format {
+ uint32_t data_format;
+ uint32_t fmt_id;
+ uint32_t payload_size;
+} __packed;
+
+#define DATA_CMD_WR_SH_MEM_EP_EOS 0x04001002
+#define WR_SH_MEM_EP_EOS_POLICY_LAST 1
+#define WR_SH_MEM_EP_EOS_POLICY_EACH 2
+
+struct data_cmd_wr_sh_mem_ep_eos {
+ uint32_t policy;
+
+} __packed;
+
+#define DATA_CMD_RD_SH_MEM_EP_DATA_BUFFER 0x04001003
+struct data_cmd_rd_sh_mem_ep_data_buffer {
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t buf_size;
+};
+
+#define DATA_CMD_RSP_RD_SH_MEM_EP_DATA_BUFFER 0x05001002
+struct data_cmd_rsp_rd_sh_mem_ep_data_buffer_done {
+ uint32_t status;
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t data_size;
+ uint32_t offset;
+ uint32_t timestamp_lsw;
+ uint32_t timestamp_msw;
+ uint32_t flags;
+ uint32_t num_frames;
+};
+
+#define DATA_CMD_RD_SH_MEM_EP_DATA_BUFFER_V2 0x0400100B
+struct data_cmd_rd_sh_mem_ep_data_buffer_v2 {
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t buf_size;
+ uint32_t md_buf_addr_lsw;
+ uint32_t md_buf_addr_msw;
+ uint32_t md_mem_map_handle;
+ uint32_t md_buf_size;
+};
+
+#define DATA_CMD_RSP_RD_SH_MEM_EP_DATA_BUFFER_V2 0x05001005
+struct data_cmd_rsp_rd_sh_mem_ep_data_buffer_done_v2 {
+ uint32_t status;
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t data_size;
+ uint32_t offset;
+ uint32_t timestamp_lsw;
+ uint32_t timestamp_msw;
+ uint32_t flags;
+ uint32_t num_frames;
+ uint32_t md_status;
+ uint32_t md_buf_addr_lsw;
+ uint32_t md_buf_addr_msw;
+ uint32_t md_mem_map_handle;
+ uint32_t md_size;
+} __packed;
+
+#define PARAM_ID_RD_SH_MEM_CFG 0x08001007
+struct param_id_rd_sh_mem_cfg {
+ uint32_t num_frames_per_buffer;
+ uint32_t metadata_control_flags;
+
+} __packed;
+#define DATA_CMD_WR_SH_MEM_EP_EOS_RENDERED 0x05001001
+struct data_cmd_wr_sh_mem_ep_eos_rendered {
+ uint32_t module_instance_id;
+ uint32_t render_status;
+} __packed;
+
+#define MODULE_ID_WR_SHARED_MEM_EP 0x07001000
+
+struct apm_cmd_header {
+ uint32_t payload_address_lsw;
+ uint32_t payload_address_msw;
+ uint32_t mem_map_handle;
+ uint32_t payload_size;
+} __packed;
+
+#define APM_CMD_HDR_SIZE sizeof(struct apm_cmd_header)
+
+struct apm_module_param_data {
+ uint32_t module_instance_id;
+ uint32_t param_id;
+ uint32_t param_size;
+ uint32_t error_code;
+} __packed;
+
+#define APM_MODULE_PARAM_DATA_SIZE sizeof(struct apm_module_param_data)
+struct apm_module_param_shared_data {
+ uint32_t param_id;
+ uint32_t param_size;
+} __packed;
+
+struct apm_prop_data {
+ uint32_t prop_id;
+ uint32_t prop_size;
+} __packed;
+
+/* Sub-Graph Properties */
+#define APM_PARAM_ID_SUB_GRAPH_CONFIG 0x08001001
+
+struct apm_param_id_sub_graph_cfg {
+ uint32_t num_sub_graphs;
+} __packed;
+
+struct apm_sub_graph_cfg {
+ uint32_t sub_graph_id;
+ uint32_t num_sub_graph_prop;
+} __packed;
+
+#define APM_SUB_GRAPH_PROP_ID_PERF_MODE 0x0800100E
+
+struct apm_sg_prop_id_perf_mode {
+ uint32_t perf_mode;
+} __packed;
+
+#define APM_SG_PROP_ID_PERF_MODE_SIZE 4
+
+#define APM_SUB_GRAPH_PROP_ID_DIRECTION 0x0800100F
+
+struct apm_sg_prop_id_direction {
+ uint32_t direction;
+} __packed;
+
+#define APM_SG_PROP_ID_DIR_SIZE 4
+
+#define APM_SUB_GRAPH_PROP_ID_SCENARIO_ID 0x08001010
+#define APM_SUB_GRAPH_SID_AUDIO_PLAYBACK 0x1
+#define APM_SUB_GRAPH_SID_AUDIO_RECORD 0x2
+#define APM_SUB_GRAPH_SID_AUDIO_VOICE_CALL 0x3
+
+struct apm_sg_prop_id_scenario_id {
+ uint32_t scenario_id;
+} __packed;
+
+#define APM_SG_PROP_ID_SID_SIZE 4
+//container api
+#define APM_PARAM_ID_CONTAINER_CONFIG 0x08001000
+struct apm_param_id_container_cfg {
+ uint32_t num_containers;
+} __packed;
+
+struct apm_container_cfg {
+ uint32_t container_id;
+ uint32_t num_prop;
+} __packed;
+
+struct apm_cont_capablity {
+ uint32_t capability_id;
+} __packed;
+
+#define APM_CONTAINER_PROP_ID_CAPABILITY_LIST 0x08001011
+#define APM_CONTAINER_PROP_ID_CAPABILITY_SIZE 8
+
+#define APM_PROP_ID_INVALID 0x0
+#define APM_CONTAINER_CAP_ID_PP 0x1
+#define APM_CONTAINER_CAP_ID_PP 0x1
+
+struct apm_cont_prop_id_cap_list {
+ uint32_t num_capablity_id;
+} __packed;
+
+#define APM_CONTAINER_PROP_ID_GRAPH_POS 0x08001012
+
+struct apm_cont_prop_id_graph_pos {
+ uint32_t graph_pos;
+} __packed;
+
+#define APM_CONTAINER_PROP_ID_STACK_SIZE 0x08001013
+struct apm_cont_prop_id_stack_size {
+ uint32_t stack_size;
+} __packed;
+
+#define APM_CONTAINER_PROP_ID_PROC_DOMAIN 0x08001014
+struct apm_cont_prop_id_domain {
+ uint32_t proc_domain;
+} __packed;
+
+#define PARAM_ID_I2S_INTF_CFG 0x08001019
+struct param_id_i2s_intf_cfg {
+ uint32_t lpaif_type;
+ uint32_t intf_idx;
+ uint16_t sd_line_idx;
+ uint16_t ws_src;
+} __packed;
+
+#define I2S_INTF_TYPE_PRIMARY 0
+#define I2S_INTF_TYPE_SECOINDARY 1
+#define I2S_INTF_TYPE_TERTINARY 2
+#define I2S_INTF_TYPE_QUATERNARY 3
+#define I2S_INTF_TYPE_QUINARY 4
+#define I2S_SD0 1
+#define I2S_SD1 2
+#define I2S_SD2 3
+#define I2S_SD3 4
+
+#define PORT_ID_I2S_INPUT 2
+#define PORT_ID_I2S_OUPUT 1
+#define I2S_STACK_SIZE 2048
+
+#define PARAM_ID_HW_EP_MF_CFG 0x08001017
+struct param_id_hw_ep_mf {
+ uint32_t sample_rate;
+ uint16_t bit_width;
+ uint16_t num_channels;
+ uint32_t data_format;
+} __packed;
+
+#define PARAM_ID_HW_EP_FRAME_SIZE_FACTOR 0x08001018
+
+struct param_id_fram_size_factor {
+ uint32_t frame_size_factor;
+} __packed;
+
+#define APM_CONTAINER_PROP_ID_PARENT_CONTAINER_ID 0x080010CB
+struct apm_cont_prop_id_parent_container {
+ uint32_t parent_container_id;
+} __packed;
+
+#define APM_CONTAINER_PROP_ID_HEAP_ID 0x08001174
+#define APM_CONT_HEAP_DEFAULT 0x1
+#define APM_CONT_HEAP_LOW_POWER 0x2
+struct apm_cont_prop_id_headp_id {
+ uint32_t heap_id;
+} __packed;
+
+struct apm_modules_list {
+ uint32_t sub_graph_id;
+ uint32_t container_id;
+ uint32_t num_modules;
+} __packed;
+
+struct apm_module_obj {
+ uint32_t module_id;
+ uint32_t instance_id;
+} __packed;
+
+#define APM_MODULE_PROP_ID_PORT_INFO 0x08001015
+#define APM_MODULE_PROP_ID_PORT_INFO_SZ 8
+struct apm_module_prop_id_port_info {
+ uint32_t max_ip_port;
+ uint32_t max_op_port;
+} __packed;
+
+#define DATA_LOGGING_MAX_INPUT_PORTS 0x1
+#define DATA_LOGGING_MAX_OUTPUT_PORTS 0x1
+#define DATA_LOGGING_STACK_SIZE 2048
+#define PARAM_ID_DATA_LOGGING_CONFIG 0x08001031
+struct data_logging_config {
+ uint32_t log_code;
+ uint32_t log_tap_point_id;
+ uint32_t mode;
+} __packed;
+
+#define PARAM_ID_MFC_OUTPUT_MEDIA_FORMAT 0x08001024
+struct param_id_mfc_media_format {
+ uint32_t sample_rate;
+ uint16_t bit_width;
+ uint16_t num_channels;
+ uint16_t channel_mapping[0];
+} __packed;
+
+struct media_format {
+ uint32_t data_format;
+ uint32_t fmt_id;
+ uint32_t payload_size;
+} __packed;
+
+struct payload_media_fmt_pcm {
+ uint32_t sample_rate;
+ uint16_t bit_width;
+ uint16_t alignment;
+ uint16_t bits_per_sample;
+ uint16_t q_factor;
+ uint16_t endianness;
+ uint16_t num_channels;
+ uint8_t channel_mapping[0];
+} __packed;
+
+#define PARAM_ID_CODEC_DMA_INTF_CFG 0x08001063
+struct param_id_codec_dma_intf_cfg {
+ /* 1 - RXTX
+ * 2 - WSA
+ * 3 - VA
+ * 4 - AXI
+ */
+ uint32_t lpaif_type;
+ /*
+ * RX0 | TX0 = 1
+ * RX1 | TX1 = 2
+ * RX2 | TX2 = 3... so on
+ */
+ uint32_t intf_index;
+ uint32_t active_channels_mask;
+} __packed;
+
+struct audio_hw_clk_cfg {
+ uint32_t clock_id;
+ uint32_t clock_freq;
+ uint32_t clock_attri;
+ uint32_t clock_root;
+} __packed;
+
+#define PARAM_ID_HW_EP_POWER_MODE_CFG 0x8001176
+#define POWER_MODE_0 0 /* default */
+#define POWER_MODE_1 1 /* XO Shutdown allowed */
+#define POWER_MODE_2 2 /* XO Shutdown not allowed */
+struct param_id_hw_ep_power_mode_cfg {
+ uint32_t power_mode;
+} __packed;
+
+#define PARAM_ID_HW_EP_DMA_DATA_ALIGN 0x08001233
+#define DMA_DATA_ALIGN_MSB 0
+#define DMA_DATA_ALIGN_LSB 1
+
+#define PCM_MAX_NUM_CHANNEL 8
+struct param_id_hw_ep_dma_data_align {
+ uint32_t dma_data_align;
+} __packed;
+
+/* Graph */
+struct audioreach_connection {
+ /* Connections */
+ uint32_t src_mod_inst_id;
+ uint32_t src_mod_op_port_id;
+ uint32_t dst_mod_inst_id;
+ uint32_t dst_mod_ip_port_id;
+ struct list_head node;
+};
+
+struct audioreach_graph_info {
+ int id;
+ uint32_t num_sub_graphs;
+ struct list_head sg_list;
+ struct list_head connection_list;
+ spinlock_t sg_list_lock;
+};
+
+struct audioreach_sub_graph {
+ uint32_t sub_graph_id;
+ uint32_t perf_mode;
+ uint32_t direction;
+ uint32_t scenario_id;
+ struct list_head node;
+
+ struct audioreach_graph_info *info;
+ uint32_t num_containers;
+ struct list_head container_list;
+};
+
+struct audioreach_container {
+ uint32_t container_id;
+ uint32_t capability_id;
+ uint32_t graph_pos;
+ uint32_t stack_size;
+ uint32_t proc_domain;
+ struct list_head node;
+
+ uint32_t num_modules;
+ struct list_head modules_list;
+ struct audioreach_sub_graph *sub_graph;
+};
+
+struct audioreach_module {
+ uint32_t module_id;
+ uint32_t instance_id;
+
+ uint32_t max_ip_port;
+ uint32_t max_op_port;
+
+ uint32_t in_port;
+ uint32_t out_port;
+
+ /* Connections */
+ uint32_t src_mod_inst_id;
+ uint32_t src_mod_op_port_id;
+ uint32_t dst_mod_inst_id;
+ uint32_t dst_mod_ip_port_id;
+
+ /* Format specifics */
+ uint32_t ch_fmt;
+ uint32_t rate;
+ uint32_t bit_depth;
+
+ /* I2S module Specfic */
+ uint32_t hw_interface_idx;
+ uint32_t sd_line_idx;
+ uint32_t ws_src;
+ uint32_t frame_size_factor;
+ uint32_t data_format;
+ uint32_t hw_interface_type;
+
+ /* PCM module specific */
+ uint32_t interleave_type;
+
+ /* GAIN Module */
+ uint16_t gain;
+ /* Logging */
+ uint32_t log_code;
+ uint32_t log_tap_point_id;
+ uint32_t mode;
+ struct list_head node;
+ struct audioreach_container *container;
+ struct snd_soc_dapm_widget *widget;
+};
+
+/* Packet Allocation routines */
+void *audioreach_alloc_apm_cmd_pkt(int pkt_size, uint32_t opcode, uint32_t
+ token);
+void *audioreach_alloc_cmd_pkt(int pkt_size, uint32_t opcode, uint32_t token,
+ uint32_t src_port, uint32_t dest_port);
+void *audioreach_alloc_apm_pkt(int pkt_size, uint32_t opcode, uint32_t token,
+ uint32_t src_port);
+void *audioreach_alloc_pkt(int pkt_size, uint32_t opcode, uint32_t token,
+ uint32_t src_port, uint32_t dest_port);
+#endif /* __AUDIOREACH_H__ */
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* [RFC PATCH 04/13] ASoC: qcom: audioreach: add basic pkt alloc support
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
sound/soc/qcom/Kconfig | 7 +
sound/soc/qcom/Makefile | 1 +
sound/soc/qcom/audioreach/Makefile | 6 +
sound/soc/qcom/audioreach/audioreach.c | 279 +++++++++++
sound/soc/qcom/audioreach/audioreach.h | 624 +++++++++++++++++++++++++
5 files changed, 917 insertions(+)
create mode 100644 sound/soc/qcom/audioreach/Makefile
create mode 100644 sound/soc/qcom/audioreach/audioreach.c
create mode 100644 sound/soc/qcom/audioreach/audioreach.h
diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
index cc7c1de2f1d9..3070eccb6064 100644
--- a/sound/soc/qcom/Kconfig
+++ b/sound/soc/qcom/Kconfig
@@ -103,6 +103,13 @@ config SND_SOC_QDSP6
audio drivers. This includes q6asm, q6adm,
q6afe interfaces to DSP using apr.
+config SND_SOC_QCOM_AUDIOREACH
+ tristate "SoC ALSA audio drives for Qualcomm AUDIOREACH"
+ depends on QCOM_GPR
+ help
+ Support for AudioReach in QDSP
+
+
config SND_SOC_MSM8996
tristate "SoC Machine driver for MSM8996 and APQ8096 boards"
depends on QCOM_APR
diff --git a/sound/soc/qcom/Makefile b/sound/soc/qcom/Makefile
index 1600ae55bd34..bfa5d44f9592 100644
--- a/sound/soc/qcom/Makefile
+++ b/sound/soc/qcom/Makefile
@@ -33,3 +33,4 @@ obj-$(CONFIG_SND_SOC_QCOM_COMMON) += snd-soc-qcom-common.o
#DSP lib
obj-$(CONFIG_SND_SOC_QDSP6) += qdsp6/
+obj-${CONFIG_SND_SOC_QCOM_AUDIOREACH} += audioreach/
diff --git a/sound/soc/qcom/audioreach/Makefile b/sound/soc/qcom/audioreach/Makefile
new file mode 100644
index 000000000000..575edbed29a2
--- /dev/null
+++ b/sound/soc/qcom/audioreach/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0-only
+snd-ar-objs := audioreach.o
+
+obj-$(CONFIG_SND_SOC_QCOM_AUDIOREACH) += snd-ar.o
+
+
diff --git a/sound/soc/qcom/audioreach/audioreach.c b/sound/soc/qcom/audioreach/audioreach.c
new file mode 100644
index 000000000000..617163473b1c
--- /dev/null
+++ b/sound/soc/qcom/audioreach/audioreach.c
@@ -0,0 +1,279 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2020, Linaro Limited
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/soc/qcom/gpr.h>
+#include <dt-bindings/soc/qcom,gpr.h>
+#include "audioreach.h"
+
+/* SubGraph Config */
+struct apm_sub_graph_data {
+ //Subgraph Config
+ struct apm_sub_graph_cfg sub_graph_cfg;
+
+ //sub graph perf mode
+ struct apm_prop_data perf_data;
+ struct apm_sg_prop_id_perf_mode perf;
+
+ // direction
+ struct apm_prop_data dir_data;
+ struct apm_sg_prop_id_direction dir;
+
+ // sid
+ struct apm_prop_data sid_data;
+ struct apm_sg_prop_id_scenario_id sid;
+
+} __packed;
+
+#define APM_SUB_GRAPH_CFG_NPROP 3
+
+struct apm_sub_graph_params {
+ struct apm_module_param_data param_data;
+ uint32_t num_sub_graphs;
+ struct apm_sub_graph_data sg_cfg[0];
+} __packed;
+
+#define APM_SUB_GRAPH_PSIZE(n) ALIGN(sizeof(struct apm_sub_graph_params) + \
+ n * sizeof(struct apm_sub_graph_data), 8)
+/* container config */
+struct apm_container_obj {
+ struct apm_container_cfg container_cfg;
+ /* Capablity ID list */
+ struct apm_prop_data cap_data;
+ uint32_t num_capablity_id;
+ uint32_t capability_id;
+
+ /* Container graph Position */
+ struct apm_prop_data pos_data;
+ struct apm_cont_prop_id_graph_pos pos;
+
+ /* Container Stack size */
+ struct apm_prop_data stack_data;
+ struct apm_cont_prop_id_stack_size stack;
+
+ /* Container proc domain id */
+ struct apm_prop_data domain_data;
+ struct apm_cont_prop_id_domain domain;
+} __packed;
+
+struct apm_container_params {
+ struct apm_module_param_data param_data;
+ uint32_t num_containers;
+ struct apm_container_obj cont_obj[0];
+} __packed;
+
+#define APM_CONTAINER_PSIZE(n) ALIGN(sizeof(struct apm_container_params) + \
+ n * sizeof(struct apm_container_obj), 8)
+
+/* Module List config */
+struct apm_mod_list_obj {
+ /* Modules list cfg */
+ uint32_t sub_graph_id;
+ uint32_t container_id;
+ uint32_t num_modules;
+ struct apm_module_obj mod_cfg[0];
+} __packed;
+
+struct apm_module_list_params {
+ struct apm_module_param_data param_data;
+ uint32_t num_modules_list;
+ /* Module list config array */
+ struct apm_mod_list_obj mod_list_obj[0];
+
+} __packed;
+
+#define APM_MOD_LIST_OBJ_PSIZE(m) (sizeof(struct apm_mod_list_obj) + \
+ m * sizeof(struct apm_module_obj))
+
+/* n modules list m mod per list */
+#define APM_MOD_LIST_PSIZE(n, m) ALIGN(sizeof(struct apm_module_list_params) + \
+ n * (sizeof(struct apm_mod_list_obj) + \
+ m * sizeof(struct apm_module_obj)), 8)
+
+/* Module Properties */
+struct apm_mod_prop_obj {
+ u32 instance_id;
+ u32 num_props;
+ struct apm_prop_data prop_data_1;
+ struct apm_module_prop_id_port_info prop_id_port;
+} __packed;
+
+struct apm_prop_list_params {
+ struct apm_module_param_data param_data;
+ u32 num_modules_prop_cfg;
+ struct apm_mod_prop_obj mod_prop_obj[0];
+
+} __packed;
+
+#define APM_MOD_PROP_PSIZE(n) ALIGN(sizeof(struct apm_prop_list_params) + \
+ n * sizeof(struct apm_mod_prop_obj), 8)
+
+/* Module Connections */
+struct apm_mod_conn_list_params {
+ struct apm_module_param_data param_data;
+ u32 num_connections;
+ struct apm_module_conn_obj conn_obj[0];
+
+} __packed;
+
+#define APM_MOD_CONN_PSIZE(n) ALIGN(sizeof(struct apm_mod_conn_list_params) + \
+ n * sizeof(struct apm_module_conn_obj), 8)
+
+struct apm_graph_open_params {
+ struct apm_cmd_header *cmd_header;
+ struct apm_sub_graph_params *sg_data;
+ struct apm_container_params *cont_data;
+ struct apm_module_list_params *mod_list_data;
+ struct apm_prop_list_params *mod_prop_data;
+ struct apm_mod_conn_list_params *mod_conn_list_data;
+} __packed;
+
+struct apm_pcm_module_media_fmt_cmd {
+ struct apm_module_param_data param_data;
+ struct param_id_pcm_output_format_cfg header;
+ struct payload_pcm_output_format_cfg media_cfg;
+} __packed;
+
+struct apm_rd_shmem_module_config_cmd {
+ struct apm_module_param_data param_data;
+ struct param_id_rd_sh_mem_cfg cfg;
+} __packed;
+
+struct apm_sh_module_media_fmt_cmd {
+ struct media_format header;
+ struct payload_media_fmt_pcm cfg;
+} __packed;
+
+#define APM_SHMEM_FMT_CFG_PSIZE(n) ALIGN( \
+ sizeof(struct apm_sh_module_media_fmt_cmd) + \
+ n * sizeof(uint8_t), 8)
+
+/* num of channels as argument */
+#define APM_PCM_MODULE_FMT_CMD_PSIZE(n) ALIGN( \
+ sizeof(struct apm_pcm_module_media_fmt_cmd) + \
+ n * sizeof(uint8_t), 8)
+#define APM_PCM_OUT_FMT_CFG_PSIZE(n) ALIGN((sizeof( \
+ struct payload_pcm_output_format_cfg) + \
+ n * sizeof(uint8_t)), 4)
+
+struct apm_i2s_module_intf_cfg {
+ struct apm_module_param_data param_data;
+ struct param_id_i2s_intf_cfg cfg;
+} __packed;
+#define APM_I2S_INTF_CFG_PSIZE ALIGN(sizeof(struct apm_i2s_module_intf_cfg), \
+ 8)
+
+struct apm_module_hw_ep_mf_cfg {
+ struct apm_module_param_data param_data;
+ struct param_id_hw_ep_mf mf;
+} __packed;
+#define APM_HW_EP_CFG_PSIZE ALIGN( \
+ sizeof(struct apm_module_hw_ep_mf_cfg), \
+ 8)
+
+struct apm_module_frame_size_factor_cfg {
+ struct apm_module_param_data param_data;
+ uint32_t frame_size_factor;
+} __packed;
+#define APM_FS_CFG_PSIZE ALIGN( \
+ sizeof(struct apm_module_frame_size_factor_cfg), \
+ 8)
+
+struct apm_module_hw_ep_power_mode_cfg {
+ struct apm_module_param_data param_data;
+ struct param_id_hw_ep_power_mode_cfg power_mode;
+} __packed;
+#define APM_HW_EP_PMODE_CFG_PSIZE ALIGN( \
+ sizeof(struct apm_module_hw_ep_power_mode_cfg), \
+ 8)
+
+struct apm_module_hw_ep_dma_data_align_cfg {
+ struct apm_module_param_data param_data;
+ struct param_id_hw_ep_dma_data_align align;
+} __packed;
+#define APM_HW_EP_DALIGN_CFG_PSIZE ALIGN( \
+ sizeof(struct apm_module_hw_ep_dma_data_align_cfg), \
+ 8)
+
+struct apm_gain_module_cfg {
+ struct apm_module_param_data param_data;
+ struct param_id_gain_cfg gain_cfg;
+} __packed;
+#define APM_GAIN_CFG_PSIZE ALIGN(sizeof(struct apm_gain_module_cfg), 8)
+
+struct apm_codec_dma_module_intf_cfg {
+ struct apm_module_param_data param_data;
+ struct param_id_codec_dma_intf_cfg cfg;
+} __packed;
+#define APM_CDMA_INTF_CFG_PSIZE ALIGN( \
+ sizeof(struct apm_codec_dma_module_intf_cfg), 8)
+
+static void *__audioreach_alloc_pkt(int payload_size, uint32_t opcode,
+ uint32_t token, uint32_t src_port,
+ uint32_t dest_port, bool has_cmd_hdr)
+{
+ struct apm_cmd_header *cmd_header;
+ struct gpr_pkt *pkt;
+ void *p;
+ int pkt_size = GPR_HDR_SIZE + payload_size;
+
+ if (has_cmd_hdr)
+ pkt_size += APM_CMD_HDR_SIZE;
+
+ p = kzalloc(pkt_size, GFP_KERNEL);
+ if (!p)
+ return ERR_PTR(-ENOMEM);
+
+ pkt = p;
+ pkt->hdr.version = GPR_PKT_VER;
+ pkt->hdr.hdr_size = 6;////GPR_PKT_HEADER_WORD_SIZE;
+ pkt->hdr.pkt_size = pkt_size;
+ pkt->hdr.dest_port = dest_port;
+ pkt->hdr.src_port = src_port;
+
+ pkt->hdr.dest_domain = GPR_DOMAIN_ID_ADSP;
+ pkt->hdr.src_domain = GPR_DOMAIN_ID_APPS;
+ pkt->hdr.token = token;
+ pkt->hdr.opcode = opcode;
+
+ if (has_cmd_hdr) {
+ p = p + GPR_HDR_SIZE;
+ cmd_header = p;
+ cmd_header->payload_size = payload_size;
+ }
+
+ return pkt;
+}
+
+void *audioreach_alloc_pkt(int payload_size, uint32_t opcode,
+ uint32_t token, uint32_t src_port,
+ uint32_t dest_port)
+{
+ return __audioreach_alloc_pkt(payload_size, opcode, token, src_port,
+ dest_port, false);
+}
+
+void *audioreach_alloc_apm_pkt(int pkt_size, uint32_t opcode,
+ uint32_t token, uint32_t src_port)
+{
+ return __audioreach_alloc_pkt(pkt_size, opcode, token, src_port,
+ APM_MODULE_INSTANCE_ID, false);
+}
+
+void *audioreach_alloc_cmd_pkt(int payload_size, uint32_t opcode,
+ uint32_t token, uint32_t src_port,
+ uint32_t dest_port)
+{
+ return __audioreach_alloc_pkt(payload_size, opcode, token, src_port,
+ dest_port, true);
+}
+
+void *audioreach_alloc_apm_cmd_pkt(int pkt_size, uint32_t opcode,
+ uint32_t token)
+{
+ return __audioreach_alloc_pkt(pkt_size, opcode, token,
+ GPR_APM_MODULE_IID,
+ APM_MODULE_INSTANCE_ID,
+ true);
+}
diff --git a/sound/soc/qcom/audioreach/audioreach.h b/sound/soc/qcom/audioreach/audioreach.h
new file mode 100644
index 000000000000..872e400dce6c
--- /dev/null
+++ b/sound/soc/qcom/audioreach/audioreach.h
@@ -0,0 +1,624 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __AUDIOREACH_H__
+#define __AUDIOREACH_H__
+#include <linux/types.h>
+#include <linux/soc/qcom/gpr.h>
+#include <sound/soc.h>
+
+/* Module IDs */
+#define MODULE_ID_WR_SHARED_MEM_EP 0x07001000
+#define MODULE_ID_RD_SHARED_MEM_EP 0x07001001
+#define MODULE_ID_GAIN 0x07001002
+#define MODULE_ID_PCM_CNV 0x07001003
+#define MODULE_ID_PCM_ENC 0x07001004
+#define MODULE_ID_PCM_DEC 0x07001005
+#define MODULE_ID_CODEC_DMA_SINK 0x07001023
+#define MODULE_ID_CODEC_DMA_SOURCE 0x07001024
+#define MODULE_ID_I2S_SINK 0x0700100A
+#define MODULE_ID_I2S_SOURCE 0x0700100b
+#define MODULE_ID_DATA_LOGGING 0x0700101A
+
+#define APM_CMD_GET_SPF_STATE 0x01001021
+#define APM_CMD_RSP_GET_SPF_STATE 0x02001007
+
+#define APM_MODULE_INSTANCE_ID 0x00000001
+#define PRM_MODULE_INSTANCE_ID 0x00000002
+#define AMDB_MODULE_INSTANCE_ID 0x00000003
+#define VCPM_MODULE_INSTANCE_ID 0x00000004
+
+#define APM_CMD_GRAPH_OPEN 0x01001000
+#define APM_CMD_GRAPH_PREPARE 0x01001001
+#define APM_CMD_GRAPH_START 0x01001002
+#define APM_CMD_GRAPH_STOP 0x01001003
+#define APM_CMD_GRAPH_CLOSE 0x01001004
+#define APM_CMD_GRAPH_FLUSH 0x01001005
+#define APM_CMD_SET_CFG 0x01001006
+#define APM_CMD_GET_CFG 0x01001007
+#define APM_CMD_SHARED_MEM_MAP_REGIONS 0x0100100c
+#define APM_CMD_SHARED_MEM_UNMAP_REGIONS 0x0100100d
+#define APM_CMD_RSP_SHARED_MEM_MAP_REGIONS 0x02001001
+#define APM_CMD_RSP_GET_CFG 0x02001000
+#define APM_CMD_CLOSE_ALL 0x01001013
+#define APM_CMD_REGISTER_SHARED_CFG 0x0100100A
+
+#define APM_MEMORY_MAP_SHMEM8_4K_POOL 3
+struct apm_cmd_shared_mem_map_regions {
+ uint16_t mem_pool_id;
+ uint16_t num_regions;
+ uint32_t property_flag;
+} __packed;
+
+struct apm_shared_map_region_payload {
+ uint32_t shm_addr_lsw;
+ uint32_t shm_addr_msw;
+ uint32_t mem_size_bytes;
+} __packed;
+
+struct apm_cmd_shared_mem_unmap_regions {
+ uint32_t mem_map_handle;
+} __packed;
+
+struct apm_cmd_rsp_shared_mem_map_regions {
+ uint32_t mem_map_handle;
+} __packed;
+
+/* APM module */
+#define APM_PARAM_ID_SUB_GRAPH_LIST 0x08001005
+
+#define APM_PARAM_ID_MODULE_LIST 0x08001002
+struct apm_param_id_modules_list {
+ uint32_t num_modules_list;
+} __packed;
+
+#define APM_PARAM_ID_MODULE_PROP 0x08001003
+struct apm_param_id_module_prop {
+ uint32_t num_modules_prop_cfg;
+} __packed;
+
+struct apm_module_prop_cfg {
+ uint32_t instance_id;
+ uint32_t num_props;
+} __packed;
+
+#define APM_PARAM_ID_MODULE_CONN 0x08001004
+struct apm_param_id_module_conn {
+ uint32_t num_connections;
+} __packed;
+
+struct apm_module_conn_obj {
+ uint32_t src_mod_inst_id;
+ uint32_t src_mod_op_port_id;
+ uint32_t dst_mod_inst_id;
+ uint32_t dst_mod_ip_port_id;
+} __packed;
+
+#define APM_PARAM_ID_GAIN 0x08001006
+struct param_id_gain_cfg {
+ uint16_t gain;
+ uint16_t reserved;
+};
+
+#define PARAM_ID_PCM_OUTPUT_FORMAT_CFG 0x08001008
+struct param_id_pcm_output_format_cfg {
+ uint32_t data_format;
+ uint32_t fmt_id;
+ uint32_t payload_size;
+} __packed;
+
+struct payload_pcm_output_format_cfg {
+ uint16_t bit_width;
+ uint16_t alignment;
+ uint16_t bits_per_sample;
+ uint16_t q_factor;
+ uint16_t endianness;
+ uint16_t interleaved;
+ uint16_t reserved;
+ uint16_t num_channels;
+ uint8_t channel_mapping[0];
+} __packed;
+
+#define PARAM_ID_ENC_BITRATE 0x08001052
+struct param_id_enc_bitrate_param {
+ uint32_t bitrate;
+} __packed;
+
+#define DATA_FORMAT_FIXED_POINT 1
+#define PCM_LSB_ALIGNED 1
+#define PCM_MSB_ALIGNED 2
+#define PCM_LITTLE_ENDIAN 1
+#define PCM_BIT_ENDIAN 2
+
+#define MEDIA_FMT_ID_PCM 0x09001000
+#define PCM_CHANNEL_L 1
+#define PCM_CHANNEL_R 2
+#define SAMPLE_RATE_48K 48000
+#define BIT_WIDTH_16 16
+
+#define APM_PARAM_ID_PROP_PORT_INFO 0x08001015
+struct apm_modules_prop_info {
+ uint32_t max_ip_port;
+ uint32_t max_op_port;
+} __packed;
+
+//Shared memory module
+#define DATA_CMD_WR_SH_MEM_EP_DATA_BUFFER 0x04001000
+#define WR_SH_MEM_EP_TIMESTAMP_VALID_FLAG BIT(31)
+#define WR_SH_MEM_EP_LAST_BUFFER_FLAG BIT(30)
+#define WR_SH_MEM_EP_TS_CONTINUE_FLAG BIT(29)
+#define WR_SH_MEM_EP_EOF_FLAG BIT(4)
+struct apm_data_cmd_wr_sh_mem_ep_data_buffer {
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t buf_size;
+ uint32_t timestamp_lsw;
+ uint32_t timestamp_msw;
+ uint32_t flags;
+} __packed;
+
+#define DATA_CMD_WR_SH_MEM_EP_DATA_BUFFER_V2 0x0400100A
+struct apm_data_cmd_wr_sh_mem_ep_data_buffer_v2 {
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t buf_size;
+ uint32_t timestamp_lsw;
+ uint32_t timestamp_msw;
+ uint32_t flags;
+ uint32_t md_addr_lsw;
+ uint32_t md_addr_msw;
+ uint32_t md_map_handle;
+ uint32_t md_buf_size;
+} __packed;
+
+#define DATA_CMD_RSP_WR_SH_MEM_EP_DATA_BUFFER_DONE 0x05001000
+struct data_cmd_rsp_wr_sh_mem_ep_data_buffer_done {
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t status;
+
+} __packed;
+
+#define DATA_CMD_RSP_WR_SH_MEM_EP_DATA_BUFFER_DONE_V2 0x05001004
+struct data_cmd_rsp_wr_sh_mem_ep_data_buffer_done_v2 {
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t status;
+ uint32_t md_buf_addr_lsw;
+ uint32_t md_buf_addr_msw;
+ uint32_t md_mem_map_handle;
+ uint32_t md_status;
+} __packed;
+
+#define PARAM_ID_MEDIA_FORMAT 0x0800100C
+#define DATA_CMD_WR_SH_MEM_EP_MEDIA_FORMAT 0x04001001
+struct apm_media_format {
+ uint32_t data_format;
+ uint32_t fmt_id;
+ uint32_t payload_size;
+} __packed;
+
+#define DATA_CMD_WR_SH_MEM_EP_EOS 0x04001002
+#define WR_SH_MEM_EP_EOS_POLICY_LAST 1
+#define WR_SH_MEM_EP_EOS_POLICY_EACH 2
+
+struct data_cmd_wr_sh_mem_ep_eos {
+ uint32_t policy;
+
+} __packed;
+
+#define DATA_CMD_RD_SH_MEM_EP_DATA_BUFFER 0x04001003
+struct data_cmd_rd_sh_mem_ep_data_buffer {
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t buf_size;
+};
+
+#define DATA_CMD_RSP_RD_SH_MEM_EP_DATA_BUFFER 0x05001002
+struct data_cmd_rsp_rd_sh_mem_ep_data_buffer_done {
+ uint32_t status;
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t data_size;
+ uint32_t offset;
+ uint32_t timestamp_lsw;
+ uint32_t timestamp_msw;
+ uint32_t flags;
+ uint32_t num_frames;
+};
+
+#define DATA_CMD_RD_SH_MEM_EP_DATA_BUFFER_V2 0x0400100B
+struct data_cmd_rd_sh_mem_ep_data_buffer_v2 {
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t buf_size;
+ uint32_t md_buf_addr_lsw;
+ uint32_t md_buf_addr_msw;
+ uint32_t md_mem_map_handle;
+ uint32_t md_buf_size;
+};
+
+#define DATA_CMD_RSP_RD_SH_MEM_EP_DATA_BUFFER_V2 0x05001005
+struct data_cmd_rsp_rd_sh_mem_ep_data_buffer_done_v2 {
+ uint32_t status;
+ uint32_t buf_addr_lsw;
+ uint32_t buf_addr_msw;
+ uint32_t mem_map_handle;
+ uint32_t data_size;
+ uint32_t offset;
+ uint32_t timestamp_lsw;
+ uint32_t timestamp_msw;
+ uint32_t flags;
+ uint32_t num_frames;
+ uint32_t md_status;
+ uint32_t md_buf_addr_lsw;
+ uint32_t md_buf_addr_msw;
+ uint32_t md_mem_map_handle;
+ uint32_t md_size;
+} __packed;
+
+#define PARAM_ID_RD_SH_MEM_CFG 0x08001007
+struct param_id_rd_sh_mem_cfg {
+ uint32_t num_frames_per_buffer;
+ uint32_t metadata_control_flags;
+
+} __packed;
+#define DATA_CMD_WR_SH_MEM_EP_EOS_RENDERED 0x05001001
+struct data_cmd_wr_sh_mem_ep_eos_rendered {
+ uint32_t module_instance_id;
+ uint32_t render_status;
+} __packed;
+
+#define MODULE_ID_WR_SHARED_MEM_EP 0x07001000
+
+struct apm_cmd_header {
+ uint32_t payload_address_lsw;
+ uint32_t payload_address_msw;
+ uint32_t mem_map_handle;
+ uint32_t payload_size;
+} __packed;
+
+#define APM_CMD_HDR_SIZE sizeof(struct apm_cmd_header)
+
+struct apm_module_param_data {
+ uint32_t module_instance_id;
+ uint32_t param_id;
+ uint32_t param_size;
+ uint32_t error_code;
+} __packed;
+
+#define APM_MODULE_PARAM_DATA_SIZE sizeof(struct apm_module_param_data)
+struct apm_module_param_shared_data {
+ uint32_t param_id;
+ uint32_t param_size;
+} __packed;
+
+struct apm_prop_data {
+ uint32_t prop_id;
+ uint32_t prop_size;
+} __packed;
+
+/* Sub-Graph Properties */
+#define APM_PARAM_ID_SUB_GRAPH_CONFIG 0x08001001
+
+struct apm_param_id_sub_graph_cfg {
+ uint32_t num_sub_graphs;
+} __packed;
+
+struct apm_sub_graph_cfg {
+ uint32_t sub_graph_id;
+ uint32_t num_sub_graph_prop;
+} __packed;
+
+#define APM_SUB_GRAPH_PROP_ID_PERF_MODE 0x0800100E
+
+struct apm_sg_prop_id_perf_mode {
+ uint32_t perf_mode;
+} __packed;
+
+#define APM_SG_PROP_ID_PERF_MODE_SIZE 4
+
+#define APM_SUB_GRAPH_PROP_ID_DIRECTION 0x0800100F
+
+struct apm_sg_prop_id_direction {
+ uint32_t direction;
+} __packed;
+
+#define APM_SG_PROP_ID_DIR_SIZE 4
+
+#define APM_SUB_GRAPH_PROP_ID_SCENARIO_ID 0x08001010
+#define APM_SUB_GRAPH_SID_AUDIO_PLAYBACK 0x1
+#define APM_SUB_GRAPH_SID_AUDIO_RECORD 0x2
+#define APM_SUB_GRAPH_SID_AUDIO_VOICE_CALL 0x3
+
+struct apm_sg_prop_id_scenario_id {
+ uint32_t scenario_id;
+} __packed;
+
+#define APM_SG_PROP_ID_SID_SIZE 4
+//container api
+#define APM_PARAM_ID_CONTAINER_CONFIG 0x08001000
+struct apm_param_id_container_cfg {
+ uint32_t num_containers;
+} __packed;
+
+struct apm_container_cfg {
+ uint32_t container_id;
+ uint32_t num_prop;
+} __packed;
+
+struct apm_cont_capablity {
+ uint32_t capability_id;
+} __packed;
+
+#define APM_CONTAINER_PROP_ID_CAPABILITY_LIST 0x08001011
+#define APM_CONTAINER_PROP_ID_CAPABILITY_SIZE 8
+
+#define APM_PROP_ID_INVALID 0x0
+#define APM_CONTAINER_CAP_ID_PP 0x1
+#define APM_CONTAINER_CAP_ID_PP 0x1
+
+struct apm_cont_prop_id_cap_list {
+ uint32_t num_capablity_id;
+} __packed;
+
+#define APM_CONTAINER_PROP_ID_GRAPH_POS 0x08001012
+
+struct apm_cont_prop_id_graph_pos {
+ uint32_t graph_pos;
+} __packed;
+
+#define APM_CONTAINER_PROP_ID_STACK_SIZE 0x08001013
+struct apm_cont_prop_id_stack_size {
+ uint32_t stack_size;
+} __packed;
+
+#define APM_CONTAINER_PROP_ID_PROC_DOMAIN 0x08001014
+struct apm_cont_prop_id_domain {
+ uint32_t proc_domain;
+} __packed;
+
+#define PARAM_ID_I2S_INTF_CFG 0x08001019
+struct param_id_i2s_intf_cfg {
+ uint32_t lpaif_type;
+ uint32_t intf_idx;
+ uint16_t sd_line_idx;
+ uint16_t ws_src;
+} __packed;
+
+#define I2S_INTF_TYPE_PRIMARY 0
+#define I2S_INTF_TYPE_SECOINDARY 1
+#define I2S_INTF_TYPE_TERTINARY 2
+#define I2S_INTF_TYPE_QUATERNARY 3
+#define I2S_INTF_TYPE_QUINARY 4
+#define I2S_SD0 1
+#define I2S_SD1 2
+#define I2S_SD2 3
+#define I2S_SD3 4
+
+#define PORT_ID_I2S_INPUT 2
+#define PORT_ID_I2S_OUPUT 1
+#define I2S_STACK_SIZE 2048
+
+#define PARAM_ID_HW_EP_MF_CFG 0x08001017
+struct param_id_hw_ep_mf {
+ uint32_t sample_rate;
+ uint16_t bit_width;
+ uint16_t num_channels;
+ uint32_t data_format;
+} __packed;
+
+#define PARAM_ID_HW_EP_FRAME_SIZE_FACTOR 0x08001018
+
+struct param_id_fram_size_factor {
+ uint32_t frame_size_factor;
+} __packed;
+
+#define APM_CONTAINER_PROP_ID_PARENT_CONTAINER_ID 0x080010CB
+struct apm_cont_prop_id_parent_container {
+ uint32_t parent_container_id;
+} __packed;
+
+#define APM_CONTAINER_PROP_ID_HEAP_ID 0x08001174
+#define APM_CONT_HEAP_DEFAULT 0x1
+#define APM_CONT_HEAP_LOW_POWER 0x2
+struct apm_cont_prop_id_headp_id {
+ uint32_t heap_id;
+} __packed;
+
+struct apm_modules_list {
+ uint32_t sub_graph_id;
+ uint32_t container_id;
+ uint32_t num_modules;
+} __packed;
+
+struct apm_module_obj {
+ uint32_t module_id;
+ uint32_t instance_id;
+} __packed;
+
+#define APM_MODULE_PROP_ID_PORT_INFO 0x08001015
+#define APM_MODULE_PROP_ID_PORT_INFO_SZ 8
+struct apm_module_prop_id_port_info {
+ uint32_t max_ip_port;
+ uint32_t max_op_port;
+} __packed;
+
+#define DATA_LOGGING_MAX_INPUT_PORTS 0x1
+#define DATA_LOGGING_MAX_OUTPUT_PORTS 0x1
+#define DATA_LOGGING_STACK_SIZE 2048
+#define PARAM_ID_DATA_LOGGING_CONFIG 0x08001031
+struct data_logging_config {
+ uint32_t log_code;
+ uint32_t log_tap_point_id;
+ uint32_t mode;
+} __packed;
+
+#define PARAM_ID_MFC_OUTPUT_MEDIA_FORMAT 0x08001024
+struct param_id_mfc_media_format {
+ uint32_t sample_rate;
+ uint16_t bit_width;
+ uint16_t num_channels;
+ uint16_t channel_mapping[0];
+} __packed;
+
+struct media_format {
+ uint32_t data_format;
+ uint32_t fmt_id;
+ uint32_t payload_size;
+} __packed;
+
+struct payload_media_fmt_pcm {
+ uint32_t sample_rate;
+ uint16_t bit_width;
+ uint16_t alignment;
+ uint16_t bits_per_sample;
+ uint16_t q_factor;
+ uint16_t endianness;
+ uint16_t num_channels;
+ uint8_t channel_mapping[0];
+} __packed;
+
+#define PARAM_ID_CODEC_DMA_INTF_CFG 0x08001063
+struct param_id_codec_dma_intf_cfg {
+ /* 1 - RXTX
+ * 2 - WSA
+ * 3 - VA
+ * 4 - AXI
+ */
+ uint32_t lpaif_type;
+ /*
+ * RX0 | TX0 = 1
+ * RX1 | TX1 = 2
+ * RX2 | TX2 = 3... so on
+ */
+ uint32_t intf_index;
+ uint32_t active_channels_mask;
+} __packed;
+
+struct audio_hw_clk_cfg {
+ uint32_t clock_id;
+ uint32_t clock_freq;
+ uint32_t clock_attri;
+ uint32_t clock_root;
+} __packed;
+
+#define PARAM_ID_HW_EP_POWER_MODE_CFG 0x8001176
+#define POWER_MODE_0 0 /* default */
+#define POWER_MODE_1 1 /* XO Shutdown allowed */
+#define POWER_MODE_2 2 /* XO Shutdown not allowed */
+struct param_id_hw_ep_power_mode_cfg {
+ uint32_t power_mode;
+} __packed;
+
+#define PARAM_ID_HW_EP_DMA_DATA_ALIGN 0x08001233
+#define DMA_DATA_ALIGN_MSB 0
+#define DMA_DATA_ALIGN_LSB 1
+
+#define PCM_MAX_NUM_CHANNEL 8
+struct param_id_hw_ep_dma_data_align {
+ uint32_t dma_data_align;
+} __packed;
+
+/* Graph */
+struct audioreach_connection {
+ /* Connections */
+ uint32_t src_mod_inst_id;
+ uint32_t src_mod_op_port_id;
+ uint32_t dst_mod_inst_id;
+ uint32_t dst_mod_ip_port_id;
+ struct list_head node;
+};
+
+struct audioreach_graph_info {
+ int id;
+ uint32_t num_sub_graphs;
+ struct list_head sg_list;
+ struct list_head connection_list;
+ spinlock_t sg_list_lock;
+};
+
+struct audioreach_sub_graph {
+ uint32_t sub_graph_id;
+ uint32_t perf_mode;
+ uint32_t direction;
+ uint32_t scenario_id;
+ struct list_head node;
+
+ struct audioreach_graph_info *info;
+ uint32_t num_containers;
+ struct list_head container_list;
+};
+
+struct audioreach_container {
+ uint32_t container_id;
+ uint32_t capability_id;
+ uint32_t graph_pos;
+ uint32_t stack_size;
+ uint32_t proc_domain;
+ struct list_head node;
+
+ uint32_t num_modules;
+ struct list_head modules_list;
+ struct audioreach_sub_graph *sub_graph;
+};
+
+struct audioreach_module {
+ uint32_t module_id;
+ uint32_t instance_id;
+
+ uint32_t max_ip_port;
+ uint32_t max_op_port;
+
+ uint32_t in_port;
+ uint32_t out_port;
+
+ /* Connections */
+ uint32_t src_mod_inst_id;
+ uint32_t src_mod_op_port_id;
+ uint32_t dst_mod_inst_id;
+ uint32_t dst_mod_ip_port_id;
+
+ /* Format specifics */
+ uint32_t ch_fmt;
+ uint32_t rate;
+ uint32_t bit_depth;
+
+ /* I2S module Specfic */
+ uint32_t hw_interface_idx;
+ uint32_t sd_line_idx;
+ uint32_t ws_src;
+ uint32_t frame_size_factor;
+ uint32_t data_format;
+ uint32_t hw_interface_type;
+
+ /* PCM module specific */
+ uint32_t interleave_type;
+
+ /* GAIN Module */
+ uint16_t gain;
+ /* Logging */
+ uint32_t log_code;
+ uint32_t log_tap_point_id;
+ uint32_t mode;
+ struct list_head node;
+ struct audioreach_container *container;
+ struct snd_soc_dapm_widget *widget;
+};
+
+/* Packet Allocation routines */
+void *audioreach_alloc_apm_cmd_pkt(int pkt_size, uint32_t opcode, uint32_t
+ token);
+void *audioreach_alloc_cmd_pkt(int pkt_size, uint32_t opcode, uint32_t token,
+ uint32_t src_port, uint32_t dest_port);
+void *audioreach_alloc_apm_pkt(int pkt_size, uint32_t opcode, uint32_t token,
+ uint32_t src_port);
+void *audioreach_alloc_pkt(int pkt_size, uint32_t opcode, uint32_t token,
+ uint32_t src_port, uint32_t dest_port);
+#endif /* __AUDIOREACH_H__ */
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: [RFC PATCH 04/13] ASoC: qcom: audioreach: add basic pkt alloc support
2021-06-07 15:28 ` Srinivas Kandagatla
(?)
@ 2021-06-07 20:39 ` kernel test robot
-1 siblings, 0 replies; 42+ messages in thread
From: kernel test robot @ 2021-06-07 20:39 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 3781 bytes --]
Hi Srinivas,
[FYI, it's a private test report for your RFC patch.]
[auto build test WARNING on asoc/for-next]
[also build test WARNING on robh/for-next sound/for-next linus/master v5.13-rc5 next-20210607]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Srinivas-Kandagatla/ASoC-qcom-Add-AudioReach-support/20210607-233210
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
config: m68k-allmodconfig (attached as .config)
compiler: m68k-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/348bf6dc8cd707e7543dff5b00ea6be8edd10b1e
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Srinivas-Kandagatla/ASoC-qcom-Add-AudioReach-support/20210607-233210
git checkout 348bf6dc8cd707e7543dff5b00ea6be8edd10b1e
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=m68k
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from sound/soc/qcom/audioreach/audioreach.c:8:
>> sound/soc/qcom/audioreach/audioreach.h:25: warning: "APM_MODULE_INSTANCE_ID" redefined
25 | #define APM_MODULE_INSTANCE_ID 0x00000001
|
In file included from sound/soc/qcom/audioreach/audioreach.c:6:
include/linux/soc/qcom/gpr.h:10: note: this is the location of the previous definition
10 | #define APM_MODULE_INSTANCE_ID GPR_APM_MODULE_IID
|
In file included from sound/soc/qcom/audioreach/audioreach.c:8:
>> sound/soc/qcom/audioreach/audioreach.h:26: warning: "PRM_MODULE_INSTANCE_ID" redefined
26 | #define PRM_MODULE_INSTANCE_ID 0x00000002
|
In file included from sound/soc/qcom/audioreach/audioreach.c:6:
include/linux/soc/qcom/gpr.h:11: note: this is the location of the previous definition
11 | #define PRM_MODULE_INSTANCE_ID GPR_PRM_MODULE_IID
|
In file included from sound/soc/qcom/audioreach/audioreach.c:8:
>> sound/soc/qcom/audioreach/audioreach.h:27: warning: "AMDB_MODULE_INSTANCE_ID" redefined
27 | #define AMDB_MODULE_INSTANCE_ID 0x00000003
|
In file included from sound/soc/qcom/audioreach/audioreach.c:6:
include/linux/soc/qcom/gpr.h:12: note: this is the location of the previous definition
12 | #define AMDB_MODULE_INSTANCE_ID GPR_AMDB_MODULE_IID
|
In file included from sound/soc/qcom/audioreach/audioreach.c:8:
>> sound/soc/qcom/audioreach/audioreach.h:28: warning: "VCPM_MODULE_INSTANCE_ID" redefined
28 | #define VCPM_MODULE_INSTANCE_ID 0x00000004
|
In file included from sound/soc/qcom/audioreach/audioreach.c:6:
include/linux/soc/qcom/gpr.h:13: note: this is the location of the previous definition
13 | #define VCPM_MODULE_INSTANCE_ID GPR_VCPM_MODULE_IID
|
vim +/APM_MODULE_INSTANCE_ID +25 sound/soc/qcom/audioreach/audioreach.h
24
> 25 #define APM_MODULE_INSTANCE_ID 0x00000001
> 26 #define PRM_MODULE_INSTANCE_ID 0x00000002
> 27 #define AMDB_MODULE_INSTANCE_ID 0x00000003
> 28 #define VCPM_MODULE_INSTANCE_ID 0x00000004
29
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 60513 bytes --]
^ permalink raw reply [flat|nested] 42+ messages in thread
* [RFC PATCH 05/13] ASoC: qcom: audioreach: add q6apm support
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-07 15:28 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: plai, tiwai, robh, devicetree, perex, alsa-devel, linux-kernel,
lgirdwood, bgoswami, Srinivas Kandagatla
Add support to q6apm (Audio Process Manager) component which is
core Audioreach service running in the DSP.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
include/dt-bindings/sound/qcom,q6apm.h | 215 ++++++++
sound/soc/qcom/audioreach/Makefile | 2 +-
sound/soc/qcom/audioreach/audioreach.c | 252 +++++++++
sound/soc/qcom/audioreach/audioreach.h | 6 +
sound/soc/qcom/audioreach/q6apm.c | 695 +++++++++++++++++++++++++
sound/soc/qcom/audioreach/q6apm.h | 171 ++++++
6 files changed, 1340 insertions(+), 1 deletion(-)
create mode 100644 include/dt-bindings/sound/qcom,q6apm.h
create mode 100644 sound/soc/qcom/audioreach/q6apm.c
create mode 100644 sound/soc/qcom/audioreach/q6apm.h
diff --git a/include/dt-bindings/sound/qcom,q6apm.h b/include/dt-bindings/sound/qcom,q6apm.h
new file mode 100644
index 000000000000..38e3a426b15a
--- /dev/null
+++ b/include/dt-bindings/sound/qcom,q6apm.h
@@ -0,0 +1,215 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_Q6_APM_H__
+#define __DT_BINDINGS_Q6_APM_H__
+
+#define MSM_FRONTEND_DAI_MULTIMEDIA1 1
+#define MSM_FRONTEND_DAI_MULTIMEDIA2 2
+#define MSM_FRONTEND_DAI_MULTIMEDIA3 3
+#define MSM_FRONTEND_DAI_MULTIMEDIA4 4
+#define MSM_FRONTEND_DAI_MULTIMEDIA5 5
+#define MSM_FRONTEND_DAI_MULTIMEDIA6 6
+#define MSM_FRONTEND_DAI_MULTIMEDIA7 7
+#define MSM_FRONTEND_DAI_MULTIMEDIA8 8
+
+/* Audio Process Manager (APM) virtual ports IDs */
+#define HDMI_RX 1
+#define SLIMBUS_0_RX 2
+#define SLIMBUS_0_TX 3
+#define SLIMBUS_1_RX 4
+#define SLIMBUS_1_TX 5
+#define SLIMBUS_2_RX 6
+#define SLIMBUS_2_TX 7
+#define SLIMBUS_3_RX 8
+#define SLIMBUS_3_TX 9
+#define SLIMBUS_4_RX 10
+#define SLIMBUS_4_TX 11
+#define SLIMBUS_5_RX 12
+#define SLIMBUS_5_TX 13
+#define SLIMBUS_6_RX 14
+#define SLIMBUS_6_TX 15
+#define PRIMARY_MI2S_RX 16
+#define PRIMARY_MI2S_TX 17
+#define SECONDARY_MI2S_RX 18
+#define SECONDARY_MI2S_TX 19
+#define TERTIARY_MI2S_RX 20
+#define TERTIARY_MI2S_TX 21
+#define QUATERNARY_MI2S_RX 22
+#define QUATERNARY_MI2S_TX 23
+#define PRIMARY_TDM_RX_0 24
+#define PRIMARY_TDM_TX_0 25
+#define PRIMARY_TDM_RX_1 26
+#define PRIMARY_TDM_TX_1 27
+#define PRIMARY_TDM_RX_2 28
+#define PRIMARY_TDM_TX_2 29
+#define PRIMARY_TDM_RX_3 30
+#define PRIMARY_TDM_TX_3 31
+#define PRIMARY_TDM_RX_4 32
+#define PRIMARY_TDM_TX_4 33
+#define PRIMARY_TDM_RX_5 34
+#define PRIMARY_TDM_TX_5 35
+#define PRIMARY_TDM_RX_6 36
+#define PRIMARY_TDM_TX_6 37
+#define PRIMARY_TDM_RX_7 38
+#define PRIMARY_TDM_TX_7 39
+#define SECONDARY_TDM_RX_0 40
+#define SECONDARY_TDM_TX_0 41
+#define SECONDARY_TDM_RX_1 42
+#define SECONDARY_TDM_TX_1 43
+#define SECONDARY_TDM_RX_2 44
+#define SECONDARY_TDM_TX_2 45
+#define SECONDARY_TDM_RX_3 46
+#define SECONDARY_TDM_TX_3 47
+#define SECONDARY_TDM_RX_4 48
+#define SECONDARY_TDM_TX_4 49
+#define SECONDARY_TDM_RX_5 50
+#define SECONDARY_TDM_TX_5 51
+#define SECONDARY_TDM_RX_6 52
+#define SECONDARY_TDM_TX_6 53
+#define SECONDARY_TDM_RX_7 54
+#define SECONDARY_TDM_TX_7 55
+#define TERTIARY_TDM_RX_0 56
+#define TERTIARY_TDM_TX_0 57
+#define TERTIARY_TDM_RX_1 58
+#define TERTIARY_TDM_TX_1 59
+#define TERTIARY_TDM_RX_2 60
+#define TERTIARY_TDM_TX_2 61
+#define TERTIARY_TDM_RX_3 62
+#define TERTIARY_TDM_TX_3 63
+#define TERTIARY_TDM_RX_4 64
+#define TERTIARY_TDM_TX_4 65
+#define TERTIARY_TDM_RX_5 66
+#define TERTIARY_TDM_TX_5 67
+#define TERTIARY_TDM_RX_6 68
+#define TERTIARY_TDM_TX_6 69
+#define TERTIARY_TDM_RX_7 70
+#define TERTIARY_TDM_TX_7 71
+#define QUATERNARY_TDM_RX_0 72
+#define QUATERNARY_TDM_TX_0 73
+#define QUATERNARY_TDM_RX_1 74
+#define QUATERNARY_TDM_TX_1 75
+#define QUATERNARY_TDM_RX_2 76
+#define QUATERNARY_TDM_TX_2 77
+#define QUATERNARY_TDM_RX_3 78
+#define QUATERNARY_TDM_TX_3 79
+#define QUATERNARY_TDM_RX_4 80
+#define QUATERNARY_TDM_TX_4 81
+#define QUATERNARY_TDM_RX_5 82
+#define QUATERNARY_TDM_TX_5 83
+#define QUATERNARY_TDM_RX_6 84
+#define QUATERNARY_TDM_TX_6 85
+#define QUATERNARY_TDM_RX_7 86
+#define QUATERNARY_TDM_TX_7 87
+#define QUINARY_TDM_RX_0 88
+#define QUINARY_TDM_TX_0 89
+#define QUINARY_TDM_RX_1 90
+#define QUINARY_TDM_TX_1 91
+#define QUINARY_TDM_RX_2 92
+#define QUINARY_TDM_TX_2 93
+#define QUINARY_TDM_RX_3 94
+#define QUINARY_TDM_TX_3 95
+#define QUINARY_TDM_RX_4 96
+#define QUINARY_TDM_TX_4 97
+#define QUINARY_TDM_RX_5 98
+#define QUINARY_TDM_TX_5 99
+#define QUINARY_TDM_RX_6 100
+#define QUINARY_TDM_TX_6 101
+#define QUINARY_TDM_RX_7 102
+#define QUINARY_TDM_TX_7 103
+#define DISPLAY_PORT_RX 104
+#define WSA_CODEC_DMA_RX_0 105
+#define WSA_CODEC_DMA_TX_0 106
+#define WSA_CODEC_DMA_RX_1 107
+#define WSA_CODEC_DMA_TX_1 108
+#define WSA_CODEC_DMA_TX_2 109
+#define VA_CODEC_DMA_TX_0 110
+#define VA_CODEC_DMA_TX_1 111
+#define VA_CODEC_DMA_TX_2 112
+#define RX_CODEC_DMA_RX_0 113
+#define TX_CODEC_DMA_TX_0 114
+#define RX_CODEC_DMA_RX_1 115
+#define TX_CODEC_DMA_TX_1 116
+#define RX_CODEC_DMA_RX_2 117
+#define TX_CODEC_DMA_TX_2 118
+#define RX_CODEC_DMA_RX_3 119
+#define TX_CODEC_DMA_TX_3 120
+#define RX_CODEC_DMA_RX_4 121
+#define TX_CODEC_DMA_TX_4 122
+#define RX_CODEC_DMA_RX_5 123
+#define TX_CODEC_DMA_TX_5 124
+#define RX_CODEC_DMA_RX_6 125
+#define RX_CODEC_DMA_RX_7 126
+
+#define LPASS_CLK_ID_PRI_MI2S_IBIT 1
+#define LPASS_CLK_ID_PRI_MI2S_EBIT 2
+#define LPASS_CLK_ID_SEC_MI2S_IBIT 3
+#define LPASS_CLK_ID_SEC_MI2S_EBIT 4
+#define LPASS_CLK_ID_TER_MI2S_IBIT 5
+#define LPASS_CLK_ID_TER_MI2S_EBIT 6
+#define LPASS_CLK_ID_QUAD_MI2S_IBIT 7
+#define LPASS_CLK_ID_QUAD_MI2S_EBIT 8
+#define LPASS_CLK_ID_SPEAKER_I2S_IBIT 9
+#define LPASS_CLK_ID_SPEAKER_I2S_EBIT 10
+#define LPASS_CLK_ID_SPEAKER_I2S_OSR 11
+#define LPASS_CLK_ID_QUI_MI2S_IBIT 12
+#define LPASS_CLK_ID_QUI_MI2S_EBIT 13
+#define LPASS_CLK_ID_SEN_MI2S_IBIT 14
+#define LPASS_CLK_ID_SEN_MI2S_EBIT 15
+#define LPASS_CLK_ID_INT0_MI2S_IBIT 16
+#define LPASS_CLK_ID_INT1_MI2S_IBIT 17
+#define LPASS_CLK_ID_INT2_MI2S_IBIT 18
+#define LPASS_CLK_ID_INT3_MI2S_IBIT 19
+#define LPASS_CLK_ID_INT4_MI2S_IBIT 20
+#define LPASS_CLK_ID_INT5_MI2S_IBIT 21
+#define LPASS_CLK_ID_INT6_MI2S_IBIT 22
+#define LPASS_CLK_ID_QUI_MI2S_OSR 23
+#define LPASS_CLK_ID_PRI_PCM_IBIT 24
+#define LPASS_CLK_ID_PRI_PCM_EBIT 25
+#define LPASS_CLK_ID_SEC_PCM_IBIT 26
+#define LPASS_CLK_ID_SEC_PCM_EBIT 27
+#define LPASS_CLK_ID_TER_PCM_IBIT 28
+#define LPASS_CLK_ID_TER_PCM_EBIT 29
+#define LPASS_CLK_ID_QUAD_PCM_IBIT 30
+#define LPASS_CLK_ID_QUAD_PCM_EBIT 31
+#define LPASS_CLK_ID_QUIN_PCM_IBIT 32
+#define LPASS_CLK_ID_QUIN_PCM_EBIT 33
+#define LPASS_CLK_ID_QUI_PCM_OSR 34
+#define LPASS_CLK_ID_PRI_TDM_IBIT 35
+#define LPASS_CLK_ID_PRI_TDM_EBIT 36
+#define LPASS_CLK_ID_SEC_TDM_IBIT 37
+#define LPASS_CLK_ID_SEC_TDM_EBIT 38
+#define LPASS_CLK_ID_TER_TDM_IBIT 39
+#define LPASS_CLK_ID_TER_TDM_EBIT 40
+#define LPASS_CLK_ID_QUAD_TDM_IBIT 41
+#define LPASS_CLK_ID_QUAD_TDM_EBIT 42
+#define LPASS_CLK_ID_QUIN_TDM_IBIT 43
+#define LPASS_CLK_ID_QUIN_TDM_EBIT 44
+#define LPASS_CLK_ID_QUIN_TDM_OSR 45
+#define LPASS_CLK_ID_MCLK_1 46
+#define LPASS_CLK_ID_MCLK_2 47
+#define LPASS_CLK_ID_MCLK_3 48
+#define LPASS_CLK_ID_MCLK_4 49
+#define LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE 50
+#define LPASS_CLK_ID_INT_MCLK_0 51
+#define LPASS_CLK_ID_INT_MCLK_1 52
+#define LPASS_CLK_ID_MCLK_5 53
+#define LPASS_CLK_ID_WSA_CORE_MCLK 54
+#define LPASS_CLK_ID_WSA_CORE_NPL_MCLK 55
+#define LPASS_CLK_ID_VA_CORE_MCLK 56
+#define LPASS_CLK_ID_TX_CORE_MCLK 57
+#define LPASS_CLK_ID_TX_CORE_NPL_MCLK 58
+#define LPASS_CLK_ID_RX_CORE_MCLK 59
+#define LPASS_CLK_ID_RX_CORE_NPL_MCLK 60
+#define LPASS_CLK_ID_VA_CORE_2X_MCLK 61
+
+#define LPASS_HW_AVTIMER_VOTE 101
+#define LPASS_HW_MACRO_VOTE 102
+#define LPASS_HW_DCODEC_VOTE 103
+
+#define Q6APM_MAX_CLK_ID 104
+
+#define LPASS_CLK_ATTRIBUTE_INVALID 0x0
+#define LPASS_CLK_ATTRIBUTE_COUPLE_NO 0x1
+#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND 0x2
+#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR 0x3
+
+#endif /* __DT_BINDINGS_Q6_APM_H__ */
diff --git a/sound/soc/qcom/audioreach/Makefile b/sound/soc/qcom/audioreach/Makefile
index 575edbed29a2..d76afc51556b 100644
--- a/sound/soc/qcom/audioreach/Makefile
+++ b/sound/soc/qcom/audioreach/Makefile
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
-snd-ar-objs := audioreach.o
+snd-ar-objs := audioreach.o q6apm.o
obj-$(CONFIG_SND_SOC_QCOM_AUDIOREACH) += snd-ar.o
diff --git a/sound/soc/qcom/audioreach/audioreach.c b/sound/soc/qcom/audioreach/audioreach.c
index 617163473b1c..7291adb37d49 100644
--- a/sound/soc/qcom/audioreach/audioreach.c
+++ b/sound/soc/qcom/audioreach/audioreach.c
@@ -5,6 +5,7 @@
#include <linux/slab.h>
#include <linux/soc/qcom/gpr.h>
#include <dt-bindings/soc/qcom,gpr.h>
+#include "q6apm.h"
#include "audioreach.h"
/* SubGraph Config */
@@ -277,3 +278,254 @@ void *audioreach_alloc_apm_cmd_pkt(int pkt_size, uint32_t opcode,
APM_MODULE_INSTANCE_ID,
true);
}
+
+static void apm_populate_container_config(
+ struct apm_container_obj *cfg,
+ struct audioreach_container *cont)
+{
+
+ /* Container Config */
+ cfg->container_cfg.container_id = cont->container_id;
+ cfg->container_cfg.num_prop = 4;
+
+ /* Capablity list */
+ cfg->cap_data.prop_id = APM_CONTAINER_PROP_ID_CAPABILITY_LIST;
+ cfg->cap_data.prop_size = APM_CONTAINER_PROP_ID_CAPABILITY_SIZE;
+ cfg->num_capablity_id = 1;
+ cfg->capability_id = cont->capability_id;
+
+ /* Graph Position */
+ cfg->pos_data.prop_id = APM_CONTAINER_PROP_ID_GRAPH_POS;
+ cfg->pos_data.prop_size = sizeof(struct apm_cont_prop_id_graph_pos);
+ cfg->pos.graph_pos = cont->graph_pos;
+
+ /* Stack size */
+ cfg->stack_data.prop_id = APM_CONTAINER_PROP_ID_STACK_SIZE;
+ cfg->stack_data.prop_size = sizeof(struct
+ apm_cont_prop_id_stack_size);
+ cfg->stack.stack_size = cont->stack_size;
+
+ /* Proc domain */
+ cfg->domain_data.prop_id = APM_CONTAINER_PROP_ID_PROC_DOMAIN;
+ cfg->domain_data.prop_size = sizeof(struct
+ apm_cont_prop_id_domain);
+ cfg->domain.proc_domain = cont->proc_domain;
+}
+
+static void apm_populate_sub_graph_config(
+ struct apm_sub_graph_data *cfg,
+ struct audioreach_sub_graph *sg)
+{
+ cfg->sub_graph_cfg.sub_graph_id = sg->sub_graph_id;
+ cfg->sub_graph_cfg.num_sub_graph_prop = APM_SUB_GRAPH_CFG_NPROP;
+
+ /* Perf Mode */
+ cfg->perf_data.prop_id = APM_SUB_GRAPH_PROP_ID_PERF_MODE;
+ cfg->perf_data.prop_size = APM_SG_PROP_ID_PERF_MODE_SIZE;
+ cfg->perf.perf_mode = sg->perf_mode;
+
+ /* Direction */
+ cfg->dir_data.prop_id = APM_SUB_GRAPH_PROP_ID_DIRECTION;
+ cfg->dir_data.prop_size = APM_SG_PROP_ID_DIR_SIZE;
+ cfg->dir.direction = sg->direction;
+
+ /* Scenario ID */
+ cfg->sid_data.prop_id = APM_SUB_GRAPH_PROP_ID_SCENARIO_ID;
+ cfg->sid_data.prop_size = APM_SG_PROP_ID_SID_SIZE;
+ cfg->sid.scenario_id = sg->scenario_id;
+}
+
+static void apm_populate_connection_obj(struct apm_module_conn_obj *obj,
+ struct audioreach_module *module)
+{
+ obj->src_mod_inst_id = module->src_mod_inst_id;
+ obj->src_mod_op_port_id = module->src_mod_op_port_id;
+ obj->dst_mod_inst_id = module->instance_id;
+ obj->dst_mod_ip_port_id = module->in_port;
+}
+
+static void apm_populate_module_prop_obj(struct apm_mod_prop_obj *obj,
+ struct audioreach_module *module)
+{
+
+ obj->instance_id = module->instance_id;
+ obj->num_props = 1;
+ obj->prop_data_1.prop_id = APM_MODULE_PROP_ID_PORT_INFO;
+ obj->prop_data_1.prop_size = APM_MODULE_PROP_ID_PORT_INFO_SZ;
+ obj->prop_id_port.max_ip_port = module->max_ip_port;
+ obj->prop_id_port.max_op_port = module->max_op_port;
+}
+
+static void apm_populate_module_list_obj(struct apm_mod_list_obj *obj,
+ struct audioreach_container *container,
+ int sub_graph_id)
+{
+ struct audioreach_module *module;
+ int i;
+
+ obj->sub_graph_id = sub_graph_id;
+ obj->container_id = container->container_id;
+ obj->num_modules = container->num_modules;
+ i = 0;
+ list_for_each_entry(module, &container->modules_list, node) {
+ obj->mod_cfg[i].module_id = module->module_id;
+ obj->mod_cfg[i].instance_id = module->instance_id;
+ i++;
+ }
+}
+
+static void audioreach_populate_graph(struct apm_graph_open_params *open,
+ struct list_head *sg_list,
+ int num_sub_graphs)
+{
+ struct apm_sub_graph_params *sg_data = open->sg_data;
+ struct apm_container_params *c_data = open->cont_data;
+ struct apm_module_list_params *ml_data = open->mod_list_data;
+ struct apm_prop_list_params *mp_data = open->mod_prop_data;
+ struct apm_mod_conn_list_params *mc_data = open->mod_conn_list_data;
+ struct apm_container_obj *cobj;
+ struct audioreach_container *container;
+ struct audioreach_module *module;
+ struct apm_mod_list_obj *mlobj;
+ struct apm_mod_prop_obj *module_prop_obj;
+ struct apm_module_conn_obj *conn_obj;
+ int ncontainer = 0, nmodule = 0, nconn = 0;
+ struct audioreach_sub_graph *sg;
+ int i = 0;
+
+ mlobj = &ml_data->mod_list_obj[0];
+
+ list_for_each_entry(sg, sg_list, node) {
+ struct apm_sub_graph_data *sg_cfg = &sg_data->sg_cfg[i++];
+
+ apm_populate_sub_graph_config(sg_cfg, sg);
+
+ list_for_each_entry(container, &sg->container_list, node) {
+ cobj = &c_data->cont_obj[ncontainer];
+
+ apm_populate_container_config(cobj, container);
+ apm_populate_module_list_obj(mlobj, container,
+ sg->sub_graph_id);
+
+ list_for_each_entry(module, &container->modules_list, node) {
+ uint32_t src_mod_inst_id;
+
+ src_mod_inst_id = module->src_mod_inst_id;
+
+ module_prop_obj = &mp_data->mod_prop_obj[nmodule];
+ apm_populate_module_prop_obj(module_prop_obj,
+ module);
+
+ if (src_mod_inst_id /*&& dst_mod_inst_id*/) {
+ conn_obj = &mc_data->conn_obj[nconn];
+ apm_populate_connection_obj(conn_obj, module);
+ nconn++;
+ }
+
+ nmodule++;
+ }
+ mlobj = (void *) mlobj +
+ APM_MOD_LIST_OBJ_PSIZE(container->num_modules);
+
+ ncontainer++;
+ }
+ }
+}
+
+void *audioreach_alloc_graph_pkt(struct q6apm *apm,
+ struct list_head *sg_list,
+ int graph_id)
+{
+ void *p;
+ int payload_size, sg_sz, cont_sz, ml_sz, mp_sz, mc_sz;
+ struct gpr_pkt *pkt;
+ struct apm_graph_open_params params;
+ struct apm_module_param_data *param_data;
+ struct audioreach_container *container;
+ int num_containers = 0;
+ int num_modules = 0;
+ int num_modules_list;
+ int num_modules_per_list;
+ int num_connections = 0;
+ int num_sub_graphs = 0;
+ struct audioreach_sub_graph *sgs;
+ struct audioreach_module *module;
+
+ list_for_each_entry(sgs, sg_list, node) {
+ num_sub_graphs++;
+ list_for_each_entry(container, &sgs->container_list, node) {
+ num_containers++;
+ num_modules += container->num_modules;
+ list_for_each_entry(module, &container->modules_list, node) {
+ if (module->src_mod_inst_id)
+ num_connections++;
+ }
+ }
+ }
+
+ num_modules_list = num_containers;
+ num_modules_per_list = num_modules/num_containers;
+ sg_sz = APM_SUB_GRAPH_PSIZE(num_sub_graphs);
+ cont_sz = APM_CONTAINER_PSIZE(num_containers);
+ ml_sz = APM_MOD_LIST_PSIZE(num_modules_list, num_modules_per_list);
+ mp_sz = APM_MOD_PROP_PSIZE(num_modules);
+ mc_sz = APM_MOD_CONN_PSIZE(num_connections);
+
+ payload_size = sg_sz + cont_sz + ml_sz + mp_sz + mc_sz;
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_GRAPH_OPEN, 0);
+ if (IS_ERR(p))
+ return p;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ // SG
+ params.sg_data = p;
+ param_data = ¶ms.sg_data->param_data;
+ param_data->module_instance_id = APM_MODULE_INSTANCE_ID;
+ param_data->param_id = APM_PARAM_ID_SUB_GRAPH_CONFIG;
+ param_data->param_size = sg_sz - APM_MODULE_PARAM_DATA_SIZE;
+ params.sg_data->num_sub_graphs = num_sub_graphs;
+ p += sg_sz;
+
+ //CONT
+ params.cont_data = p;
+ param_data = ¶ms.cont_data->param_data;
+ param_data->module_instance_id = APM_MODULE_INSTANCE_ID;
+ param_data->param_id = APM_PARAM_ID_CONTAINER_CONFIG;
+ param_data->param_size = cont_sz - APM_MODULE_PARAM_DATA_SIZE;
+ params.cont_data->num_containers = num_containers;
+ p += cont_sz;
+
+ // ML List
+ params.mod_list_data = p;
+ param_data = ¶ms.mod_list_data->param_data;
+ param_data->module_instance_id = APM_MODULE_INSTANCE_ID;
+ param_data->param_id = APM_PARAM_ID_MODULE_LIST;
+ param_data->param_size = ml_sz - APM_MODULE_PARAM_DATA_SIZE;
+ params.mod_list_data->num_modules_list = num_sub_graphs;
+ p += ml_sz;
+
+ // MOD PROP
+ params.mod_prop_data = p;
+ param_data = ¶ms.mod_prop_data->param_data;
+ param_data->module_instance_id = APM_MODULE_INSTANCE_ID;
+ param_data->param_id = APM_PARAM_ID_MODULE_PROP;
+ param_data->param_size = mp_sz - APM_MODULE_PARAM_DATA_SIZE;
+ params.mod_prop_data->num_modules_prop_cfg = num_modules;
+ p += mp_sz;
+
+ // MOD CONN
+ params.mod_conn_list_data = p;
+ param_data = ¶ms.mod_conn_list_data->param_data;
+ param_data->module_instance_id = APM_MODULE_INSTANCE_ID;
+ param_data->param_id = APM_PARAM_ID_MODULE_CONN;
+ param_data->param_size = mc_sz - APM_MODULE_PARAM_DATA_SIZE;
+ params.mod_conn_list_data->num_connections = num_connections;
+ p += mc_sz;
+
+ audioreach_populate_graph(¶ms, sg_list, num_sub_graphs);
+
+ return pkt;
+}
+
diff --git a/sound/soc/qcom/audioreach/audioreach.h b/sound/soc/qcom/audioreach/audioreach.h
index 872e400dce6c..e5736fdda66b 100644
--- a/sound/soc/qcom/audioreach/audioreach.h
+++ b/sound/soc/qcom/audioreach/audioreach.h
@@ -5,6 +5,9 @@
#include <linux/types.h>
#include <linux/soc/qcom/gpr.h>
#include <sound/soc.h>
+struct q6apm;
+struct q6apm_graph;
+
/* Module IDs */
#define MODULE_ID_WR_SHARED_MEM_EP 0x07001000
@@ -621,4 +624,7 @@ void *audioreach_alloc_apm_pkt(int pkt_size, uint32_t opcode, uint32_t token,
uint32_t src_port);
void *audioreach_alloc_pkt(int pkt_size, uint32_t opcode, uint32_t token,
uint32_t src_port, uint32_t dest_port);
+void *audioreach_alloc_graph_pkt(struct q6apm *apm,
+ struct list_head *sg_list,
+ int graph_id);
#endif /* __AUDIOREACH_H__ */
diff --git a/sound/soc/qcom/audioreach/q6apm.c b/sound/soc/qcom/audioreach/q6apm.c
new file mode 100644
index 000000000000..d0deb69114b0
--- /dev/null
+++ b/sound/soc/qcom/audioreach/q6apm.c
@@ -0,0 +1,695 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2020, Linaro Limited
+
+#include <dt-bindings/soc/qcom,gpr.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/soc/qcom/gpr.h>
+#include <linux/wait.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/pcm.h>
+#include "audioreach.h"
+#include "q6apm.h"
+
+/* Graph Management */
+struct apm_graph_mgmt_cmd {
+ struct apm_module_param_data param_data;
+ uint32_t num_sub_graphs;
+ uint32_t sub_graph_id_list[0];
+} __packed;
+
+#define APM_GRAPH_MGMT_PSIZE(n) ALIGN(sizeof(struct apm_graph_mgmt_cmd) + \
+ n * sizeof(uint32_t), 8)
+
+int q6apm_send_cmd(struct q6apm *apm, struct gpr_pkt *pkt)
+{
+ int rc;
+
+ mutex_lock(&apm->cmd_lock);
+ rc = gpr_send_pkt(apm->gdev, pkt);
+ mutex_unlock(&apm->cmd_lock);
+
+ return rc;
+}
+
+int q6apm_send_cmd_sync(struct q6apm *apm, struct gpr_pkt *pkt,
+ uint32_t rsp_opcode)
+{
+ struct gpr_device *gdev = apm->gdev;
+ struct gpr_hdr *hdr = &pkt->hdr;
+ int rc;
+
+ mutex_lock(&apm->cmd_lock);
+ apm->result.opcode = 0;
+ apm->result.status = 0;
+
+ rc = gpr_send_pkt(apm->gdev, pkt);
+ if (rc < 0)
+ goto err;
+
+ if (rsp_opcode)
+ rc = wait_event_timeout(apm->wait,
+ (apm->result.opcode == hdr->opcode) ||
+ (apm->result.opcode == rsp_opcode),
+ 5 * HZ);
+ else
+ rc = wait_event_timeout(apm->wait,
+ (apm->result.opcode == hdr->opcode),
+ 5 * HZ);
+
+ if (!rc) {
+ dev_err(&gdev->dev, "CMD timeout for [%x] opcode\n",
+ hdr->opcode);
+ rc = -ETIMEDOUT;
+ } else if (apm->result.status > 0) {
+ dev_err(&gdev->dev, "DSP returned error[%x] %x\n", hdr->opcode,
+ apm->result.status);
+ rc = -EINVAL;
+ } else {
+ dev_err(&gdev->dev, "DSP returned [%x]\n",
+ apm->result.status);
+ rc = 0;
+ }
+
+err:
+ mutex_unlock(&apm->cmd_lock);
+ return rc;
+}
+
+static struct audioreach_graph *q6apm_get_audioreach_graph(struct q6apm *apm,
+ uint32_t graph_id)
+{
+ struct audioreach_graph *graph = NULL;
+ struct audioreach_graph_info *info;
+ unsigned long flags;
+
+ spin_lock_irqsave(&apm->lock, flags);
+ graph = idr_find(&apm->graph_idr, graph_id);
+ spin_unlock_irqrestore(&apm->lock, flags);
+
+ if (graph) {
+ kref_get(&graph->refcount);
+ return graph;
+ }
+
+ info = idr_find(&apm->graph_info_idr, graph_id);
+
+ if (!info)
+ return ERR_PTR(-ENODEV);
+
+ graph = kzalloc(sizeof(*graph), GFP_KERNEL);
+ if (!graph)
+ return ERR_PTR(-ENOMEM);
+
+ graph->apm = apm;
+ graph->info = info;
+ graph->id = graph_id;
+
+ /* Assuming Linear Graphs only for now! */
+ graph->graph = audioreach_alloc_graph_pkt(apm, &info->sg_list, graph_id);
+ if (IS_ERR(graph->graph))
+ return ERR_PTR(-ENOMEM);
+
+ spin_lock(&apm->lock);
+ idr_alloc(&apm->graph_idr, graph, graph_id,
+ graph_id + 1, GFP_ATOMIC);
+ spin_unlock(&apm->lock);
+
+ kref_init(&graph->refcount);
+
+ q6apm_send_cmd_sync(apm, graph->graph, 0);
+
+ return graph;
+}
+
+static int audioreach_graph_mgmt_cmd(struct audioreach_graph *graph,
+ uint32_t opcode)
+{
+ struct gpr_pkt *pkt;
+ void *p;
+ int i = 0, rc, payload_size;
+ struct q6apm *apm = graph->apm;
+ struct audioreach_graph_info *info = graph->info;
+ int num_sub_graphs = info->num_sub_graphs;
+ struct apm_graph_mgmt_cmd *mgmt_cmd;
+ struct apm_module_param_data *param_data;
+ struct audioreach_sub_graph *sg;
+
+ payload_size = APM_GRAPH_MGMT_PSIZE(num_sub_graphs);
+
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, opcode, 0);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ mgmt_cmd = p;
+ mgmt_cmd->num_sub_graphs = num_sub_graphs;
+
+ param_data = &mgmt_cmd->param_data;
+ param_data->module_instance_id = APM_MODULE_INSTANCE_ID;
+ param_data->param_id = APM_PARAM_ID_SUB_GRAPH_LIST;
+ param_data->param_size = payload_size - APM_MODULE_PARAM_DATA_SIZE;
+
+ list_for_each_entry(sg, &info->sg_list, node) {
+ mgmt_cmd->sub_graph_id_list[i++] = sg->sub_graph_id;
+ }
+
+ rc = q6apm_send_cmd_sync(apm, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static void q6apm_put_audioreach_graph(struct kref *ref)
+{
+ struct audioreach_graph *graph;
+ struct q6apm *apm;
+ unsigned long flags;
+
+ graph = container_of(ref, struct audioreach_graph, refcount);
+ apm = graph->apm;
+
+ audioreach_graph_mgmt_cmd(graph, APM_CMD_GRAPH_CLOSE);
+
+ spin_lock_irqsave(&apm->lock, flags);
+ graph = idr_remove(&apm->graph_idr, graph->id);
+ spin_unlock_irqrestore(&apm->lock, flags);
+
+ kfree(graph->graph);
+ kfree(graph);
+}
+
+static bool q6apm_get_apm_state(struct q6apm *apm)
+{
+ struct gpr_pkt *pkt;
+
+ pkt = audioreach_alloc_apm_cmd_pkt(0, APM_CMD_GET_SPF_STATE, 0);
+ if (IS_ERR(pkt))
+ return -ENOMEM;
+
+ q6apm_send_cmd_sync(apm, pkt, APM_CMD_RSP_GET_SPF_STATE);
+
+ kfree(pkt);
+
+ return !apm->state ? false : true;
+}
+
+static struct audioreach_module *__q6apm_find_module_by_mid(struct q6apm *apm,
+ struct audioreach_graph_info *info,
+ uint32_t mid)
+{
+ struct audioreach_sub_graph *sgs;
+ struct audioreach_container *container;
+ struct audioreach_module *module;
+
+ list_for_each_entry(sgs, &info->sg_list, node) {
+ list_for_each_entry(container, &sgs->container_list, node) {
+ list_for_each_entry(module, &container->modules_list, node) {
+ if (mid == module->module_id)
+ return module;
+ }
+ }
+ }
+
+ return NULL;
+}
+
+static struct audioreach_module *q6apm_graph_get_last_module(struct q6apm *apm,
+ u32 sgid)
+{
+ struct audioreach_sub_graph *sg;
+ struct audioreach_module *module;
+ struct audioreach_container *container;
+
+ spin_lock(&apm->lock);
+ sg = idr_find(&apm->sub_graphs_idr, sgid);
+ spin_unlock(&apm->lock);
+ if (!sg)
+ return NULL;
+
+ container = list_last_entry(&sg->container_list, struct audioreach_container, node);
+ module = list_last_entry(&container->modules_list, struct audioreach_module, node);
+
+ return module;
+}
+
+static struct audioreach_module *q6apm_graph_get_first_module(struct q6apm *apm,
+ u32 sgid)
+{
+ struct audioreach_sub_graph *sg;
+ struct audioreach_module *module;
+ struct audioreach_container *container;
+
+ spin_lock(&apm->lock);
+ sg = idr_find(&apm->sub_graphs_idr, sgid);
+ spin_unlock(&apm->lock);
+ if (!sg)
+ return NULL;
+
+ container = list_first_entry(&sg->container_list, struct audioreach_container, node);
+ module = list_first_entry(&container->modules_list, struct audioreach_module, node);
+
+ return module;
+}
+
+bool q6apm_is_sub_graphs_connected(struct q6apm *apm, u32 src_sgid, u32 dst_sgid)
+{
+ struct audioreach_module *module;
+ u32 iid;
+
+ module = q6apm_graph_get_last_module(apm, src_sgid);
+ if (!module)
+ return false;
+
+ iid = module->instance_id;
+ module = q6apm_graph_get_first_module(apm, dst_sgid);
+ if (!module)
+ return false;
+
+ if (module->src_mod_inst_id == iid)
+ return true;
+
+ return false;
+}
+
+int q6apm_connect_sub_graphs(struct q6apm *apm, u32 src_sgid,
+ u32 dst_sgid, bool connect)
+{
+
+ struct audioreach_module *module;
+ u32 iid;
+
+ if (connect) {
+ module = q6apm_graph_get_last_module(apm, src_sgid);
+ if (!module)
+ return -ENODEV;
+
+ iid = module->instance_id;
+ } else {
+ iid = 0;
+ }
+
+ module = q6apm_graph_get_first_module(apm, dst_sgid);
+ if (!module)
+ return ENODEV;
+
+ /* set src module in dst subgraph first module */
+ module->src_mod_inst_id = iid;
+
+ return 0;
+}
+
+int q6apm_graph_get_rx_shmem_module_iid(struct q6apm_graph *graph)
+{
+ struct audioreach_module *module;
+
+ module = q6apm_find_module_by_mid(graph, MODULE_ID_WR_SHARED_MEM_EP);
+ if (!module)
+ return -ENODEV;
+
+ return module->instance_id;
+
+}
+EXPORT_SYMBOL_GPL(q6apm_graph_get_rx_shmem_module_iid);
+
+static int graph_callback(struct gpr_resp_pkt *data, void *priv, int op)
+{
+ struct q6apm_graph *graph = priv;
+ struct device *dev = graph->dev;
+ struct gpr_hdr *hdr = &data->hdr;
+ struct gpr_ibasic_rsp_result_t *result;
+ int ret = -EINVAL;
+ uint32_t client_event = 0;
+
+ result = data->payload;
+
+ switch (hdr->opcode) {
+ case DATA_CMD_RSP_WR_SH_MEM_EP_DATA_BUFFER_DONE_V2:
+ client_event = APM_CLIENT_EVENT_DATA_WRITE_DONE;
+ if (graph) {
+ struct data_cmd_rsp_wr_sh_mem_ep_data_buffer_done_v2 *done;
+ phys_addr_t phys;
+ unsigned long flags;
+
+ spin_lock_irqsave(&graph->lock, flags);
+
+ done = data->payload;
+ phys = graph->rx_data.buf[hdr->token].phys;
+
+ if (lower_32_bits(phys) != done->buf_addr_lsw ||
+ upper_32_bits(phys) != done->buf_addr_msw) {
+ dev_err(dev, "WR BUFF Expected Token %d addr %pa\n", hdr->token, &phys);
+ ret = -EINVAL;
+ } else {
+ ret = 0;
+ graph->result.opcode = hdr->opcode;
+ graph->result.status = done->status;
+ }
+ spin_unlock_irqrestore(&graph->lock, flags);
+ } else {
+ dev_err(dev, "No SH Mem module found\n");
+ ret = -EINVAL;
+ }
+ if (graph->cb)
+ graph->cb(client_event, hdr->token, data->payload,
+ graph->priv);
+
+ break;
+ case APM_CMD_RSP_SHARED_MEM_MAP_REGIONS:
+ if (graph) {
+ struct apm_cmd_rsp_shared_mem_map_regions *rsp;
+
+ graph->result.opcode = hdr->opcode;
+ graph->result.status = 0;
+ rsp = data->payload;
+
+ if (hdr->token == SNDRV_PCM_STREAM_PLAYBACK)
+ graph->rx_data.mem_map_handle = rsp->mem_map_handle;
+ else
+ graph->tx_data.mem_map_handle = rsp->mem_map_handle;
+
+ wake_up(&graph->cmd_wait);
+ ret = 0;
+ }
+ break;
+ case DATA_CMD_RSP_RD_SH_MEM_EP_DATA_BUFFER_V2:
+ if (graph) {
+ struct data_cmd_rsp_rd_sh_mem_ep_data_buffer_done_v2 *done;
+ unsigned long flags;
+ phys_addr_t phys;
+
+ done = data->payload;
+ spin_lock_irqsave(&graph->lock, flags);
+ phys = graph->tx_data.buf[hdr->token].phys;
+ if (upper_32_bits(phys) != done->buf_addr_msw ||
+ lower_32_bits(phys) != done->buf_addr_lsw) {
+ dev_err(dev, "RD BUFF Expected addr %pa %08x-%08x\n",
+ &phys,
+ done->buf_addr_lsw,
+ done->buf_addr_msw);
+ ret = -EINVAL;
+ //goto done;
+ } else {
+ ret = 0;
+ }
+ spin_unlock_irqrestore(&graph->lock, flags);
+ client_event = APM_CLIENT_EVENT_DATA_READ_DONE;
+ wake_up(&graph->cmd_wait);
+
+ if (graph->cb)
+ graph->cb(client_event, hdr->token, data->payload,
+ graph->priv);
+ }
+
+ break;
+ case DATA_CMD_WR_SH_MEM_EP_EOS_RENDERED:
+ break;
+ case GPR_BASIC_RSP_RESULT:
+ switch (result->opcode) {
+ case APM_CMD_SHARED_MEM_UNMAP_REGIONS:
+ if (graph) {
+ graph->result.opcode = result->opcode;
+ graph->result.status = 0;
+ if (hdr->token == SNDRV_PCM_STREAM_PLAYBACK)
+ graph->rx_data.mem_map_handle = 0;
+ else
+ graph->tx_data.mem_map_handle = 0;
+
+ wake_up(&graph->cmd_wait);
+ ret = 0;
+ }
+
+ break;
+ case APM_CMD_SHARED_MEM_MAP_REGIONS:
+ case DATA_CMD_WR_SH_MEM_EP_MEDIA_FORMAT:
+ case APM_CMD_SET_CFG:
+ graph->result.opcode = result->opcode;
+ graph->result.status = result->status;
+ if (result->status) {
+ dev_err(dev,
+ "Error (%d) Processing 0x%08x cmd\n",
+ result->status, result->opcode);
+ ret = -EINVAL;
+ } else {
+ ret = 0;
+ }
+ wake_up(&graph->cmd_wait);
+ if (graph->cb)
+ graph->cb(client_event, hdr->token, data->payload,
+ graph->priv);
+
+ }
+ break;
+ }
+
+ return ret;
+}
+
+struct q6apm_graph *q6apm_graph_open(struct device *dev, q6apm_cb cb,
+ void *priv, int graph_id)
+{
+ struct q6apm *apm = dev_get_drvdata(dev->parent);
+ struct q6apm_graph *graph;
+ struct audioreach_graph *ar_graph;
+ int ret;
+
+ dev_err(dev, "%s :graph id %d\n",__func__, graph_id);
+ ar_graph = q6apm_get_audioreach_graph(apm, graph_id);
+ if (IS_ERR(ar_graph)) {
+ dev_err(dev, "No graph found with id %d\n", graph_id);
+ return ERR_CAST(ar_graph);
+ }
+
+ graph = kzalloc(sizeof(*graph), GFP_KERNEL);
+ if (!graph) {
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ graph->apm = apm;
+ graph->priv = priv;
+ graph->cb = cb;
+ graph->info = ar_graph->info;
+ graph->ar_graph = ar_graph;
+ graph->id = ar_graph->id;
+ graph->dev = dev;
+
+ spin_lock_init(&graph->lock);
+ init_waitqueue_head(&graph->cmd_wait);
+ mutex_init(&graph->cmd_lock);
+
+ graph->port = gpr_alloc_port(apm->gdev, dev, graph_callback, graph);
+ if (!graph->port) {
+ kfree(graph);
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ dev_dbg(dev, "%s: GRAPH-DEBUG Opening graph id %d with port id 0x%08x \n", __func__,
+ graph_id, graph->port->id);
+
+ return graph;
+err:
+ kref_put(&ar_graph->refcount, q6apm_put_audioreach_graph);
+ return ERR_PTR(ret);
+}
+
+int q6apm_graph_close(struct q6apm_graph *graph)
+{
+ struct audioreach_graph *ar_graph = graph->ar_graph;
+
+ gpr_free_port(graph->port);
+ graph->port = NULL;
+ kref_put(&ar_graph->refcount, q6apm_put_audioreach_graph);
+ kfree(graph);
+
+ return 0;
+}
+
+int q6apm_graph_prepare(struct q6apm_graph *graph)
+{
+ return audioreach_graph_mgmt_cmd(graph->ar_graph,
+ APM_CMD_GRAPH_PREPARE);
+}
+
+int q6apm_graph_start(struct q6apm_graph *graph)
+{
+ struct audioreach_graph *ar_graph = graph->ar_graph;
+ int ret = 0;
+
+ if (ar_graph->start_count == 0)
+ ret = audioreach_graph_mgmt_cmd(ar_graph, APM_CMD_GRAPH_START);
+
+ ar_graph->start_count++;
+
+ return ret;
+}
+
+int q6apm_graph_stop(struct q6apm_graph *graph)
+{
+ struct audioreach_graph *ar_graph = graph->ar_graph;
+
+ if (--ar_graph->start_count > 0)
+ return 0;
+
+ return audioreach_graph_mgmt_cmd(ar_graph, APM_CMD_GRAPH_STOP);
+}
+
+int q6apm_graph_flush(struct q6apm_graph *graph)
+{
+ return audioreach_graph_mgmt_cmd(graph->ar_graph, APM_CMD_GRAPH_FLUSH);
+}
+
+static int q6apm_audio_probe(struct snd_soc_component *component)
+{
+ return 0;
+}
+
+static void q6apm_audio_remove(struct snd_soc_component *component)
+{
+}
+
+#define APM_AUDIO_DRV_NAME "q6apm-audio"
+
+static const struct snd_soc_component_driver q6apm_audio_component = {
+ .name = APM_AUDIO_DRV_NAME,
+ .probe = q6apm_audio_probe,
+ .remove = q6apm_audio_remove,
+};
+
+static int apm_probe(struct gpr_device *gdev)
+{
+ struct device *dev = &gdev->dev;
+ struct q6apm *apm;
+
+ apm = devm_kzalloc(dev, sizeof(*apm), GFP_KERNEL);
+ if (!apm)
+ return -ENOMEM;
+
+ dev_set_drvdata(dev, apm);
+
+ mutex_init(&apm->cmd_lock);
+ apm->dev = dev;
+ apm->gdev = gdev;
+ init_waitqueue_head(&apm->wait);
+
+ idr_init(&apm->graph_idr);
+ idr_init(&apm->graph_info_idr);
+ idr_init(&apm->sub_graphs_idr);
+ idr_init(&apm->containers_idr);
+
+ idr_init(&apm->modules_idr);
+ spin_lock_init(&apm->lock);
+
+ q6apm_get_apm_state(apm);
+
+ devm_snd_soc_register_component(dev, &q6apm_audio_component, NULL, 0);
+
+ return of_platform_populate(dev->of_node, NULL, NULL, dev);
+}
+
+static int apm_exit(struct gpr_device *gdev)
+{
+ struct q6apm *apm = dev_get_drvdata(&gdev->dev);
+
+ kfree(apm);
+
+ return 0;
+}
+
+struct audioreach_module *q6apm_find_module_by_mid(struct q6apm_graph *graph,
+ uint32_t mid)
+{
+ struct audioreach_graph_info *info = graph->info;
+ struct q6apm *apm = graph->apm;
+
+ return __q6apm_find_module_by_mid(apm, info, mid);
+
+}
+
+struct audioreach_module *q6apm_find_module(struct q6apm *apm, uint32_t iid)
+{
+ struct audioreach_module *module;
+ unsigned long flags;
+
+ spin_lock_irqsave(&apm->lock, flags);
+ module = idr_find(&apm->modules_idr, iid);
+ spin_unlock_irqrestore(&apm->lock, flags);
+
+ return module;
+}
+
+static int apm_callback(struct gpr_resp_pkt *data, void *priv, int op)
+{
+ struct gpr_device *gdev = priv;
+ struct q6apm *apm = dev_get_drvdata(&gdev->dev);
+ struct device *dev = &gdev->dev;
+ struct gpr_ibasic_rsp_result_t *result;
+ struct gpr_hdr *hdr = &data->hdr;
+ int ret = -EINVAL;
+
+ result = data->payload;
+
+ switch (hdr->opcode) {
+ case APM_CMD_RSP_GET_SPF_STATE:
+ apm->result.opcode = hdr->opcode;
+ apm->result.status = 0;
+ wake_up(&apm->wait);
+ break;
+ case GPR_BASIC_RSP_RESULT:
+ switch (result->opcode) {
+ case APM_CMD_GRAPH_START:
+ case APM_CMD_GRAPH_OPEN:
+ case APM_CMD_GRAPH_PREPARE:
+ case APM_CMD_GRAPH_CLOSE:
+ case APM_CMD_GRAPH_FLUSH:
+ case APM_CMD_GRAPH_STOP:
+ case APM_CMD_SET_CFG:
+ apm->result.opcode = result->opcode;
+ apm->result.status = result->status;
+ if (result->status) {
+ dev_err(dev,
+ "Error (%d) Processing 0x%08x cmd\n",
+ result->status, result->opcode);
+ ret = -EINVAL;
+ } else {
+ ret = 0;
+ }
+ wake_up(&apm->wait);
+
+ }
+ break;
+ }
+
+ return ret;
+}
+
+static const struct of_device_id apm_device_id[] = {
+ { .compatible = "qcom,q6apm" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, apm_device_id);
+
+static struct gpr_driver apm_driver = {
+ .probe = apm_probe,
+ .remove = apm_exit,
+ .callback = apm_callback,
+ .driver = {
+ .name = "qcom-apm",
+ .of_match_table = of_match_ptr(apm_device_id),
+ },
+};
+
+module_gpr_driver(apm_driver);
+MODULE_DESCRIPTION("Audio Process Manager");
+MODULE_LICENSE("GPL v2");
diff --git a/sound/soc/qcom/audioreach/q6apm.h b/sound/soc/qcom/audioreach/q6apm.h
new file mode 100644
index 000000000000..3c8ecafae13b
--- /dev/null
+++ b/sound/soc/qcom/audioreach/q6apm.h
@@ -0,0 +1,171 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __Q6APM_H__
+#define __Q6APM_H__
+#include <linux/types.h>
+#include <linux/soc/qcom/gpr.h>
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/sched.h>
+#include <linux/of.h>
+#include <linux/delay.h>
+#include <sound/soc.h>
+#include <linux/of_platform.h>
+#include <linux/jiffies.h>
+#include <linux/soc/qcom/gpr.h>
+#include <dt-bindings/sound/qcom,q6apm.h>
+#include "audioreach.h"
+
+#define APM_PORT_MAX 127
+#define APM_PORT_MAX_AUDIO_CHAN_CNT 8
+#define PCM_CHANNEL_NULL 0
+#define PCM_CHANNEL_FL 1 /* Front left channel. */
+#define PCM_CHANNEL_FR 2 /* Front right channel. */
+#define PCM_CHANNEL_FC 3 /* Front center channel. */
+#define PCM_CHANNEL_LS 4 /* Left surround channel. */
+#define PCM_CHANNEL_RS 5 /* Right surround channel. */
+#define PCM_CHANNEL_LFE 6 /* Low frequency effect channel. */
+#define PCM_CHANNEL_CS 7 /* Center surround channel; Rear center ch */
+#define PCM_CHANNEL_LB 8 /* Left back channel; Rear left channel. */
+#define PCM_CHANNEL_RB 9 /* Right back channel; Rear right channel. */
+#define PCM_CHANNELS 10 /* Top surround channel. */
+
+#define NO_TIMESTAMP 0xFF00
+#define FORMAT_LINEAR_PCM 0x0000
+/* APM client callback events */
+#define CMD_EOS 0x0003
+#define APM_CLIENT_EVENT_CMD_EOS_DONE 0x1003
+#define CMD_CLOSE 0x0004
+#define APM_CLIENT_EVENT_CMD_CLOSE_DONE 0x1004
+#define APM_CLIENT_EVENT_CMD_RUN_DONE 0x1008
+#define APM_CLIENT_EVENT_DATA_WRITE_DONE 0x1009
+#define APM_CLIENT_EVENT_DATA_READ_DONE 0x100a
+#define MAX_SESSIONS 8
+
+struct q6apm {
+ struct device *dev;
+ struct gpr_port *port;
+ struct gpr_device *gdev;
+ /* For Graph OPEN/START/STOP/CLOSE operations */
+ wait_queue_head_t wait;
+ struct gpr_ibasic_rsp_result_t result;
+
+ struct mutex cmd_lock;
+ uint32_t state;
+
+ spinlock_t lock;
+ struct idr graph_idr;
+ struct idr graph_info_idr;
+ struct idr sub_graphs_idr;
+ struct idr containers_idr;
+ struct idr modules_idr;
+};
+
+struct audio_buffer {
+ phys_addr_t phys;
+ uint32_t size; /* size of buffer */
+};
+
+struct audioreach_graph_data {
+ struct audio_buffer *buf;
+ uint32_t num_periods;
+ uint32_t dsp_buf;
+ uint32_t mem_map_handle;
+};
+
+struct audioreach_graph {
+ struct audioreach_graph_info *info;
+ uint32_t id;
+ int state;
+ int start_count;
+ /* Cached Graph data */
+ void *graph;
+ struct kref refcount;
+ struct q6apm *apm;
+};
+
+typedef void (*q6apm_cb) (uint32_t opcode, uint32_t token,
+ void *payload, void *priv);
+struct q6apm_graph {
+ void *priv;
+ q6apm_cb cb;
+ uint32_t id;
+ struct device *dev;
+ struct q6apm *apm;
+ struct gpr_port *port;
+ struct audioreach_graph_data rx_data;
+ struct audioreach_graph_data tx_data;
+ struct gpr_ibasic_rsp_result_t result;
+ spinlock_t lock;
+ wait_queue_head_t cmd_wait;
+ struct mutex cmd_lock;
+ struct audioreach_graph *ar_graph;
+ struct audioreach_graph_info *info;
+};
+
+/* Graph Operations */
+struct q6apm_graph *q6apm_graph_open(struct device *dev, q6apm_cb cb,
+ void *priv, int graph_id);
+int q6apm_graph_close(struct q6apm_graph *graph);
+int q6apm_graph_prepare(struct q6apm_graph *graph);
+int q6apm_graph_start(struct q6apm_graph *graph);
+int q6apm_graph_stop(struct q6apm_graph *graph);
+int q6apm_graph_flush(struct q6apm_graph *graph);
+
+/* Media Format */
+int q6apm_graph_media_format_pcm(struct q6apm_graph *graph, int direction,
+ uint32_t rate, uint32_t channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample);
+
+int q6apm_graph_media_format_shmem(struct q6apm_graph *graph, int direction,
+ uint32_t rate, uint32_t channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample);
+
+/* read/write related */
+int q6apm_send_eos_nowait(struct q6apm_graph *graph);
+int q6apm_read(struct q6apm_graph *graph);
+int q6apm_write_async(struct q6apm_graph *graph, uint32_t len, uint32_t msw_ts,
+ uint32_t lsw_ts, uint32_t flags);
+
+/* Memory Map related */
+int q6apm_map_memory_regions(struct q6apm_graph *graph,
+ unsigned int dir,
+ phys_addr_t phys,
+ size_t bufsz, unsigned int bufcnt);
+int q6apm_unmap_memory_regions(struct q6apm_graph *graph,
+ unsigned int dir);
+/* Helpers */
+struct audioreach_module *q6apm_find_module(struct q6apm *apm, uint32_t iid);
+int q6apm_send_cmd(struct q6apm *apm, struct gpr_pkt *pkt);
+int q6apm_send_cmd_sync(struct q6apm *apm, struct gpr_pkt *pkt,
+ uint32_t rsp_opcode);
+
+/* Callback for graph specific */
+struct audioreach_module *q6apm_find_module_by_mid(struct q6apm_graph *graph,
+ uint32_t mid);
+
+
+struct q6apm_cdc_dma_cfg {
+ u16 sample_rate;
+ u16 bit_width;
+ u16 data_format;
+ u16 num_channels;
+ u16 active_channels_mask;
+};
+
+struct q6apm_port_config {
+ struct q6apm_cdc_dma_cfg dma_cfg;
+};
+
+void q6apm_set_fe_dai_ops(struct snd_soc_dai_driver *dai_drv);
+int q6apm_connect_sub_graphs(struct q6apm *apm, u32 src_sgid, u32 dst_sgid,
+ bool connect);
+bool q6apm_is_sub_graphs_connected(struct q6apm *apm, u32 src_sgid,
+ u32 dst_sgid);
+int q6apm_graph_get_rx_shmem_module_iid(struct q6apm_graph *graph);
+
+#endif /* __APM_GRAPH_ */
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* [RFC PATCH 05/13] ASoC: qcom: audioreach: add q6apm support
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
Add support to q6apm (Audio Process Manager) component which is
core Audioreach service running in the DSP.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
include/dt-bindings/sound/qcom,q6apm.h | 215 ++++++++
sound/soc/qcom/audioreach/Makefile | 2 +-
sound/soc/qcom/audioreach/audioreach.c | 252 +++++++++
sound/soc/qcom/audioreach/audioreach.h | 6 +
sound/soc/qcom/audioreach/q6apm.c | 695 +++++++++++++++++++++++++
sound/soc/qcom/audioreach/q6apm.h | 171 ++++++
6 files changed, 1340 insertions(+), 1 deletion(-)
create mode 100644 include/dt-bindings/sound/qcom,q6apm.h
create mode 100644 sound/soc/qcom/audioreach/q6apm.c
create mode 100644 sound/soc/qcom/audioreach/q6apm.h
diff --git a/include/dt-bindings/sound/qcom,q6apm.h b/include/dt-bindings/sound/qcom,q6apm.h
new file mode 100644
index 000000000000..38e3a426b15a
--- /dev/null
+++ b/include/dt-bindings/sound/qcom,q6apm.h
@@ -0,0 +1,215 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_Q6_APM_H__
+#define __DT_BINDINGS_Q6_APM_H__
+
+#define MSM_FRONTEND_DAI_MULTIMEDIA1 1
+#define MSM_FRONTEND_DAI_MULTIMEDIA2 2
+#define MSM_FRONTEND_DAI_MULTIMEDIA3 3
+#define MSM_FRONTEND_DAI_MULTIMEDIA4 4
+#define MSM_FRONTEND_DAI_MULTIMEDIA5 5
+#define MSM_FRONTEND_DAI_MULTIMEDIA6 6
+#define MSM_FRONTEND_DAI_MULTIMEDIA7 7
+#define MSM_FRONTEND_DAI_MULTIMEDIA8 8
+
+/* Audio Process Manager (APM) virtual ports IDs */
+#define HDMI_RX 1
+#define SLIMBUS_0_RX 2
+#define SLIMBUS_0_TX 3
+#define SLIMBUS_1_RX 4
+#define SLIMBUS_1_TX 5
+#define SLIMBUS_2_RX 6
+#define SLIMBUS_2_TX 7
+#define SLIMBUS_3_RX 8
+#define SLIMBUS_3_TX 9
+#define SLIMBUS_4_RX 10
+#define SLIMBUS_4_TX 11
+#define SLIMBUS_5_RX 12
+#define SLIMBUS_5_TX 13
+#define SLIMBUS_6_RX 14
+#define SLIMBUS_6_TX 15
+#define PRIMARY_MI2S_RX 16
+#define PRIMARY_MI2S_TX 17
+#define SECONDARY_MI2S_RX 18
+#define SECONDARY_MI2S_TX 19
+#define TERTIARY_MI2S_RX 20
+#define TERTIARY_MI2S_TX 21
+#define QUATERNARY_MI2S_RX 22
+#define QUATERNARY_MI2S_TX 23
+#define PRIMARY_TDM_RX_0 24
+#define PRIMARY_TDM_TX_0 25
+#define PRIMARY_TDM_RX_1 26
+#define PRIMARY_TDM_TX_1 27
+#define PRIMARY_TDM_RX_2 28
+#define PRIMARY_TDM_TX_2 29
+#define PRIMARY_TDM_RX_3 30
+#define PRIMARY_TDM_TX_3 31
+#define PRIMARY_TDM_RX_4 32
+#define PRIMARY_TDM_TX_4 33
+#define PRIMARY_TDM_RX_5 34
+#define PRIMARY_TDM_TX_5 35
+#define PRIMARY_TDM_RX_6 36
+#define PRIMARY_TDM_TX_6 37
+#define PRIMARY_TDM_RX_7 38
+#define PRIMARY_TDM_TX_7 39
+#define SECONDARY_TDM_RX_0 40
+#define SECONDARY_TDM_TX_0 41
+#define SECONDARY_TDM_RX_1 42
+#define SECONDARY_TDM_TX_1 43
+#define SECONDARY_TDM_RX_2 44
+#define SECONDARY_TDM_TX_2 45
+#define SECONDARY_TDM_RX_3 46
+#define SECONDARY_TDM_TX_3 47
+#define SECONDARY_TDM_RX_4 48
+#define SECONDARY_TDM_TX_4 49
+#define SECONDARY_TDM_RX_5 50
+#define SECONDARY_TDM_TX_5 51
+#define SECONDARY_TDM_RX_6 52
+#define SECONDARY_TDM_TX_6 53
+#define SECONDARY_TDM_RX_7 54
+#define SECONDARY_TDM_TX_7 55
+#define TERTIARY_TDM_RX_0 56
+#define TERTIARY_TDM_TX_0 57
+#define TERTIARY_TDM_RX_1 58
+#define TERTIARY_TDM_TX_1 59
+#define TERTIARY_TDM_RX_2 60
+#define TERTIARY_TDM_TX_2 61
+#define TERTIARY_TDM_RX_3 62
+#define TERTIARY_TDM_TX_3 63
+#define TERTIARY_TDM_RX_4 64
+#define TERTIARY_TDM_TX_4 65
+#define TERTIARY_TDM_RX_5 66
+#define TERTIARY_TDM_TX_5 67
+#define TERTIARY_TDM_RX_6 68
+#define TERTIARY_TDM_TX_6 69
+#define TERTIARY_TDM_RX_7 70
+#define TERTIARY_TDM_TX_7 71
+#define QUATERNARY_TDM_RX_0 72
+#define QUATERNARY_TDM_TX_0 73
+#define QUATERNARY_TDM_RX_1 74
+#define QUATERNARY_TDM_TX_1 75
+#define QUATERNARY_TDM_RX_2 76
+#define QUATERNARY_TDM_TX_2 77
+#define QUATERNARY_TDM_RX_3 78
+#define QUATERNARY_TDM_TX_3 79
+#define QUATERNARY_TDM_RX_4 80
+#define QUATERNARY_TDM_TX_4 81
+#define QUATERNARY_TDM_RX_5 82
+#define QUATERNARY_TDM_TX_5 83
+#define QUATERNARY_TDM_RX_6 84
+#define QUATERNARY_TDM_TX_6 85
+#define QUATERNARY_TDM_RX_7 86
+#define QUATERNARY_TDM_TX_7 87
+#define QUINARY_TDM_RX_0 88
+#define QUINARY_TDM_TX_0 89
+#define QUINARY_TDM_RX_1 90
+#define QUINARY_TDM_TX_1 91
+#define QUINARY_TDM_RX_2 92
+#define QUINARY_TDM_TX_2 93
+#define QUINARY_TDM_RX_3 94
+#define QUINARY_TDM_TX_3 95
+#define QUINARY_TDM_RX_4 96
+#define QUINARY_TDM_TX_4 97
+#define QUINARY_TDM_RX_5 98
+#define QUINARY_TDM_TX_5 99
+#define QUINARY_TDM_RX_6 100
+#define QUINARY_TDM_TX_6 101
+#define QUINARY_TDM_RX_7 102
+#define QUINARY_TDM_TX_7 103
+#define DISPLAY_PORT_RX 104
+#define WSA_CODEC_DMA_RX_0 105
+#define WSA_CODEC_DMA_TX_0 106
+#define WSA_CODEC_DMA_RX_1 107
+#define WSA_CODEC_DMA_TX_1 108
+#define WSA_CODEC_DMA_TX_2 109
+#define VA_CODEC_DMA_TX_0 110
+#define VA_CODEC_DMA_TX_1 111
+#define VA_CODEC_DMA_TX_2 112
+#define RX_CODEC_DMA_RX_0 113
+#define TX_CODEC_DMA_TX_0 114
+#define RX_CODEC_DMA_RX_1 115
+#define TX_CODEC_DMA_TX_1 116
+#define RX_CODEC_DMA_RX_2 117
+#define TX_CODEC_DMA_TX_2 118
+#define RX_CODEC_DMA_RX_3 119
+#define TX_CODEC_DMA_TX_3 120
+#define RX_CODEC_DMA_RX_4 121
+#define TX_CODEC_DMA_TX_4 122
+#define RX_CODEC_DMA_RX_5 123
+#define TX_CODEC_DMA_TX_5 124
+#define RX_CODEC_DMA_RX_6 125
+#define RX_CODEC_DMA_RX_7 126
+
+#define LPASS_CLK_ID_PRI_MI2S_IBIT 1
+#define LPASS_CLK_ID_PRI_MI2S_EBIT 2
+#define LPASS_CLK_ID_SEC_MI2S_IBIT 3
+#define LPASS_CLK_ID_SEC_MI2S_EBIT 4
+#define LPASS_CLK_ID_TER_MI2S_IBIT 5
+#define LPASS_CLK_ID_TER_MI2S_EBIT 6
+#define LPASS_CLK_ID_QUAD_MI2S_IBIT 7
+#define LPASS_CLK_ID_QUAD_MI2S_EBIT 8
+#define LPASS_CLK_ID_SPEAKER_I2S_IBIT 9
+#define LPASS_CLK_ID_SPEAKER_I2S_EBIT 10
+#define LPASS_CLK_ID_SPEAKER_I2S_OSR 11
+#define LPASS_CLK_ID_QUI_MI2S_IBIT 12
+#define LPASS_CLK_ID_QUI_MI2S_EBIT 13
+#define LPASS_CLK_ID_SEN_MI2S_IBIT 14
+#define LPASS_CLK_ID_SEN_MI2S_EBIT 15
+#define LPASS_CLK_ID_INT0_MI2S_IBIT 16
+#define LPASS_CLK_ID_INT1_MI2S_IBIT 17
+#define LPASS_CLK_ID_INT2_MI2S_IBIT 18
+#define LPASS_CLK_ID_INT3_MI2S_IBIT 19
+#define LPASS_CLK_ID_INT4_MI2S_IBIT 20
+#define LPASS_CLK_ID_INT5_MI2S_IBIT 21
+#define LPASS_CLK_ID_INT6_MI2S_IBIT 22
+#define LPASS_CLK_ID_QUI_MI2S_OSR 23
+#define LPASS_CLK_ID_PRI_PCM_IBIT 24
+#define LPASS_CLK_ID_PRI_PCM_EBIT 25
+#define LPASS_CLK_ID_SEC_PCM_IBIT 26
+#define LPASS_CLK_ID_SEC_PCM_EBIT 27
+#define LPASS_CLK_ID_TER_PCM_IBIT 28
+#define LPASS_CLK_ID_TER_PCM_EBIT 29
+#define LPASS_CLK_ID_QUAD_PCM_IBIT 30
+#define LPASS_CLK_ID_QUAD_PCM_EBIT 31
+#define LPASS_CLK_ID_QUIN_PCM_IBIT 32
+#define LPASS_CLK_ID_QUIN_PCM_EBIT 33
+#define LPASS_CLK_ID_QUI_PCM_OSR 34
+#define LPASS_CLK_ID_PRI_TDM_IBIT 35
+#define LPASS_CLK_ID_PRI_TDM_EBIT 36
+#define LPASS_CLK_ID_SEC_TDM_IBIT 37
+#define LPASS_CLK_ID_SEC_TDM_EBIT 38
+#define LPASS_CLK_ID_TER_TDM_IBIT 39
+#define LPASS_CLK_ID_TER_TDM_EBIT 40
+#define LPASS_CLK_ID_QUAD_TDM_IBIT 41
+#define LPASS_CLK_ID_QUAD_TDM_EBIT 42
+#define LPASS_CLK_ID_QUIN_TDM_IBIT 43
+#define LPASS_CLK_ID_QUIN_TDM_EBIT 44
+#define LPASS_CLK_ID_QUIN_TDM_OSR 45
+#define LPASS_CLK_ID_MCLK_1 46
+#define LPASS_CLK_ID_MCLK_2 47
+#define LPASS_CLK_ID_MCLK_3 48
+#define LPASS_CLK_ID_MCLK_4 49
+#define LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE 50
+#define LPASS_CLK_ID_INT_MCLK_0 51
+#define LPASS_CLK_ID_INT_MCLK_1 52
+#define LPASS_CLK_ID_MCLK_5 53
+#define LPASS_CLK_ID_WSA_CORE_MCLK 54
+#define LPASS_CLK_ID_WSA_CORE_NPL_MCLK 55
+#define LPASS_CLK_ID_VA_CORE_MCLK 56
+#define LPASS_CLK_ID_TX_CORE_MCLK 57
+#define LPASS_CLK_ID_TX_CORE_NPL_MCLK 58
+#define LPASS_CLK_ID_RX_CORE_MCLK 59
+#define LPASS_CLK_ID_RX_CORE_NPL_MCLK 60
+#define LPASS_CLK_ID_VA_CORE_2X_MCLK 61
+
+#define LPASS_HW_AVTIMER_VOTE 101
+#define LPASS_HW_MACRO_VOTE 102
+#define LPASS_HW_DCODEC_VOTE 103
+
+#define Q6APM_MAX_CLK_ID 104
+
+#define LPASS_CLK_ATTRIBUTE_INVALID 0x0
+#define LPASS_CLK_ATTRIBUTE_COUPLE_NO 0x1
+#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND 0x2
+#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR 0x3
+
+#endif /* __DT_BINDINGS_Q6_APM_H__ */
diff --git a/sound/soc/qcom/audioreach/Makefile b/sound/soc/qcom/audioreach/Makefile
index 575edbed29a2..d76afc51556b 100644
--- a/sound/soc/qcom/audioreach/Makefile
+++ b/sound/soc/qcom/audioreach/Makefile
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
-snd-ar-objs := audioreach.o
+snd-ar-objs := audioreach.o q6apm.o
obj-$(CONFIG_SND_SOC_QCOM_AUDIOREACH) += snd-ar.o
diff --git a/sound/soc/qcom/audioreach/audioreach.c b/sound/soc/qcom/audioreach/audioreach.c
index 617163473b1c..7291adb37d49 100644
--- a/sound/soc/qcom/audioreach/audioreach.c
+++ b/sound/soc/qcom/audioreach/audioreach.c
@@ -5,6 +5,7 @@
#include <linux/slab.h>
#include <linux/soc/qcom/gpr.h>
#include <dt-bindings/soc/qcom,gpr.h>
+#include "q6apm.h"
#include "audioreach.h"
/* SubGraph Config */
@@ -277,3 +278,254 @@ void *audioreach_alloc_apm_cmd_pkt(int pkt_size, uint32_t opcode,
APM_MODULE_INSTANCE_ID,
true);
}
+
+static void apm_populate_container_config(
+ struct apm_container_obj *cfg,
+ struct audioreach_container *cont)
+{
+
+ /* Container Config */
+ cfg->container_cfg.container_id = cont->container_id;
+ cfg->container_cfg.num_prop = 4;
+
+ /* Capablity list */
+ cfg->cap_data.prop_id = APM_CONTAINER_PROP_ID_CAPABILITY_LIST;
+ cfg->cap_data.prop_size = APM_CONTAINER_PROP_ID_CAPABILITY_SIZE;
+ cfg->num_capablity_id = 1;
+ cfg->capability_id = cont->capability_id;
+
+ /* Graph Position */
+ cfg->pos_data.prop_id = APM_CONTAINER_PROP_ID_GRAPH_POS;
+ cfg->pos_data.prop_size = sizeof(struct apm_cont_prop_id_graph_pos);
+ cfg->pos.graph_pos = cont->graph_pos;
+
+ /* Stack size */
+ cfg->stack_data.prop_id = APM_CONTAINER_PROP_ID_STACK_SIZE;
+ cfg->stack_data.prop_size = sizeof(struct
+ apm_cont_prop_id_stack_size);
+ cfg->stack.stack_size = cont->stack_size;
+
+ /* Proc domain */
+ cfg->domain_data.prop_id = APM_CONTAINER_PROP_ID_PROC_DOMAIN;
+ cfg->domain_data.prop_size = sizeof(struct
+ apm_cont_prop_id_domain);
+ cfg->domain.proc_domain = cont->proc_domain;
+}
+
+static void apm_populate_sub_graph_config(
+ struct apm_sub_graph_data *cfg,
+ struct audioreach_sub_graph *sg)
+{
+ cfg->sub_graph_cfg.sub_graph_id = sg->sub_graph_id;
+ cfg->sub_graph_cfg.num_sub_graph_prop = APM_SUB_GRAPH_CFG_NPROP;
+
+ /* Perf Mode */
+ cfg->perf_data.prop_id = APM_SUB_GRAPH_PROP_ID_PERF_MODE;
+ cfg->perf_data.prop_size = APM_SG_PROP_ID_PERF_MODE_SIZE;
+ cfg->perf.perf_mode = sg->perf_mode;
+
+ /* Direction */
+ cfg->dir_data.prop_id = APM_SUB_GRAPH_PROP_ID_DIRECTION;
+ cfg->dir_data.prop_size = APM_SG_PROP_ID_DIR_SIZE;
+ cfg->dir.direction = sg->direction;
+
+ /* Scenario ID */
+ cfg->sid_data.prop_id = APM_SUB_GRAPH_PROP_ID_SCENARIO_ID;
+ cfg->sid_data.prop_size = APM_SG_PROP_ID_SID_SIZE;
+ cfg->sid.scenario_id = sg->scenario_id;
+}
+
+static void apm_populate_connection_obj(struct apm_module_conn_obj *obj,
+ struct audioreach_module *module)
+{
+ obj->src_mod_inst_id = module->src_mod_inst_id;
+ obj->src_mod_op_port_id = module->src_mod_op_port_id;
+ obj->dst_mod_inst_id = module->instance_id;
+ obj->dst_mod_ip_port_id = module->in_port;
+}
+
+static void apm_populate_module_prop_obj(struct apm_mod_prop_obj *obj,
+ struct audioreach_module *module)
+{
+
+ obj->instance_id = module->instance_id;
+ obj->num_props = 1;
+ obj->prop_data_1.prop_id = APM_MODULE_PROP_ID_PORT_INFO;
+ obj->prop_data_1.prop_size = APM_MODULE_PROP_ID_PORT_INFO_SZ;
+ obj->prop_id_port.max_ip_port = module->max_ip_port;
+ obj->prop_id_port.max_op_port = module->max_op_port;
+}
+
+static void apm_populate_module_list_obj(struct apm_mod_list_obj *obj,
+ struct audioreach_container *container,
+ int sub_graph_id)
+{
+ struct audioreach_module *module;
+ int i;
+
+ obj->sub_graph_id = sub_graph_id;
+ obj->container_id = container->container_id;
+ obj->num_modules = container->num_modules;
+ i = 0;
+ list_for_each_entry(module, &container->modules_list, node) {
+ obj->mod_cfg[i].module_id = module->module_id;
+ obj->mod_cfg[i].instance_id = module->instance_id;
+ i++;
+ }
+}
+
+static void audioreach_populate_graph(struct apm_graph_open_params *open,
+ struct list_head *sg_list,
+ int num_sub_graphs)
+{
+ struct apm_sub_graph_params *sg_data = open->sg_data;
+ struct apm_container_params *c_data = open->cont_data;
+ struct apm_module_list_params *ml_data = open->mod_list_data;
+ struct apm_prop_list_params *mp_data = open->mod_prop_data;
+ struct apm_mod_conn_list_params *mc_data = open->mod_conn_list_data;
+ struct apm_container_obj *cobj;
+ struct audioreach_container *container;
+ struct audioreach_module *module;
+ struct apm_mod_list_obj *mlobj;
+ struct apm_mod_prop_obj *module_prop_obj;
+ struct apm_module_conn_obj *conn_obj;
+ int ncontainer = 0, nmodule = 0, nconn = 0;
+ struct audioreach_sub_graph *sg;
+ int i = 0;
+
+ mlobj = &ml_data->mod_list_obj[0];
+
+ list_for_each_entry(sg, sg_list, node) {
+ struct apm_sub_graph_data *sg_cfg = &sg_data->sg_cfg[i++];
+
+ apm_populate_sub_graph_config(sg_cfg, sg);
+
+ list_for_each_entry(container, &sg->container_list, node) {
+ cobj = &c_data->cont_obj[ncontainer];
+
+ apm_populate_container_config(cobj, container);
+ apm_populate_module_list_obj(mlobj, container,
+ sg->sub_graph_id);
+
+ list_for_each_entry(module, &container->modules_list, node) {
+ uint32_t src_mod_inst_id;
+
+ src_mod_inst_id = module->src_mod_inst_id;
+
+ module_prop_obj = &mp_data->mod_prop_obj[nmodule];
+ apm_populate_module_prop_obj(module_prop_obj,
+ module);
+
+ if (src_mod_inst_id /*&& dst_mod_inst_id*/) {
+ conn_obj = &mc_data->conn_obj[nconn];
+ apm_populate_connection_obj(conn_obj, module);
+ nconn++;
+ }
+
+ nmodule++;
+ }
+ mlobj = (void *) mlobj +
+ APM_MOD_LIST_OBJ_PSIZE(container->num_modules);
+
+ ncontainer++;
+ }
+ }
+}
+
+void *audioreach_alloc_graph_pkt(struct q6apm *apm,
+ struct list_head *sg_list,
+ int graph_id)
+{
+ void *p;
+ int payload_size, sg_sz, cont_sz, ml_sz, mp_sz, mc_sz;
+ struct gpr_pkt *pkt;
+ struct apm_graph_open_params params;
+ struct apm_module_param_data *param_data;
+ struct audioreach_container *container;
+ int num_containers = 0;
+ int num_modules = 0;
+ int num_modules_list;
+ int num_modules_per_list;
+ int num_connections = 0;
+ int num_sub_graphs = 0;
+ struct audioreach_sub_graph *sgs;
+ struct audioreach_module *module;
+
+ list_for_each_entry(sgs, sg_list, node) {
+ num_sub_graphs++;
+ list_for_each_entry(container, &sgs->container_list, node) {
+ num_containers++;
+ num_modules += container->num_modules;
+ list_for_each_entry(module, &container->modules_list, node) {
+ if (module->src_mod_inst_id)
+ num_connections++;
+ }
+ }
+ }
+
+ num_modules_list = num_containers;
+ num_modules_per_list = num_modules/num_containers;
+ sg_sz = APM_SUB_GRAPH_PSIZE(num_sub_graphs);
+ cont_sz = APM_CONTAINER_PSIZE(num_containers);
+ ml_sz = APM_MOD_LIST_PSIZE(num_modules_list, num_modules_per_list);
+ mp_sz = APM_MOD_PROP_PSIZE(num_modules);
+ mc_sz = APM_MOD_CONN_PSIZE(num_connections);
+
+ payload_size = sg_sz + cont_sz + ml_sz + mp_sz + mc_sz;
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_GRAPH_OPEN, 0);
+ if (IS_ERR(p))
+ return p;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ // SG
+ params.sg_data = p;
+ param_data = ¶ms.sg_data->param_data;
+ param_data->module_instance_id = APM_MODULE_INSTANCE_ID;
+ param_data->param_id = APM_PARAM_ID_SUB_GRAPH_CONFIG;
+ param_data->param_size = sg_sz - APM_MODULE_PARAM_DATA_SIZE;
+ params.sg_data->num_sub_graphs = num_sub_graphs;
+ p += sg_sz;
+
+ //CONT
+ params.cont_data = p;
+ param_data = ¶ms.cont_data->param_data;
+ param_data->module_instance_id = APM_MODULE_INSTANCE_ID;
+ param_data->param_id = APM_PARAM_ID_CONTAINER_CONFIG;
+ param_data->param_size = cont_sz - APM_MODULE_PARAM_DATA_SIZE;
+ params.cont_data->num_containers = num_containers;
+ p += cont_sz;
+
+ // ML List
+ params.mod_list_data = p;
+ param_data = ¶ms.mod_list_data->param_data;
+ param_data->module_instance_id = APM_MODULE_INSTANCE_ID;
+ param_data->param_id = APM_PARAM_ID_MODULE_LIST;
+ param_data->param_size = ml_sz - APM_MODULE_PARAM_DATA_SIZE;
+ params.mod_list_data->num_modules_list = num_sub_graphs;
+ p += ml_sz;
+
+ // MOD PROP
+ params.mod_prop_data = p;
+ param_data = ¶ms.mod_prop_data->param_data;
+ param_data->module_instance_id = APM_MODULE_INSTANCE_ID;
+ param_data->param_id = APM_PARAM_ID_MODULE_PROP;
+ param_data->param_size = mp_sz - APM_MODULE_PARAM_DATA_SIZE;
+ params.mod_prop_data->num_modules_prop_cfg = num_modules;
+ p += mp_sz;
+
+ // MOD CONN
+ params.mod_conn_list_data = p;
+ param_data = ¶ms.mod_conn_list_data->param_data;
+ param_data->module_instance_id = APM_MODULE_INSTANCE_ID;
+ param_data->param_id = APM_PARAM_ID_MODULE_CONN;
+ param_data->param_size = mc_sz - APM_MODULE_PARAM_DATA_SIZE;
+ params.mod_conn_list_data->num_connections = num_connections;
+ p += mc_sz;
+
+ audioreach_populate_graph(¶ms, sg_list, num_sub_graphs);
+
+ return pkt;
+}
+
diff --git a/sound/soc/qcom/audioreach/audioreach.h b/sound/soc/qcom/audioreach/audioreach.h
index 872e400dce6c..e5736fdda66b 100644
--- a/sound/soc/qcom/audioreach/audioreach.h
+++ b/sound/soc/qcom/audioreach/audioreach.h
@@ -5,6 +5,9 @@
#include <linux/types.h>
#include <linux/soc/qcom/gpr.h>
#include <sound/soc.h>
+struct q6apm;
+struct q6apm_graph;
+
/* Module IDs */
#define MODULE_ID_WR_SHARED_MEM_EP 0x07001000
@@ -621,4 +624,7 @@ void *audioreach_alloc_apm_pkt(int pkt_size, uint32_t opcode, uint32_t token,
uint32_t src_port);
void *audioreach_alloc_pkt(int pkt_size, uint32_t opcode, uint32_t token,
uint32_t src_port, uint32_t dest_port);
+void *audioreach_alloc_graph_pkt(struct q6apm *apm,
+ struct list_head *sg_list,
+ int graph_id);
#endif /* __AUDIOREACH_H__ */
diff --git a/sound/soc/qcom/audioreach/q6apm.c b/sound/soc/qcom/audioreach/q6apm.c
new file mode 100644
index 000000000000..d0deb69114b0
--- /dev/null
+++ b/sound/soc/qcom/audioreach/q6apm.c
@@ -0,0 +1,695 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2020, Linaro Limited
+
+#include <dt-bindings/soc/qcom,gpr.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/soc/qcom/gpr.h>
+#include <linux/wait.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/pcm.h>
+#include "audioreach.h"
+#include "q6apm.h"
+
+/* Graph Management */
+struct apm_graph_mgmt_cmd {
+ struct apm_module_param_data param_data;
+ uint32_t num_sub_graphs;
+ uint32_t sub_graph_id_list[0];
+} __packed;
+
+#define APM_GRAPH_MGMT_PSIZE(n) ALIGN(sizeof(struct apm_graph_mgmt_cmd) + \
+ n * sizeof(uint32_t), 8)
+
+int q6apm_send_cmd(struct q6apm *apm, struct gpr_pkt *pkt)
+{
+ int rc;
+
+ mutex_lock(&apm->cmd_lock);
+ rc = gpr_send_pkt(apm->gdev, pkt);
+ mutex_unlock(&apm->cmd_lock);
+
+ return rc;
+}
+
+int q6apm_send_cmd_sync(struct q6apm *apm, struct gpr_pkt *pkt,
+ uint32_t rsp_opcode)
+{
+ struct gpr_device *gdev = apm->gdev;
+ struct gpr_hdr *hdr = &pkt->hdr;
+ int rc;
+
+ mutex_lock(&apm->cmd_lock);
+ apm->result.opcode = 0;
+ apm->result.status = 0;
+
+ rc = gpr_send_pkt(apm->gdev, pkt);
+ if (rc < 0)
+ goto err;
+
+ if (rsp_opcode)
+ rc = wait_event_timeout(apm->wait,
+ (apm->result.opcode == hdr->opcode) ||
+ (apm->result.opcode == rsp_opcode),
+ 5 * HZ);
+ else
+ rc = wait_event_timeout(apm->wait,
+ (apm->result.opcode == hdr->opcode),
+ 5 * HZ);
+
+ if (!rc) {
+ dev_err(&gdev->dev, "CMD timeout for [%x] opcode\n",
+ hdr->opcode);
+ rc = -ETIMEDOUT;
+ } else if (apm->result.status > 0) {
+ dev_err(&gdev->dev, "DSP returned error[%x] %x\n", hdr->opcode,
+ apm->result.status);
+ rc = -EINVAL;
+ } else {
+ dev_err(&gdev->dev, "DSP returned [%x]\n",
+ apm->result.status);
+ rc = 0;
+ }
+
+err:
+ mutex_unlock(&apm->cmd_lock);
+ return rc;
+}
+
+static struct audioreach_graph *q6apm_get_audioreach_graph(struct q6apm *apm,
+ uint32_t graph_id)
+{
+ struct audioreach_graph *graph = NULL;
+ struct audioreach_graph_info *info;
+ unsigned long flags;
+
+ spin_lock_irqsave(&apm->lock, flags);
+ graph = idr_find(&apm->graph_idr, graph_id);
+ spin_unlock_irqrestore(&apm->lock, flags);
+
+ if (graph) {
+ kref_get(&graph->refcount);
+ return graph;
+ }
+
+ info = idr_find(&apm->graph_info_idr, graph_id);
+
+ if (!info)
+ return ERR_PTR(-ENODEV);
+
+ graph = kzalloc(sizeof(*graph), GFP_KERNEL);
+ if (!graph)
+ return ERR_PTR(-ENOMEM);
+
+ graph->apm = apm;
+ graph->info = info;
+ graph->id = graph_id;
+
+ /* Assuming Linear Graphs only for now! */
+ graph->graph = audioreach_alloc_graph_pkt(apm, &info->sg_list, graph_id);
+ if (IS_ERR(graph->graph))
+ return ERR_PTR(-ENOMEM);
+
+ spin_lock(&apm->lock);
+ idr_alloc(&apm->graph_idr, graph, graph_id,
+ graph_id + 1, GFP_ATOMIC);
+ spin_unlock(&apm->lock);
+
+ kref_init(&graph->refcount);
+
+ q6apm_send_cmd_sync(apm, graph->graph, 0);
+
+ return graph;
+}
+
+static int audioreach_graph_mgmt_cmd(struct audioreach_graph *graph,
+ uint32_t opcode)
+{
+ struct gpr_pkt *pkt;
+ void *p;
+ int i = 0, rc, payload_size;
+ struct q6apm *apm = graph->apm;
+ struct audioreach_graph_info *info = graph->info;
+ int num_sub_graphs = info->num_sub_graphs;
+ struct apm_graph_mgmt_cmd *mgmt_cmd;
+ struct apm_module_param_data *param_data;
+ struct audioreach_sub_graph *sg;
+
+ payload_size = APM_GRAPH_MGMT_PSIZE(num_sub_graphs);
+
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, opcode, 0);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ mgmt_cmd = p;
+ mgmt_cmd->num_sub_graphs = num_sub_graphs;
+
+ param_data = &mgmt_cmd->param_data;
+ param_data->module_instance_id = APM_MODULE_INSTANCE_ID;
+ param_data->param_id = APM_PARAM_ID_SUB_GRAPH_LIST;
+ param_data->param_size = payload_size - APM_MODULE_PARAM_DATA_SIZE;
+
+ list_for_each_entry(sg, &info->sg_list, node) {
+ mgmt_cmd->sub_graph_id_list[i++] = sg->sub_graph_id;
+ }
+
+ rc = q6apm_send_cmd_sync(apm, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static void q6apm_put_audioreach_graph(struct kref *ref)
+{
+ struct audioreach_graph *graph;
+ struct q6apm *apm;
+ unsigned long flags;
+
+ graph = container_of(ref, struct audioreach_graph, refcount);
+ apm = graph->apm;
+
+ audioreach_graph_mgmt_cmd(graph, APM_CMD_GRAPH_CLOSE);
+
+ spin_lock_irqsave(&apm->lock, flags);
+ graph = idr_remove(&apm->graph_idr, graph->id);
+ spin_unlock_irqrestore(&apm->lock, flags);
+
+ kfree(graph->graph);
+ kfree(graph);
+}
+
+static bool q6apm_get_apm_state(struct q6apm *apm)
+{
+ struct gpr_pkt *pkt;
+
+ pkt = audioreach_alloc_apm_cmd_pkt(0, APM_CMD_GET_SPF_STATE, 0);
+ if (IS_ERR(pkt))
+ return -ENOMEM;
+
+ q6apm_send_cmd_sync(apm, pkt, APM_CMD_RSP_GET_SPF_STATE);
+
+ kfree(pkt);
+
+ return !apm->state ? false : true;
+}
+
+static struct audioreach_module *__q6apm_find_module_by_mid(struct q6apm *apm,
+ struct audioreach_graph_info *info,
+ uint32_t mid)
+{
+ struct audioreach_sub_graph *sgs;
+ struct audioreach_container *container;
+ struct audioreach_module *module;
+
+ list_for_each_entry(sgs, &info->sg_list, node) {
+ list_for_each_entry(container, &sgs->container_list, node) {
+ list_for_each_entry(module, &container->modules_list, node) {
+ if (mid == module->module_id)
+ return module;
+ }
+ }
+ }
+
+ return NULL;
+}
+
+static struct audioreach_module *q6apm_graph_get_last_module(struct q6apm *apm,
+ u32 sgid)
+{
+ struct audioreach_sub_graph *sg;
+ struct audioreach_module *module;
+ struct audioreach_container *container;
+
+ spin_lock(&apm->lock);
+ sg = idr_find(&apm->sub_graphs_idr, sgid);
+ spin_unlock(&apm->lock);
+ if (!sg)
+ return NULL;
+
+ container = list_last_entry(&sg->container_list, struct audioreach_container, node);
+ module = list_last_entry(&container->modules_list, struct audioreach_module, node);
+
+ return module;
+}
+
+static struct audioreach_module *q6apm_graph_get_first_module(struct q6apm *apm,
+ u32 sgid)
+{
+ struct audioreach_sub_graph *sg;
+ struct audioreach_module *module;
+ struct audioreach_container *container;
+
+ spin_lock(&apm->lock);
+ sg = idr_find(&apm->sub_graphs_idr, sgid);
+ spin_unlock(&apm->lock);
+ if (!sg)
+ return NULL;
+
+ container = list_first_entry(&sg->container_list, struct audioreach_container, node);
+ module = list_first_entry(&container->modules_list, struct audioreach_module, node);
+
+ return module;
+}
+
+bool q6apm_is_sub_graphs_connected(struct q6apm *apm, u32 src_sgid, u32 dst_sgid)
+{
+ struct audioreach_module *module;
+ u32 iid;
+
+ module = q6apm_graph_get_last_module(apm, src_sgid);
+ if (!module)
+ return false;
+
+ iid = module->instance_id;
+ module = q6apm_graph_get_first_module(apm, dst_sgid);
+ if (!module)
+ return false;
+
+ if (module->src_mod_inst_id == iid)
+ return true;
+
+ return false;
+}
+
+int q6apm_connect_sub_graphs(struct q6apm *apm, u32 src_sgid,
+ u32 dst_sgid, bool connect)
+{
+
+ struct audioreach_module *module;
+ u32 iid;
+
+ if (connect) {
+ module = q6apm_graph_get_last_module(apm, src_sgid);
+ if (!module)
+ return -ENODEV;
+
+ iid = module->instance_id;
+ } else {
+ iid = 0;
+ }
+
+ module = q6apm_graph_get_first_module(apm, dst_sgid);
+ if (!module)
+ return ENODEV;
+
+ /* set src module in dst subgraph first module */
+ module->src_mod_inst_id = iid;
+
+ return 0;
+}
+
+int q6apm_graph_get_rx_shmem_module_iid(struct q6apm_graph *graph)
+{
+ struct audioreach_module *module;
+
+ module = q6apm_find_module_by_mid(graph, MODULE_ID_WR_SHARED_MEM_EP);
+ if (!module)
+ return -ENODEV;
+
+ return module->instance_id;
+
+}
+EXPORT_SYMBOL_GPL(q6apm_graph_get_rx_shmem_module_iid);
+
+static int graph_callback(struct gpr_resp_pkt *data, void *priv, int op)
+{
+ struct q6apm_graph *graph = priv;
+ struct device *dev = graph->dev;
+ struct gpr_hdr *hdr = &data->hdr;
+ struct gpr_ibasic_rsp_result_t *result;
+ int ret = -EINVAL;
+ uint32_t client_event = 0;
+
+ result = data->payload;
+
+ switch (hdr->opcode) {
+ case DATA_CMD_RSP_WR_SH_MEM_EP_DATA_BUFFER_DONE_V2:
+ client_event = APM_CLIENT_EVENT_DATA_WRITE_DONE;
+ if (graph) {
+ struct data_cmd_rsp_wr_sh_mem_ep_data_buffer_done_v2 *done;
+ phys_addr_t phys;
+ unsigned long flags;
+
+ spin_lock_irqsave(&graph->lock, flags);
+
+ done = data->payload;
+ phys = graph->rx_data.buf[hdr->token].phys;
+
+ if (lower_32_bits(phys) != done->buf_addr_lsw ||
+ upper_32_bits(phys) != done->buf_addr_msw) {
+ dev_err(dev, "WR BUFF Expected Token %d addr %pa\n", hdr->token, &phys);
+ ret = -EINVAL;
+ } else {
+ ret = 0;
+ graph->result.opcode = hdr->opcode;
+ graph->result.status = done->status;
+ }
+ spin_unlock_irqrestore(&graph->lock, flags);
+ } else {
+ dev_err(dev, "No SH Mem module found\n");
+ ret = -EINVAL;
+ }
+ if (graph->cb)
+ graph->cb(client_event, hdr->token, data->payload,
+ graph->priv);
+
+ break;
+ case APM_CMD_RSP_SHARED_MEM_MAP_REGIONS:
+ if (graph) {
+ struct apm_cmd_rsp_shared_mem_map_regions *rsp;
+
+ graph->result.opcode = hdr->opcode;
+ graph->result.status = 0;
+ rsp = data->payload;
+
+ if (hdr->token == SNDRV_PCM_STREAM_PLAYBACK)
+ graph->rx_data.mem_map_handle = rsp->mem_map_handle;
+ else
+ graph->tx_data.mem_map_handle = rsp->mem_map_handle;
+
+ wake_up(&graph->cmd_wait);
+ ret = 0;
+ }
+ break;
+ case DATA_CMD_RSP_RD_SH_MEM_EP_DATA_BUFFER_V2:
+ if (graph) {
+ struct data_cmd_rsp_rd_sh_mem_ep_data_buffer_done_v2 *done;
+ unsigned long flags;
+ phys_addr_t phys;
+
+ done = data->payload;
+ spin_lock_irqsave(&graph->lock, flags);
+ phys = graph->tx_data.buf[hdr->token].phys;
+ if (upper_32_bits(phys) != done->buf_addr_msw ||
+ lower_32_bits(phys) != done->buf_addr_lsw) {
+ dev_err(dev, "RD BUFF Expected addr %pa %08x-%08x\n",
+ &phys,
+ done->buf_addr_lsw,
+ done->buf_addr_msw);
+ ret = -EINVAL;
+ //goto done;
+ } else {
+ ret = 0;
+ }
+ spin_unlock_irqrestore(&graph->lock, flags);
+ client_event = APM_CLIENT_EVENT_DATA_READ_DONE;
+ wake_up(&graph->cmd_wait);
+
+ if (graph->cb)
+ graph->cb(client_event, hdr->token, data->payload,
+ graph->priv);
+ }
+
+ break;
+ case DATA_CMD_WR_SH_MEM_EP_EOS_RENDERED:
+ break;
+ case GPR_BASIC_RSP_RESULT:
+ switch (result->opcode) {
+ case APM_CMD_SHARED_MEM_UNMAP_REGIONS:
+ if (graph) {
+ graph->result.opcode = result->opcode;
+ graph->result.status = 0;
+ if (hdr->token == SNDRV_PCM_STREAM_PLAYBACK)
+ graph->rx_data.mem_map_handle = 0;
+ else
+ graph->tx_data.mem_map_handle = 0;
+
+ wake_up(&graph->cmd_wait);
+ ret = 0;
+ }
+
+ break;
+ case APM_CMD_SHARED_MEM_MAP_REGIONS:
+ case DATA_CMD_WR_SH_MEM_EP_MEDIA_FORMAT:
+ case APM_CMD_SET_CFG:
+ graph->result.opcode = result->opcode;
+ graph->result.status = result->status;
+ if (result->status) {
+ dev_err(dev,
+ "Error (%d) Processing 0x%08x cmd\n",
+ result->status, result->opcode);
+ ret = -EINVAL;
+ } else {
+ ret = 0;
+ }
+ wake_up(&graph->cmd_wait);
+ if (graph->cb)
+ graph->cb(client_event, hdr->token, data->payload,
+ graph->priv);
+
+ }
+ break;
+ }
+
+ return ret;
+}
+
+struct q6apm_graph *q6apm_graph_open(struct device *dev, q6apm_cb cb,
+ void *priv, int graph_id)
+{
+ struct q6apm *apm = dev_get_drvdata(dev->parent);
+ struct q6apm_graph *graph;
+ struct audioreach_graph *ar_graph;
+ int ret;
+
+ dev_err(dev, "%s :graph id %d\n",__func__, graph_id);
+ ar_graph = q6apm_get_audioreach_graph(apm, graph_id);
+ if (IS_ERR(ar_graph)) {
+ dev_err(dev, "No graph found with id %d\n", graph_id);
+ return ERR_CAST(ar_graph);
+ }
+
+ graph = kzalloc(sizeof(*graph), GFP_KERNEL);
+ if (!graph) {
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ graph->apm = apm;
+ graph->priv = priv;
+ graph->cb = cb;
+ graph->info = ar_graph->info;
+ graph->ar_graph = ar_graph;
+ graph->id = ar_graph->id;
+ graph->dev = dev;
+
+ spin_lock_init(&graph->lock);
+ init_waitqueue_head(&graph->cmd_wait);
+ mutex_init(&graph->cmd_lock);
+
+ graph->port = gpr_alloc_port(apm->gdev, dev, graph_callback, graph);
+ if (!graph->port) {
+ kfree(graph);
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ dev_dbg(dev, "%s: GRAPH-DEBUG Opening graph id %d with port id 0x%08x \n", __func__,
+ graph_id, graph->port->id);
+
+ return graph;
+err:
+ kref_put(&ar_graph->refcount, q6apm_put_audioreach_graph);
+ return ERR_PTR(ret);
+}
+
+int q6apm_graph_close(struct q6apm_graph *graph)
+{
+ struct audioreach_graph *ar_graph = graph->ar_graph;
+
+ gpr_free_port(graph->port);
+ graph->port = NULL;
+ kref_put(&ar_graph->refcount, q6apm_put_audioreach_graph);
+ kfree(graph);
+
+ return 0;
+}
+
+int q6apm_graph_prepare(struct q6apm_graph *graph)
+{
+ return audioreach_graph_mgmt_cmd(graph->ar_graph,
+ APM_CMD_GRAPH_PREPARE);
+}
+
+int q6apm_graph_start(struct q6apm_graph *graph)
+{
+ struct audioreach_graph *ar_graph = graph->ar_graph;
+ int ret = 0;
+
+ if (ar_graph->start_count == 0)
+ ret = audioreach_graph_mgmt_cmd(ar_graph, APM_CMD_GRAPH_START);
+
+ ar_graph->start_count++;
+
+ return ret;
+}
+
+int q6apm_graph_stop(struct q6apm_graph *graph)
+{
+ struct audioreach_graph *ar_graph = graph->ar_graph;
+
+ if (--ar_graph->start_count > 0)
+ return 0;
+
+ return audioreach_graph_mgmt_cmd(ar_graph, APM_CMD_GRAPH_STOP);
+}
+
+int q6apm_graph_flush(struct q6apm_graph *graph)
+{
+ return audioreach_graph_mgmt_cmd(graph->ar_graph, APM_CMD_GRAPH_FLUSH);
+}
+
+static int q6apm_audio_probe(struct snd_soc_component *component)
+{
+ return 0;
+}
+
+static void q6apm_audio_remove(struct snd_soc_component *component)
+{
+}
+
+#define APM_AUDIO_DRV_NAME "q6apm-audio"
+
+static const struct snd_soc_component_driver q6apm_audio_component = {
+ .name = APM_AUDIO_DRV_NAME,
+ .probe = q6apm_audio_probe,
+ .remove = q6apm_audio_remove,
+};
+
+static int apm_probe(struct gpr_device *gdev)
+{
+ struct device *dev = &gdev->dev;
+ struct q6apm *apm;
+
+ apm = devm_kzalloc(dev, sizeof(*apm), GFP_KERNEL);
+ if (!apm)
+ return -ENOMEM;
+
+ dev_set_drvdata(dev, apm);
+
+ mutex_init(&apm->cmd_lock);
+ apm->dev = dev;
+ apm->gdev = gdev;
+ init_waitqueue_head(&apm->wait);
+
+ idr_init(&apm->graph_idr);
+ idr_init(&apm->graph_info_idr);
+ idr_init(&apm->sub_graphs_idr);
+ idr_init(&apm->containers_idr);
+
+ idr_init(&apm->modules_idr);
+ spin_lock_init(&apm->lock);
+
+ q6apm_get_apm_state(apm);
+
+ devm_snd_soc_register_component(dev, &q6apm_audio_component, NULL, 0);
+
+ return of_platform_populate(dev->of_node, NULL, NULL, dev);
+}
+
+static int apm_exit(struct gpr_device *gdev)
+{
+ struct q6apm *apm = dev_get_drvdata(&gdev->dev);
+
+ kfree(apm);
+
+ return 0;
+}
+
+struct audioreach_module *q6apm_find_module_by_mid(struct q6apm_graph *graph,
+ uint32_t mid)
+{
+ struct audioreach_graph_info *info = graph->info;
+ struct q6apm *apm = graph->apm;
+
+ return __q6apm_find_module_by_mid(apm, info, mid);
+
+}
+
+struct audioreach_module *q6apm_find_module(struct q6apm *apm, uint32_t iid)
+{
+ struct audioreach_module *module;
+ unsigned long flags;
+
+ spin_lock_irqsave(&apm->lock, flags);
+ module = idr_find(&apm->modules_idr, iid);
+ spin_unlock_irqrestore(&apm->lock, flags);
+
+ return module;
+}
+
+static int apm_callback(struct gpr_resp_pkt *data, void *priv, int op)
+{
+ struct gpr_device *gdev = priv;
+ struct q6apm *apm = dev_get_drvdata(&gdev->dev);
+ struct device *dev = &gdev->dev;
+ struct gpr_ibasic_rsp_result_t *result;
+ struct gpr_hdr *hdr = &data->hdr;
+ int ret = -EINVAL;
+
+ result = data->payload;
+
+ switch (hdr->opcode) {
+ case APM_CMD_RSP_GET_SPF_STATE:
+ apm->result.opcode = hdr->opcode;
+ apm->result.status = 0;
+ wake_up(&apm->wait);
+ break;
+ case GPR_BASIC_RSP_RESULT:
+ switch (result->opcode) {
+ case APM_CMD_GRAPH_START:
+ case APM_CMD_GRAPH_OPEN:
+ case APM_CMD_GRAPH_PREPARE:
+ case APM_CMD_GRAPH_CLOSE:
+ case APM_CMD_GRAPH_FLUSH:
+ case APM_CMD_GRAPH_STOP:
+ case APM_CMD_SET_CFG:
+ apm->result.opcode = result->opcode;
+ apm->result.status = result->status;
+ if (result->status) {
+ dev_err(dev,
+ "Error (%d) Processing 0x%08x cmd\n",
+ result->status, result->opcode);
+ ret = -EINVAL;
+ } else {
+ ret = 0;
+ }
+ wake_up(&apm->wait);
+
+ }
+ break;
+ }
+
+ return ret;
+}
+
+static const struct of_device_id apm_device_id[] = {
+ { .compatible = "qcom,q6apm" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, apm_device_id);
+
+static struct gpr_driver apm_driver = {
+ .probe = apm_probe,
+ .remove = apm_exit,
+ .callback = apm_callback,
+ .driver = {
+ .name = "qcom-apm",
+ .of_match_table = of_match_ptr(apm_device_id),
+ },
+};
+
+module_gpr_driver(apm_driver);
+MODULE_DESCRIPTION("Audio Process Manager");
+MODULE_LICENSE("GPL v2");
diff --git a/sound/soc/qcom/audioreach/q6apm.h b/sound/soc/qcom/audioreach/q6apm.h
new file mode 100644
index 000000000000..3c8ecafae13b
--- /dev/null
+++ b/sound/soc/qcom/audioreach/q6apm.h
@@ -0,0 +1,171 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __Q6APM_H__
+#define __Q6APM_H__
+#include <linux/types.h>
+#include <linux/soc/qcom/gpr.h>
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/sched.h>
+#include <linux/of.h>
+#include <linux/delay.h>
+#include <sound/soc.h>
+#include <linux/of_platform.h>
+#include <linux/jiffies.h>
+#include <linux/soc/qcom/gpr.h>
+#include <dt-bindings/sound/qcom,q6apm.h>
+#include "audioreach.h"
+
+#define APM_PORT_MAX 127
+#define APM_PORT_MAX_AUDIO_CHAN_CNT 8
+#define PCM_CHANNEL_NULL 0
+#define PCM_CHANNEL_FL 1 /* Front left channel. */
+#define PCM_CHANNEL_FR 2 /* Front right channel. */
+#define PCM_CHANNEL_FC 3 /* Front center channel. */
+#define PCM_CHANNEL_LS 4 /* Left surround channel. */
+#define PCM_CHANNEL_RS 5 /* Right surround channel. */
+#define PCM_CHANNEL_LFE 6 /* Low frequency effect channel. */
+#define PCM_CHANNEL_CS 7 /* Center surround channel; Rear center ch */
+#define PCM_CHANNEL_LB 8 /* Left back channel; Rear left channel. */
+#define PCM_CHANNEL_RB 9 /* Right back channel; Rear right channel. */
+#define PCM_CHANNELS 10 /* Top surround channel. */
+
+#define NO_TIMESTAMP 0xFF00
+#define FORMAT_LINEAR_PCM 0x0000
+/* APM client callback events */
+#define CMD_EOS 0x0003
+#define APM_CLIENT_EVENT_CMD_EOS_DONE 0x1003
+#define CMD_CLOSE 0x0004
+#define APM_CLIENT_EVENT_CMD_CLOSE_DONE 0x1004
+#define APM_CLIENT_EVENT_CMD_RUN_DONE 0x1008
+#define APM_CLIENT_EVENT_DATA_WRITE_DONE 0x1009
+#define APM_CLIENT_EVENT_DATA_READ_DONE 0x100a
+#define MAX_SESSIONS 8
+
+struct q6apm {
+ struct device *dev;
+ struct gpr_port *port;
+ struct gpr_device *gdev;
+ /* For Graph OPEN/START/STOP/CLOSE operations */
+ wait_queue_head_t wait;
+ struct gpr_ibasic_rsp_result_t result;
+
+ struct mutex cmd_lock;
+ uint32_t state;
+
+ spinlock_t lock;
+ struct idr graph_idr;
+ struct idr graph_info_idr;
+ struct idr sub_graphs_idr;
+ struct idr containers_idr;
+ struct idr modules_idr;
+};
+
+struct audio_buffer {
+ phys_addr_t phys;
+ uint32_t size; /* size of buffer */
+};
+
+struct audioreach_graph_data {
+ struct audio_buffer *buf;
+ uint32_t num_periods;
+ uint32_t dsp_buf;
+ uint32_t mem_map_handle;
+};
+
+struct audioreach_graph {
+ struct audioreach_graph_info *info;
+ uint32_t id;
+ int state;
+ int start_count;
+ /* Cached Graph data */
+ void *graph;
+ struct kref refcount;
+ struct q6apm *apm;
+};
+
+typedef void (*q6apm_cb) (uint32_t opcode, uint32_t token,
+ void *payload, void *priv);
+struct q6apm_graph {
+ void *priv;
+ q6apm_cb cb;
+ uint32_t id;
+ struct device *dev;
+ struct q6apm *apm;
+ struct gpr_port *port;
+ struct audioreach_graph_data rx_data;
+ struct audioreach_graph_data tx_data;
+ struct gpr_ibasic_rsp_result_t result;
+ spinlock_t lock;
+ wait_queue_head_t cmd_wait;
+ struct mutex cmd_lock;
+ struct audioreach_graph *ar_graph;
+ struct audioreach_graph_info *info;
+};
+
+/* Graph Operations */
+struct q6apm_graph *q6apm_graph_open(struct device *dev, q6apm_cb cb,
+ void *priv, int graph_id);
+int q6apm_graph_close(struct q6apm_graph *graph);
+int q6apm_graph_prepare(struct q6apm_graph *graph);
+int q6apm_graph_start(struct q6apm_graph *graph);
+int q6apm_graph_stop(struct q6apm_graph *graph);
+int q6apm_graph_flush(struct q6apm_graph *graph);
+
+/* Media Format */
+int q6apm_graph_media_format_pcm(struct q6apm_graph *graph, int direction,
+ uint32_t rate, uint32_t channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample);
+
+int q6apm_graph_media_format_shmem(struct q6apm_graph *graph, int direction,
+ uint32_t rate, uint32_t channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample);
+
+/* read/write related */
+int q6apm_send_eos_nowait(struct q6apm_graph *graph);
+int q6apm_read(struct q6apm_graph *graph);
+int q6apm_write_async(struct q6apm_graph *graph, uint32_t len, uint32_t msw_ts,
+ uint32_t lsw_ts, uint32_t flags);
+
+/* Memory Map related */
+int q6apm_map_memory_regions(struct q6apm_graph *graph,
+ unsigned int dir,
+ phys_addr_t phys,
+ size_t bufsz, unsigned int bufcnt);
+int q6apm_unmap_memory_regions(struct q6apm_graph *graph,
+ unsigned int dir);
+/* Helpers */
+struct audioreach_module *q6apm_find_module(struct q6apm *apm, uint32_t iid);
+int q6apm_send_cmd(struct q6apm *apm, struct gpr_pkt *pkt);
+int q6apm_send_cmd_sync(struct q6apm *apm, struct gpr_pkt *pkt,
+ uint32_t rsp_opcode);
+
+/* Callback for graph specific */
+struct audioreach_module *q6apm_find_module_by_mid(struct q6apm_graph *graph,
+ uint32_t mid);
+
+
+struct q6apm_cdc_dma_cfg {
+ u16 sample_rate;
+ u16 bit_width;
+ u16 data_format;
+ u16 num_channels;
+ u16 active_channels_mask;
+};
+
+struct q6apm_port_config {
+ struct q6apm_cdc_dma_cfg dma_cfg;
+};
+
+void q6apm_set_fe_dai_ops(struct snd_soc_dai_driver *dai_drv);
+int q6apm_connect_sub_graphs(struct q6apm *apm, u32 src_sgid, u32 dst_sgid,
+ bool connect);
+bool q6apm_is_sub_graphs_connected(struct q6apm *apm, u32 src_sgid,
+ u32 dst_sgid);
+int q6apm_graph_get_rx_shmem_module_iid(struct q6apm_graph *graph);
+
+#endif /* __APM_GRAPH_ */
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: [RFC PATCH 05/13] ASoC: qcom: audioreach: add q6apm support
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-18 20:17 ` Rob Herring
-1 siblings, 0 replies; 42+ messages in thread
From: Rob Herring @ 2021-06-18 20:17 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: bjorn.andersson, broonie, plai, tiwai, devicetree, perex,
alsa-devel, linux-kernel, lgirdwood, bgoswami
On Mon, Jun 07, 2021 at 04:28:28PM +0100, Srinivas Kandagatla wrote:
> Add support to q6apm (Audio Process Manager) component which is
> core Audioreach service running in the DSP.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> include/dt-bindings/sound/qcom,q6apm.h | 215 ++++++++
This goes in the binding patch.
> sound/soc/qcom/audioreach/Makefile | 2 +-
> sound/soc/qcom/audioreach/audioreach.c | 252 +++++++++
> sound/soc/qcom/audioreach/audioreach.h | 6 +
> sound/soc/qcom/audioreach/q6apm.c | 695 +++++++++++++++++++++++++
> sound/soc/qcom/audioreach/q6apm.h | 171 ++++++
> 6 files changed, 1340 insertions(+), 1 deletion(-)
> create mode 100644 include/dt-bindings/sound/qcom,q6apm.h
> create mode 100644 sound/soc/qcom/audioreach/q6apm.c
> create mode 100644 sound/soc/qcom/audioreach/q6apm.h
>
> diff --git a/include/dt-bindings/sound/qcom,q6apm.h b/include/dt-bindings/sound/qcom,q6apm.h
> new file mode 100644
> index 000000000000..38e3a426b15a
> --- /dev/null
> +++ b/include/dt-bindings/sound/qcom,q6apm.h
> @@ -0,0 +1,215 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
Dual license.
> +#ifndef __DT_BINDINGS_Q6_APM_H__
> +#define __DT_BINDINGS_Q6_APM_H__
> +
> +#define MSM_FRONTEND_DAI_MULTIMEDIA1 1
> +#define MSM_FRONTEND_DAI_MULTIMEDIA2 2
> +#define MSM_FRONTEND_DAI_MULTIMEDIA3 3
> +#define MSM_FRONTEND_DAI_MULTIMEDIA4 4
> +#define MSM_FRONTEND_DAI_MULTIMEDIA5 5
> +#define MSM_FRONTEND_DAI_MULTIMEDIA6 6
> +#define MSM_FRONTEND_DAI_MULTIMEDIA7 7
> +#define MSM_FRONTEND_DAI_MULTIMEDIA8 8
> +
> +/* Audio Process Manager (APM) virtual ports IDs */
> +#define HDMI_RX 1
> +#define SLIMBUS_0_RX 2
> +#define SLIMBUS_0_TX 3
> +#define SLIMBUS_1_RX 4
> +#define SLIMBUS_1_TX 5
> +#define SLIMBUS_2_RX 6
> +#define SLIMBUS_2_TX 7
> +#define SLIMBUS_3_RX 8
> +#define SLIMBUS_3_TX 9
> +#define SLIMBUS_4_RX 10
> +#define SLIMBUS_4_TX 11
> +#define SLIMBUS_5_RX 12
> +#define SLIMBUS_5_TX 13
> +#define SLIMBUS_6_RX 14
> +#define SLIMBUS_6_TX 15
> +#define PRIMARY_MI2S_RX 16
> +#define PRIMARY_MI2S_TX 17
> +#define SECONDARY_MI2S_RX 18
> +#define SECONDARY_MI2S_TX 19
> +#define TERTIARY_MI2S_RX 20
> +#define TERTIARY_MI2S_TX 21
> +#define QUATERNARY_MI2S_RX 22
> +#define QUATERNARY_MI2S_TX 23
> +#define PRIMARY_TDM_RX_0 24
> +#define PRIMARY_TDM_TX_0 25
> +#define PRIMARY_TDM_RX_1 26
> +#define PRIMARY_TDM_TX_1 27
> +#define PRIMARY_TDM_RX_2 28
> +#define PRIMARY_TDM_TX_2 29
> +#define PRIMARY_TDM_RX_3 30
> +#define PRIMARY_TDM_TX_3 31
> +#define PRIMARY_TDM_RX_4 32
> +#define PRIMARY_TDM_TX_4 33
> +#define PRIMARY_TDM_RX_5 34
> +#define PRIMARY_TDM_TX_5 35
> +#define PRIMARY_TDM_RX_6 36
> +#define PRIMARY_TDM_TX_6 37
> +#define PRIMARY_TDM_RX_7 38
> +#define PRIMARY_TDM_TX_7 39
> +#define SECONDARY_TDM_RX_0 40
> +#define SECONDARY_TDM_TX_0 41
> +#define SECONDARY_TDM_RX_1 42
> +#define SECONDARY_TDM_TX_1 43
> +#define SECONDARY_TDM_RX_2 44
> +#define SECONDARY_TDM_TX_2 45
> +#define SECONDARY_TDM_RX_3 46
> +#define SECONDARY_TDM_TX_3 47
> +#define SECONDARY_TDM_RX_4 48
> +#define SECONDARY_TDM_TX_4 49
> +#define SECONDARY_TDM_RX_5 50
> +#define SECONDARY_TDM_TX_5 51
> +#define SECONDARY_TDM_RX_6 52
> +#define SECONDARY_TDM_TX_6 53
> +#define SECONDARY_TDM_RX_7 54
> +#define SECONDARY_TDM_TX_7 55
> +#define TERTIARY_TDM_RX_0 56
> +#define TERTIARY_TDM_TX_0 57
> +#define TERTIARY_TDM_RX_1 58
> +#define TERTIARY_TDM_TX_1 59
> +#define TERTIARY_TDM_RX_2 60
> +#define TERTIARY_TDM_TX_2 61
> +#define TERTIARY_TDM_RX_3 62
> +#define TERTIARY_TDM_TX_3 63
> +#define TERTIARY_TDM_RX_4 64
> +#define TERTIARY_TDM_TX_4 65
> +#define TERTIARY_TDM_RX_5 66
> +#define TERTIARY_TDM_TX_5 67
> +#define TERTIARY_TDM_RX_6 68
> +#define TERTIARY_TDM_TX_6 69
> +#define TERTIARY_TDM_RX_7 70
> +#define TERTIARY_TDM_TX_7 71
> +#define QUATERNARY_TDM_RX_0 72
> +#define QUATERNARY_TDM_TX_0 73
> +#define QUATERNARY_TDM_RX_1 74
> +#define QUATERNARY_TDM_TX_1 75
> +#define QUATERNARY_TDM_RX_2 76
> +#define QUATERNARY_TDM_TX_2 77
> +#define QUATERNARY_TDM_RX_3 78
> +#define QUATERNARY_TDM_TX_3 79
> +#define QUATERNARY_TDM_RX_4 80
> +#define QUATERNARY_TDM_TX_4 81
> +#define QUATERNARY_TDM_RX_5 82
> +#define QUATERNARY_TDM_TX_5 83
> +#define QUATERNARY_TDM_RX_6 84
> +#define QUATERNARY_TDM_TX_6 85
> +#define QUATERNARY_TDM_RX_7 86
> +#define QUATERNARY_TDM_TX_7 87
> +#define QUINARY_TDM_RX_0 88
> +#define QUINARY_TDM_TX_0 89
> +#define QUINARY_TDM_RX_1 90
> +#define QUINARY_TDM_TX_1 91
> +#define QUINARY_TDM_RX_2 92
> +#define QUINARY_TDM_TX_2 93
> +#define QUINARY_TDM_RX_3 94
> +#define QUINARY_TDM_TX_3 95
> +#define QUINARY_TDM_RX_4 96
> +#define QUINARY_TDM_TX_4 97
> +#define QUINARY_TDM_RX_5 98
> +#define QUINARY_TDM_TX_5 99
> +#define QUINARY_TDM_RX_6 100
> +#define QUINARY_TDM_TX_6 101
> +#define QUINARY_TDM_RX_7 102
> +#define QUINARY_TDM_TX_7 103
> +#define DISPLAY_PORT_RX 104
> +#define WSA_CODEC_DMA_RX_0 105
> +#define WSA_CODEC_DMA_TX_0 106
> +#define WSA_CODEC_DMA_RX_1 107
> +#define WSA_CODEC_DMA_TX_1 108
> +#define WSA_CODEC_DMA_TX_2 109
> +#define VA_CODEC_DMA_TX_0 110
> +#define VA_CODEC_DMA_TX_1 111
> +#define VA_CODEC_DMA_TX_2 112
> +#define RX_CODEC_DMA_RX_0 113
> +#define TX_CODEC_DMA_TX_0 114
> +#define RX_CODEC_DMA_RX_1 115
> +#define TX_CODEC_DMA_TX_1 116
> +#define RX_CODEC_DMA_RX_2 117
> +#define TX_CODEC_DMA_TX_2 118
> +#define RX_CODEC_DMA_RX_3 119
> +#define TX_CODEC_DMA_TX_3 120
> +#define RX_CODEC_DMA_RX_4 121
> +#define TX_CODEC_DMA_TX_4 122
> +#define RX_CODEC_DMA_RX_5 123
> +#define TX_CODEC_DMA_TX_5 124
> +#define RX_CODEC_DMA_RX_6 125
> +#define RX_CODEC_DMA_RX_7 126
> +
> +#define LPASS_CLK_ID_PRI_MI2S_IBIT 1
> +#define LPASS_CLK_ID_PRI_MI2S_EBIT 2
> +#define LPASS_CLK_ID_SEC_MI2S_IBIT 3
> +#define LPASS_CLK_ID_SEC_MI2S_EBIT 4
> +#define LPASS_CLK_ID_TER_MI2S_IBIT 5
> +#define LPASS_CLK_ID_TER_MI2S_EBIT 6
> +#define LPASS_CLK_ID_QUAD_MI2S_IBIT 7
> +#define LPASS_CLK_ID_QUAD_MI2S_EBIT 8
> +#define LPASS_CLK_ID_SPEAKER_I2S_IBIT 9
> +#define LPASS_CLK_ID_SPEAKER_I2S_EBIT 10
> +#define LPASS_CLK_ID_SPEAKER_I2S_OSR 11
> +#define LPASS_CLK_ID_QUI_MI2S_IBIT 12
> +#define LPASS_CLK_ID_QUI_MI2S_EBIT 13
> +#define LPASS_CLK_ID_SEN_MI2S_IBIT 14
> +#define LPASS_CLK_ID_SEN_MI2S_EBIT 15
> +#define LPASS_CLK_ID_INT0_MI2S_IBIT 16
> +#define LPASS_CLK_ID_INT1_MI2S_IBIT 17
> +#define LPASS_CLK_ID_INT2_MI2S_IBIT 18
> +#define LPASS_CLK_ID_INT3_MI2S_IBIT 19
> +#define LPASS_CLK_ID_INT4_MI2S_IBIT 20
> +#define LPASS_CLK_ID_INT5_MI2S_IBIT 21
> +#define LPASS_CLK_ID_INT6_MI2S_IBIT 22
> +#define LPASS_CLK_ID_QUI_MI2S_OSR 23
> +#define LPASS_CLK_ID_PRI_PCM_IBIT 24
> +#define LPASS_CLK_ID_PRI_PCM_EBIT 25
> +#define LPASS_CLK_ID_SEC_PCM_IBIT 26
> +#define LPASS_CLK_ID_SEC_PCM_EBIT 27
> +#define LPASS_CLK_ID_TER_PCM_IBIT 28
> +#define LPASS_CLK_ID_TER_PCM_EBIT 29
> +#define LPASS_CLK_ID_QUAD_PCM_IBIT 30
> +#define LPASS_CLK_ID_QUAD_PCM_EBIT 31
> +#define LPASS_CLK_ID_QUIN_PCM_IBIT 32
> +#define LPASS_CLK_ID_QUIN_PCM_EBIT 33
> +#define LPASS_CLK_ID_QUI_PCM_OSR 34
> +#define LPASS_CLK_ID_PRI_TDM_IBIT 35
> +#define LPASS_CLK_ID_PRI_TDM_EBIT 36
> +#define LPASS_CLK_ID_SEC_TDM_IBIT 37
> +#define LPASS_CLK_ID_SEC_TDM_EBIT 38
> +#define LPASS_CLK_ID_TER_TDM_IBIT 39
> +#define LPASS_CLK_ID_TER_TDM_EBIT 40
> +#define LPASS_CLK_ID_QUAD_TDM_IBIT 41
> +#define LPASS_CLK_ID_QUAD_TDM_EBIT 42
> +#define LPASS_CLK_ID_QUIN_TDM_IBIT 43
> +#define LPASS_CLK_ID_QUIN_TDM_EBIT 44
> +#define LPASS_CLK_ID_QUIN_TDM_OSR 45
> +#define LPASS_CLK_ID_MCLK_1 46
> +#define LPASS_CLK_ID_MCLK_2 47
> +#define LPASS_CLK_ID_MCLK_3 48
> +#define LPASS_CLK_ID_MCLK_4 49
> +#define LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE 50
> +#define LPASS_CLK_ID_INT_MCLK_0 51
> +#define LPASS_CLK_ID_INT_MCLK_1 52
> +#define LPASS_CLK_ID_MCLK_5 53
> +#define LPASS_CLK_ID_WSA_CORE_MCLK 54
> +#define LPASS_CLK_ID_WSA_CORE_NPL_MCLK 55
> +#define LPASS_CLK_ID_VA_CORE_MCLK 56
> +#define LPASS_CLK_ID_TX_CORE_MCLK 57
> +#define LPASS_CLK_ID_TX_CORE_NPL_MCLK 58
> +#define LPASS_CLK_ID_RX_CORE_MCLK 59
> +#define LPASS_CLK_ID_RX_CORE_NPL_MCLK 60
> +#define LPASS_CLK_ID_VA_CORE_2X_MCLK 61
> +
> +#define LPASS_HW_AVTIMER_VOTE 101
> +#define LPASS_HW_MACRO_VOTE 102
> +#define LPASS_HW_DCODEC_VOTE 103
> +
> +#define Q6APM_MAX_CLK_ID 104
> +
> +#define LPASS_CLK_ATTRIBUTE_INVALID 0x0
> +#define LPASS_CLK_ATTRIBUTE_COUPLE_NO 0x1
> +#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND 0x2
> +#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR 0x3
> +
> +#endif /* __DT_BINDINGS_Q6_APM_H__ */
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [RFC PATCH 05/13] ASoC: qcom: audioreach: add q6apm support
@ 2021-06-18 20:17 ` Rob Herring
0 siblings, 0 replies; 42+ messages in thread
From: Rob Herring @ 2021-06-18 20:17 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: devicetree, alsa-devel, bgoswami, lgirdwood, tiwai, plai,
linux-kernel, broonie, bjorn.andersson
On Mon, Jun 07, 2021 at 04:28:28PM +0100, Srinivas Kandagatla wrote:
> Add support to q6apm (Audio Process Manager) component which is
> core Audioreach service running in the DSP.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> include/dt-bindings/sound/qcom,q6apm.h | 215 ++++++++
This goes in the binding patch.
> sound/soc/qcom/audioreach/Makefile | 2 +-
> sound/soc/qcom/audioreach/audioreach.c | 252 +++++++++
> sound/soc/qcom/audioreach/audioreach.h | 6 +
> sound/soc/qcom/audioreach/q6apm.c | 695 +++++++++++++++++++++++++
> sound/soc/qcom/audioreach/q6apm.h | 171 ++++++
> 6 files changed, 1340 insertions(+), 1 deletion(-)
> create mode 100644 include/dt-bindings/sound/qcom,q6apm.h
> create mode 100644 sound/soc/qcom/audioreach/q6apm.c
> create mode 100644 sound/soc/qcom/audioreach/q6apm.h
>
> diff --git a/include/dt-bindings/sound/qcom,q6apm.h b/include/dt-bindings/sound/qcom,q6apm.h
> new file mode 100644
> index 000000000000..38e3a426b15a
> --- /dev/null
> +++ b/include/dt-bindings/sound/qcom,q6apm.h
> @@ -0,0 +1,215 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
Dual license.
> +#ifndef __DT_BINDINGS_Q6_APM_H__
> +#define __DT_BINDINGS_Q6_APM_H__
> +
> +#define MSM_FRONTEND_DAI_MULTIMEDIA1 1
> +#define MSM_FRONTEND_DAI_MULTIMEDIA2 2
> +#define MSM_FRONTEND_DAI_MULTIMEDIA3 3
> +#define MSM_FRONTEND_DAI_MULTIMEDIA4 4
> +#define MSM_FRONTEND_DAI_MULTIMEDIA5 5
> +#define MSM_FRONTEND_DAI_MULTIMEDIA6 6
> +#define MSM_FRONTEND_DAI_MULTIMEDIA7 7
> +#define MSM_FRONTEND_DAI_MULTIMEDIA8 8
> +
> +/* Audio Process Manager (APM) virtual ports IDs */
> +#define HDMI_RX 1
> +#define SLIMBUS_0_RX 2
> +#define SLIMBUS_0_TX 3
> +#define SLIMBUS_1_RX 4
> +#define SLIMBUS_1_TX 5
> +#define SLIMBUS_2_RX 6
> +#define SLIMBUS_2_TX 7
> +#define SLIMBUS_3_RX 8
> +#define SLIMBUS_3_TX 9
> +#define SLIMBUS_4_RX 10
> +#define SLIMBUS_4_TX 11
> +#define SLIMBUS_5_RX 12
> +#define SLIMBUS_5_TX 13
> +#define SLIMBUS_6_RX 14
> +#define SLIMBUS_6_TX 15
> +#define PRIMARY_MI2S_RX 16
> +#define PRIMARY_MI2S_TX 17
> +#define SECONDARY_MI2S_RX 18
> +#define SECONDARY_MI2S_TX 19
> +#define TERTIARY_MI2S_RX 20
> +#define TERTIARY_MI2S_TX 21
> +#define QUATERNARY_MI2S_RX 22
> +#define QUATERNARY_MI2S_TX 23
> +#define PRIMARY_TDM_RX_0 24
> +#define PRIMARY_TDM_TX_0 25
> +#define PRIMARY_TDM_RX_1 26
> +#define PRIMARY_TDM_TX_1 27
> +#define PRIMARY_TDM_RX_2 28
> +#define PRIMARY_TDM_TX_2 29
> +#define PRIMARY_TDM_RX_3 30
> +#define PRIMARY_TDM_TX_3 31
> +#define PRIMARY_TDM_RX_4 32
> +#define PRIMARY_TDM_TX_4 33
> +#define PRIMARY_TDM_RX_5 34
> +#define PRIMARY_TDM_TX_5 35
> +#define PRIMARY_TDM_RX_6 36
> +#define PRIMARY_TDM_TX_6 37
> +#define PRIMARY_TDM_RX_7 38
> +#define PRIMARY_TDM_TX_7 39
> +#define SECONDARY_TDM_RX_0 40
> +#define SECONDARY_TDM_TX_0 41
> +#define SECONDARY_TDM_RX_1 42
> +#define SECONDARY_TDM_TX_1 43
> +#define SECONDARY_TDM_RX_2 44
> +#define SECONDARY_TDM_TX_2 45
> +#define SECONDARY_TDM_RX_3 46
> +#define SECONDARY_TDM_TX_3 47
> +#define SECONDARY_TDM_RX_4 48
> +#define SECONDARY_TDM_TX_4 49
> +#define SECONDARY_TDM_RX_5 50
> +#define SECONDARY_TDM_TX_5 51
> +#define SECONDARY_TDM_RX_6 52
> +#define SECONDARY_TDM_TX_6 53
> +#define SECONDARY_TDM_RX_7 54
> +#define SECONDARY_TDM_TX_7 55
> +#define TERTIARY_TDM_RX_0 56
> +#define TERTIARY_TDM_TX_0 57
> +#define TERTIARY_TDM_RX_1 58
> +#define TERTIARY_TDM_TX_1 59
> +#define TERTIARY_TDM_RX_2 60
> +#define TERTIARY_TDM_TX_2 61
> +#define TERTIARY_TDM_RX_3 62
> +#define TERTIARY_TDM_TX_3 63
> +#define TERTIARY_TDM_RX_4 64
> +#define TERTIARY_TDM_TX_4 65
> +#define TERTIARY_TDM_RX_5 66
> +#define TERTIARY_TDM_TX_5 67
> +#define TERTIARY_TDM_RX_6 68
> +#define TERTIARY_TDM_TX_6 69
> +#define TERTIARY_TDM_RX_7 70
> +#define TERTIARY_TDM_TX_7 71
> +#define QUATERNARY_TDM_RX_0 72
> +#define QUATERNARY_TDM_TX_0 73
> +#define QUATERNARY_TDM_RX_1 74
> +#define QUATERNARY_TDM_TX_1 75
> +#define QUATERNARY_TDM_RX_2 76
> +#define QUATERNARY_TDM_TX_2 77
> +#define QUATERNARY_TDM_RX_3 78
> +#define QUATERNARY_TDM_TX_3 79
> +#define QUATERNARY_TDM_RX_4 80
> +#define QUATERNARY_TDM_TX_4 81
> +#define QUATERNARY_TDM_RX_5 82
> +#define QUATERNARY_TDM_TX_5 83
> +#define QUATERNARY_TDM_RX_6 84
> +#define QUATERNARY_TDM_TX_6 85
> +#define QUATERNARY_TDM_RX_7 86
> +#define QUATERNARY_TDM_TX_7 87
> +#define QUINARY_TDM_RX_0 88
> +#define QUINARY_TDM_TX_0 89
> +#define QUINARY_TDM_RX_1 90
> +#define QUINARY_TDM_TX_1 91
> +#define QUINARY_TDM_RX_2 92
> +#define QUINARY_TDM_TX_2 93
> +#define QUINARY_TDM_RX_3 94
> +#define QUINARY_TDM_TX_3 95
> +#define QUINARY_TDM_RX_4 96
> +#define QUINARY_TDM_TX_4 97
> +#define QUINARY_TDM_RX_5 98
> +#define QUINARY_TDM_TX_5 99
> +#define QUINARY_TDM_RX_6 100
> +#define QUINARY_TDM_TX_6 101
> +#define QUINARY_TDM_RX_7 102
> +#define QUINARY_TDM_TX_7 103
> +#define DISPLAY_PORT_RX 104
> +#define WSA_CODEC_DMA_RX_0 105
> +#define WSA_CODEC_DMA_TX_0 106
> +#define WSA_CODEC_DMA_RX_1 107
> +#define WSA_CODEC_DMA_TX_1 108
> +#define WSA_CODEC_DMA_TX_2 109
> +#define VA_CODEC_DMA_TX_0 110
> +#define VA_CODEC_DMA_TX_1 111
> +#define VA_CODEC_DMA_TX_2 112
> +#define RX_CODEC_DMA_RX_0 113
> +#define TX_CODEC_DMA_TX_0 114
> +#define RX_CODEC_DMA_RX_1 115
> +#define TX_CODEC_DMA_TX_1 116
> +#define RX_CODEC_DMA_RX_2 117
> +#define TX_CODEC_DMA_TX_2 118
> +#define RX_CODEC_DMA_RX_3 119
> +#define TX_CODEC_DMA_TX_3 120
> +#define RX_CODEC_DMA_RX_4 121
> +#define TX_CODEC_DMA_TX_4 122
> +#define RX_CODEC_DMA_RX_5 123
> +#define TX_CODEC_DMA_TX_5 124
> +#define RX_CODEC_DMA_RX_6 125
> +#define RX_CODEC_DMA_RX_7 126
> +
> +#define LPASS_CLK_ID_PRI_MI2S_IBIT 1
> +#define LPASS_CLK_ID_PRI_MI2S_EBIT 2
> +#define LPASS_CLK_ID_SEC_MI2S_IBIT 3
> +#define LPASS_CLK_ID_SEC_MI2S_EBIT 4
> +#define LPASS_CLK_ID_TER_MI2S_IBIT 5
> +#define LPASS_CLK_ID_TER_MI2S_EBIT 6
> +#define LPASS_CLK_ID_QUAD_MI2S_IBIT 7
> +#define LPASS_CLK_ID_QUAD_MI2S_EBIT 8
> +#define LPASS_CLK_ID_SPEAKER_I2S_IBIT 9
> +#define LPASS_CLK_ID_SPEAKER_I2S_EBIT 10
> +#define LPASS_CLK_ID_SPEAKER_I2S_OSR 11
> +#define LPASS_CLK_ID_QUI_MI2S_IBIT 12
> +#define LPASS_CLK_ID_QUI_MI2S_EBIT 13
> +#define LPASS_CLK_ID_SEN_MI2S_IBIT 14
> +#define LPASS_CLK_ID_SEN_MI2S_EBIT 15
> +#define LPASS_CLK_ID_INT0_MI2S_IBIT 16
> +#define LPASS_CLK_ID_INT1_MI2S_IBIT 17
> +#define LPASS_CLK_ID_INT2_MI2S_IBIT 18
> +#define LPASS_CLK_ID_INT3_MI2S_IBIT 19
> +#define LPASS_CLK_ID_INT4_MI2S_IBIT 20
> +#define LPASS_CLK_ID_INT5_MI2S_IBIT 21
> +#define LPASS_CLK_ID_INT6_MI2S_IBIT 22
> +#define LPASS_CLK_ID_QUI_MI2S_OSR 23
> +#define LPASS_CLK_ID_PRI_PCM_IBIT 24
> +#define LPASS_CLK_ID_PRI_PCM_EBIT 25
> +#define LPASS_CLK_ID_SEC_PCM_IBIT 26
> +#define LPASS_CLK_ID_SEC_PCM_EBIT 27
> +#define LPASS_CLK_ID_TER_PCM_IBIT 28
> +#define LPASS_CLK_ID_TER_PCM_EBIT 29
> +#define LPASS_CLK_ID_QUAD_PCM_IBIT 30
> +#define LPASS_CLK_ID_QUAD_PCM_EBIT 31
> +#define LPASS_CLK_ID_QUIN_PCM_IBIT 32
> +#define LPASS_CLK_ID_QUIN_PCM_EBIT 33
> +#define LPASS_CLK_ID_QUI_PCM_OSR 34
> +#define LPASS_CLK_ID_PRI_TDM_IBIT 35
> +#define LPASS_CLK_ID_PRI_TDM_EBIT 36
> +#define LPASS_CLK_ID_SEC_TDM_IBIT 37
> +#define LPASS_CLK_ID_SEC_TDM_EBIT 38
> +#define LPASS_CLK_ID_TER_TDM_IBIT 39
> +#define LPASS_CLK_ID_TER_TDM_EBIT 40
> +#define LPASS_CLK_ID_QUAD_TDM_IBIT 41
> +#define LPASS_CLK_ID_QUAD_TDM_EBIT 42
> +#define LPASS_CLK_ID_QUIN_TDM_IBIT 43
> +#define LPASS_CLK_ID_QUIN_TDM_EBIT 44
> +#define LPASS_CLK_ID_QUIN_TDM_OSR 45
> +#define LPASS_CLK_ID_MCLK_1 46
> +#define LPASS_CLK_ID_MCLK_2 47
> +#define LPASS_CLK_ID_MCLK_3 48
> +#define LPASS_CLK_ID_MCLK_4 49
> +#define LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE 50
> +#define LPASS_CLK_ID_INT_MCLK_0 51
> +#define LPASS_CLK_ID_INT_MCLK_1 52
> +#define LPASS_CLK_ID_MCLK_5 53
> +#define LPASS_CLK_ID_WSA_CORE_MCLK 54
> +#define LPASS_CLK_ID_WSA_CORE_NPL_MCLK 55
> +#define LPASS_CLK_ID_VA_CORE_MCLK 56
> +#define LPASS_CLK_ID_TX_CORE_MCLK 57
> +#define LPASS_CLK_ID_TX_CORE_NPL_MCLK 58
> +#define LPASS_CLK_ID_RX_CORE_MCLK 59
> +#define LPASS_CLK_ID_RX_CORE_NPL_MCLK 60
> +#define LPASS_CLK_ID_VA_CORE_2X_MCLK 61
> +
> +#define LPASS_HW_AVTIMER_VOTE 101
> +#define LPASS_HW_MACRO_VOTE 102
> +#define LPASS_HW_DCODEC_VOTE 103
> +
> +#define Q6APM_MAX_CLK_ID 104
> +
> +#define LPASS_CLK_ATTRIBUTE_INVALID 0x0
> +#define LPASS_CLK_ATTRIBUTE_COUPLE_NO 0x1
> +#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND 0x2
> +#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR 0x3
> +
> +#endif /* __DT_BINDINGS_Q6_APM_H__ */
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [RFC PATCH 05/13] ASoC: qcom: audioreach: add q6apm support
2021-06-18 20:17 ` Rob Herring
@ 2021-07-12 8:18 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-07-12 8:18 UTC (permalink / raw)
To: Rob Herring
Cc: bjorn.andersson, broonie, plai, tiwai, devicetree, perex,
alsa-devel, linux-kernel, lgirdwood, bgoswami
On 18/06/2021 21:17, Rob Herring wrote:
> On Mon, Jun 07, 2021 at 04:28:28PM +0100, Srinivas Kandagatla wrote:
>> Add support to q6apm (Audio Process Manager) component which is
>> core Audioreach service running in the DSP.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>> include/dt-bindings/sound/qcom,q6apm.h | 215 ++++++++
>
> This goes in the binding patch.
>
Thanks Rob for review,
Yes, I agree I will move this to bindings.
--srini
>> sound/soc/qcom/audioreach/Makefile | 2 +-
>> sound/soc/qcom/audioreach/audioreach.c | 252 +++++++++
>> sound/soc/qcom/audioreach/audioreach.h | 6 +
>> sound/soc/qcom/audioreach/q6apm.c | 695 +++++++++++++++++++++++++
>> sound/soc/qcom/audioreach/q6apm.h | 171 ++++++
>> 6 files changed, 1340 insertions(+), 1 deletion(-)
>> create mode 100644 include/dt-bindings/sound/qcom,q6apm.h
>> create mode 100644 sound/soc/qcom/audioreach/q6apm.c
>> create mode 100644 sound/soc/qcom/audioreach/q6apm.h
>>
>> diff --git a/include/dt-bindings/sound/qcom,q6apm.h b/include/dt-bindings/sound/qcom,q6apm.h
>> new file mode 100644
>> index 000000000000..38e3a426b15a
>> --- /dev/null
>> +++ b/include/dt-bindings/sound/qcom,q6apm.h
>> @@ -0,0 +1,215 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>
> Dual license.
>
>> +#ifndef __DT_BINDINGS_Q6_APM_H__
>> +#define __DT_BINDINGS_Q6_APM_H__
>> +
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA1 1
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA2 2
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA3 3
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA4 4
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA5 5
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA6 6
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA7 7
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA8 8
>> +
>> +/* Audio Process Manager (APM) virtual ports IDs */
>> +#define HDMI_RX 1
>> +#define SLIMBUS_0_RX 2
>> +#define SLIMBUS_0_TX 3
>> +#define SLIMBUS_1_RX 4
>> +#define SLIMBUS_1_TX 5
>> +#define SLIMBUS_2_RX 6
>> +#define SLIMBUS_2_TX 7
>> +#define SLIMBUS_3_RX 8
>> +#define SLIMBUS_3_TX 9
>> +#define SLIMBUS_4_RX 10
>> +#define SLIMBUS_4_TX 11
>> +#define SLIMBUS_5_RX 12
>> +#define SLIMBUS_5_TX 13
>> +#define SLIMBUS_6_RX 14
>> +#define SLIMBUS_6_TX 15
>> +#define PRIMARY_MI2S_RX 16
>> +#define PRIMARY_MI2S_TX 17
>> +#define SECONDARY_MI2S_RX 18
>> +#define SECONDARY_MI2S_TX 19
>> +#define TERTIARY_MI2S_RX 20
>> +#define TERTIARY_MI2S_TX 21
>> +#define QUATERNARY_MI2S_RX 22
>> +#define QUATERNARY_MI2S_TX 23
>> +#define PRIMARY_TDM_RX_0 24
>> +#define PRIMARY_TDM_TX_0 25
>> +#define PRIMARY_TDM_RX_1 26
>> +#define PRIMARY_TDM_TX_1 27
>> +#define PRIMARY_TDM_RX_2 28
>> +#define PRIMARY_TDM_TX_2 29
>> +#define PRIMARY_TDM_RX_3 30
>> +#define PRIMARY_TDM_TX_3 31
>> +#define PRIMARY_TDM_RX_4 32
>> +#define PRIMARY_TDM_TX_4 33
>> +#define PRIMARY_TDM_RX_5 34
>> +#define PRIMARY_TDM_TX_5 35
>> +#define PRIMARY_TDM_RX_6 36
>> +#define PRIMARY_TDM_TX_6 37
>> +#define PRIMARY_TDM_RX_7 38
>> +#define PRIMARY_TDM_TX_7 39
>> +#define SECONDARY_TDM_RX_0 40
>> +#define SECONDARY_TDM_TX_0 41
>> +#define SECONDARY_TDM_RX_1 42
>> +#define SECONDARY_TDM_TX_1 43
>> +#define SECONDARY_TDM_RX_2 44
>> +#define SECONDARY_TDM_TX_2 45
>> +#define SECONDARY_TDM_RX_3 46
>> +#define SECONDARY_TDM_TX_3 47
>> +#define SECONDARY_TDM_RX_4 48
>> +#define SECONDARY_TDM_TX_4 49
>> +#define SECONDARY_TDM_RX_5 50
>> +#define SECONDARY_TDM_TX_5 51
>> +#define SECONDARY_TDM_RX_6 52
>> +#define SECONDARY_TDM_TX_6 53
>> +#define SECONDARY_TDM_RX_7 54
>> +#define SECONDARY_TDM_TX_7 55
>> +#define TERTIARY_TDM_RX_0 56
>> +#define TERTIARY_TDM_TX_0 57
>> +#define TERTIARY_TDM_RX_1 58
>> +#define TERTIARY_TDM_TX_1 59
>> +#define TERTIARY_TDM_RX_2 60
>> +#define TERTIARY_TDM_TX_2 61
>> +#define TERTIARY_TDM_RX_3 62
>> +#define TERTIARY_TDM_TX_3 63
>> +#define TERTIARY_TDM_RX_4 64
>> +#define TERTIARY_TDM_TX_4 65
>> +#define TERTIARY_TDM_RX_5 66
>> +#define TERTIARY_TDM_TX_5 67
>> +#define TERTIARY_TDM_RX_6 68
>> +#define TERTIARY_TDM_TX_6 69
>> +#define TERTIARY_TDM_RX_7 70
>> +#define TERTIARY_TDM_TX_7 71
>> +#define QUATERNARY_TDM_RX_0 72
>> +#define QUATERNARY_TDM_TX_0 73
>> +#define QUATERNARY_TDM_RX_1 74
>> +#define QUATERNARY_TDM_TX_1 75
>> +#define QUATERNARY_TDM_RX_2 76
>> +#define QUATERNARY_TDM_TX_2 77
>> +#define QUATERNARY_TDM_RX_3 78
>> +#define QUATERNARY_TDM_TX_3 79
>> +#define QUATERNARY_TDM_RX_4 80
>> +#define QUATERNARY_TDM_TX_4 81
>> +#define QUATERNARY_TDM_RX_5 82
>> +#define QUATERNARY_TDM_TX_5 83
>> +#define QUATERNARY_TDM_RX_6 84
>> +#define QUATERNARY_TDM_TX_6 85
>> +#define QUATERNARY_TDM_RX_7 86
>> +#define QUATERNARY_TDM_TX_7 87
>> +#define QUINARY_TDM_RX_0 88
>> +#define QUINARY_TDM_TX_0 89
>> +#define QUINARY_TDM_RX_1 90
>> +#define QUINARY_TDM_TX_1 91
>> +#define QUINARY_TDM_RX_2 92
>> +#define QUINARY_TDM_TX_2 93
>> +#define QUINARY_TDM_RX_3 94
>> +#define QUINARY_TDM_TX_3 95
>> +#define QUINARY_TDM_RX_4 96
>> +#define QUINARY_TDM_TX_4 97
>> +#define QUINARY_TDM_RX_5 98
>> +#define QUINARY_TDM_TX_5 99
>> +#define QUINARY_TDM_RX_6 100
>> +#define QUINARY_TDM_TX_6 101
>> +#define QUINARY_TDM_RX_7 102
>> +#define QUINARY_TDM_TX_7 103
>> +#define DISPLAY_PORT_RX 104
>> +#define WSA_CODEC_DMA_RX_0 105
>> +#define WSA_CODEC_DMA_TX_0 106
>> +#define WSA_CODEC_DMA_RX_1 107
>> +#define WSA_CODEC_DMA_TX_1 108
>> +#define WSA_CODEC_DMA_TX_2 109
>> +#define VA_CODEC_DMA_TX_0 110
>> +#define VA_CODEC_DMA_TX_1 111
>> +#define VA_CODEC_DMA_TX_2 112
>> +#define RX_CODEC_DMA_RX_0 113
>> +#define TX_CODEC_DMA_TX_0 114
>> +#define RX_CODEC_DMA_RX_1 115
>> +#define TX_CODEC_DMA_TX_1 116
>> +#define RX_CODEC_DMA_RX_2 117
>> +#define TX_CODEC_DMA_TX_2 118
>> +#define RX_CODEC_DMA_RX_3 119
>> +#define TX_CODEC_DMA_TX_3 120
>> +#define RX_CODEC_DMA_RX_4 121
>> +#define TX_CODEC_DMA_TX_4 122
>> +#define RX_CODEC_DMA_RX_5 123
>> +#define TX_CODEC_DMA_TX_5 124
>> +#define RX_CODEC_DMA_RX_6 125
>> +#define RX_CODEC_DMA_RX_7 126
>> +
>> +#define LPASS_CLK_ID_PRI_MI2S_IBIT 1
>> +#define LPASS_CLK_ID_PRI_MI2S_EBIT 2
>> +#define LPASS_CLK_ID_SEC_MI2S_IBIT 3
>> +#define LPASS_CLK_ID_SEC_MI2S_EBIT 4
>> +#define LPASS_CLK_ID_TER_MI2S_IBIT 5
>> +#define LPASS_CLK_ID_TER_MI2S_EBIT 6
>> +#define LPASS_CLK_ID_QUAD_MI2S_IBIT 7
>> +#define LPASS_CLK_ID_QUAD_MI2S_EBIT 8
>> +#define LPASS_CLK_ID_SPEAKER_I2S_IBIT 9
>> +#define LPASS_CLK_ID_SPEAKER_I2S_EBIT 10
>> +#define LPASS_CLK_ID_SPEAKER_I2S_OSR 11
>> +#define LPASS_CLK_ID_QUI_MI2S_IBIT 12
>> +#define LPASS_CLK_ID_QUI_MI2S_EBIT 13
>> +#define LPASS_CLK_ID_SEN_MI2S_IBIT 14
>> +#define LPASS_CLK_ID_SEN_MI2S_EBIT 15
>> +#define LPASS_CLK_ID_INT0_MI2S_IBIT 16
>> +#define LPASS_CLK_ID_INT1_MI2S_IBIT 17
>> +#define LPASS_CLK_ID_INT2_MI2S_IBIT 18
>> +#define LPASS_CLK_ID_INT3_MI2S_IBIT 19
>> +#define LPASS_CLK_ID_INT4_MI2S_IBIT 20
>> +#define LPASS_CLK_ID_INT5_MI2S_IBIT 21
>> +#define LPASS_CLK_ID_INT6_MI2S_IBIT 22
>> +#define LPASS_CLK_ID_QUI_MI2S_OSR 23
>> +#define LPASS_CLK_ID_PRI_PCM_IBIT 24
>> +#define LPASS_CLK_ID_PRI_PCM_EBIT 25
>> +#define LPASS_CLK_ID_SEC_PCM_IBIT 26
>> +#define LPASS_CLK_ID_SEC_PCM_EBIT 27
>> +#define LPASS_CLK_ID_TER_PCM_IBIT 28
>> +#define LPASS_CLK_ID_TER_PCM_EBIT 29
>> +#define LPASS_CLK_ID_QUAD_PCM_IBIT 30
>> +#define LPASS_CLK_ID_QUAD_PCM_EBIT 31
>> +#define LPASS_CLK_ID_QUIN_PCM_IBIT 32
>> +#define LPASS_CLK_ID_QUIN_PCM_EBIT 33
>> +#define LPASS_CLK_ID_QUI_PCM_OSR 34
>> +#define LPASS_CLK_ID_PRI_TDM_IBIT 35
>> +#define LPASS_CLK_ID_PRI_TDM_EBIT 36
>> +#define LPASS_CLK_ID_SEC_TDM_IBIT 37
>> +#define LPASS_CLK_ID_SEC_TDM_EBIT 38
>> +#define LPASS_CLK_ID_TER_TDM_IBIT 39
>> +#define LPASS_CLK_ID_TER_TDM_EBIT 40
>> +#define LPASS_CLK_ID_QUAD_TDM_IBIT 41
>> +#define LPASS_CLK_ID_QUAD_TDM_EBIT 42
>> +#define LPASS_CLK_ID_QUIN_TDM_IBIT 43
>> +#define LPASS_CLK_ID_QUIN_TDM_EBIT 44
>> +#define LPASS_CLK_ID_QUIN_TDM_OSR 45
>> +#define LPASS_CLK_ID_MCLK_1 46
>> +#define LPASS_CLK_ID_MCLK_2 47
>> +#define LPASS_CLK_ID_MCLK_3 48
>> +#define LPASS_CLK_ID_MCLK_4 49
>> +#define LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE 50
>> +#define LPASS_CLK_ID_INT_MCLK_0 51
>> +#define LPASS_CLK_ID_INT_MCLK_1 52
>> +#define LPASS_CLK_ID_MCLK_5 53
>> +#define LPASS_CLK_ID_WSA_CORE_MCLK 54
>> +#define LPASS_CLK_ID_WSA_CORE_NPL_MCLK 55
>> +#define LPASS_CLK_ID_VA_CORE_MCLK 56
>> +#define LPASS_CLK_ID_TX_CORE_MCLK 57
>> +#define LPASS_CLK_ID_TX_CORE_NPL_MCLK 58
>> +#define LPASS_CLK_ID_RX_CORE_MCLK 59
>> +#define LPASS_CLK_ID_RX_CORE_NPL_MCLK 60
>> +#define LPASS_CLK_ID_VA_CORE_2X_MCLK 61
>> +
>> +#define LPASS_HW_AVTIMER_VOTE 101
>> +#define LPASS_HW_MACRO_VOTE 102
>> +#define LPASS_HW_DCODEC_VOTE 103
>> +
>> +#define Q6APM_MAX_CLK_ID 104
>> +
>> +#define LPASS_CLK_ATTRIBUTE_INVALID 0x0
>> +#define LPASS_CLK_ATTRIBUTE_COUPLE_NO 0x1
>> +#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND 0x2
>> +#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR 0x3
>> +
>> +#endif /* __DT_BINDINGS_Q6_APM_H__ */
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [RFC PATCH 05/13] ASoC: qcom: audioreach: add q6apm support
@ 2021-07-12 8:18 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-07-12 8:18 UTC (permalink / raw)
To: Rob Herring
Cc: devicetree, alsa-devel, bgoswami, lgirdwood, tiwai, plai,
linux-kernel, broonie, bjorn.andersson
On 18/06/2021 21:17, Rob Herring wrote:
> On Mon, Jun 07, 2021 at 04:28:28PM +0100, Srinivas Kandagatla wrote:
>> Add support to q6apm (Audio Process Manager) component which is
>> core Audioreach service running in the DSP.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>> include/dt-bindings/sound/qcom,q6apm.h | 215 ++++++++
>
> This goes in the binding patch.
>
Thanks Rob for review,
Yes, I agree I will move this to bindings.
--srini
>> sound/soc/qcom/audioreach/Makefile | 2 +-
>> sound/soc/qcom/audioreach/audioreach.c | 252 +++++++++
>> sound/soc/qcom/audioreach/audioreach.h | 6 +
>> sound/soc/qcom/audioreach/q6apm.c | 695 +++++++++++++++++++++++++
>> sound/soc/qcom/audioreach/q6apm.h | 171 ++++++
>> 6 files changed, 1340 insertions(+), 1 deletion(-)
>> create mode 100644 include/dt-bindings/sound/qcom,q6apm.h
>> create mode 100644 sound/soc/qcom/audioreach/q6apm.c
>> create mode 100644 sound/soc/qcom/audioreach/q6apm.h
>>
>> diff --git a/include/dt-bindings/sound/qcom,q6apm.h b/include/dt-bindings/sound/qcom,q6apm.h
>> new file mode 100644
>> index 000000000000..38e3a426b15a
>> --- /dev/null
>> +++ b/include/dt-bindings/sound/qcom,q6apm.h
>> @@ -0,0 +1,215 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>
> Dual license.
>
>> +#ifndef __DT_BINDINGS_Q6_APM_H__
>> +#define __DT_BINDINGS_Q6_APM_H__
>> +
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA1 1
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA2 2
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA3 3
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA4 4
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA5 5
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA6 6
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA7 7
>> +#define MSM_FRONTEND_DAI_MULTIMEDIA8 8
>> +
>> +/* Audio Process Manager (APM) virtual ports IDs */
>> +#define HDMI_RX 1
>> +#define SLIMBUS_0_RX 2
>> +#define SLIMBUS_0_TX 3
>> +#define SLIMBUS_1_RX 4
>> +#define SLIMBUS_1_TX 5
>> +#define SLIMBUS_2_RX 6
>> +#define SLIMBUS_2_TX 7
>> +#define SLIMBUS_3_RX 8
>> +#define SLIMBUS_3_TX 9
>> +#define SLIMBUS_4_RX 10
>> +#define SLIMBUS_4_TX 11
>> +#define SLIMBUS_5_RX 12
>> +#define SLIMBUS_5_TX 13
>> +#define SLIMBUS_6_RX 14
>> +#define SLIMBUS_6_TX 15
>> +#define PRIMARY_MI2S_RX 16
>> +#define PRIMARY_MI2S_TX 17
>> +#define SECONDARY_MI2S_RX 18
>> +#define SECONDARY_MI2S_TX 19
>> +#define TERTIARY_MI2S_RX 20
>> +#define TERTIARY_MI2S_TX 21
>> +#define QUATERNARY_MI2S_RX 22
>> +#define QUATERNARY_MI2S_TX 23
>> +#define PRIMARY_TDM_RX_0 24
>> +#define PRIMARY_TDM_TX_0 25
>> +#define PRIMARY_TDM_RX_1 26
>> +#define PRIMARY_TDM_TX_1 27
>> +#define PRIMARY_TDM_RX_2 28
>> +#define PRIMARY_TDM_TX_2 29
>> +#define PRIMARY_TDM_RX_3 30
>> +#define PRIMARY_TDM_TX_3 31
>> +#define PRIMARY_TDM_RX_4 32
>> +#define PRIMARY_TDM_TX_4 33
>> +#define PRIMARY_TDM_RX_5 34
>> +#define PRIMARY_TDM_TX_5 35
>> +#define PRIMARY_TDM_RX_6 36
>> +#define PRIMARY_TDM_TX_6 37
>> +#define PRIMARY_TDM_RX_7 38
>> +#define PRIMARY_TDM_TX_7 39
>> +#define SECONDARY_TDM_RX_0 40
>> +#define SECONDARY_TDM_TX_0 41
>> +#define SECONDARY_TDM_RX_1 42
>> +#define SECONDARY_TDM_TX_1 43
>> +#define SECONDARY_TDM_RX_2 44
>> +#define SECONDARY_TDM_TX_2 45
>> +#define SECONDARY_TDM_RX_3 46
>> +#define SECONDARY_TDM_TX_3 47
>> +#define SECONDARY_TDM_RX_4 48
>> +#define SECONDARY_TDM_TX_4 49
>> +#define SECONDARY_TDM_RX_5 50
>> +#define SECONDARY_TDM_TX_5 51
>> +#define SECONDARY_TDM_RX_6 52
>> +#define SECONDARY_TDM_TX_6 53
>> +#define SECONDARY_TDM_RX_7 54
>> +#define SECONDARY_TDM_TX_7 55
>> +#define TERTIARY_TDM_RX_0 56
>> +#define TERTIARY_TDM_TX_0 57
>> +#define TERTIARY_TDM_RX_1 58
>> +#define TERTIARY_TDM_TX_1 59
>> +#define TERTIARY_TDM_RX_2 60
>> +#define TERTIARY_TDM_TX_2 61
>> +#define TERTIARY_TDM_RX_3 62
>> +#define TERTIARY_TDM_TX_3 63
>> +#define TERTIARY_TDM_RX_4 64
>> +#define TERTIARY_TDM_TX_4 65
>> +#define TERTIARY_TDM_RX_5 66
>> +#define TERTIARY_TDM_TX_5 67
>> +#define TERTIARY_TDM_RX_6 68
>> +#define TERTIARY_TDM_TX_6 69
>> +#define TERTIARY_TDM_RX_7 70
>> +#define TERTIARY_TDM_TX_7 71
>> +#define QUATERNARY_TDM_RX_0 72
>> +#define QUATERNARY_TDM_TX_0 73
>> +#define QUATERNARY_TDM_RX_1 74
>> +#define QUATERNARY_TDM_TX_1 75
>> +#define QUATERNARY_TDM_RX_2 76
>> +#define QUATERNARY_TDM_TX_2 77
>> +#define QUATERNARY_TDM_RX_3 78
>> +#define QUATERNARY_TDM_TX_3 79
>> +#define QUATERNARY_TDM_RX_4 80
>> +#define QUATERNARY_TDM_TX_4 81
>> +#define QUATERNARY_TDM_RX_5 82
>> +#define QUATERNARY_TDM_TX_5 83
>> +#define QUATERNARY_TDM_RX_6 84
>> +#define QUATERNARY_TDM_TX_6 85
>> +#define QUATERNARY_TDM_RX_7 86
>> +#define QUATERNARY_TDM_TX_7 87
>> +#define QUINARY_TDM_RX_0 88
>> +#define QUINARY_TDM_TX_0 89
>> +#define QUINARY_TDM_RX_1 90
>> +#define QUINARY_TDM_TX_1 91
>> +#define QUINARY_TDM_RX_2 92
>> +#define QUINARY_TDM_TX_2 93
>> +#define QUINARY_TDM_RX_3 94
>> +#define QUINARY_TDM_TX_3 95
>> +#define QUINARY_TDM_RX_4 96
>> +#define QUINARY_TDM_TX_4 97
>> +#define QUINARY_TDM_RX_5 98
>> +#define QUINARY_TDM_TX_5 99
>> +#define QUINARY_TDM_RX_6 100
>> +#define QUINARY_TDM_TX_6 101
>> +#define QUINARY_TDM_RX_7 102
>> +#define QUINARY_TDM_TX_7 103
>> +#define DISPLAY_PORT_RX 104
>> +#define WSA_CODEC_DMA_RX_0 105
>> +#define WSA_CODEC_DMA_TX_0 106
>> +#define WSA_CODEC_DMA_RX_1 107
>> +#define WSA_CODEC_DMA_TX_1 108
>> +#define WSA_CODEC_DMA_TX_2 109
>> +#define VA_CODEC_DMA_TX_0 110
>> +#define VA_CODEC_DMA_TX_1 111
>> +#define VA_CODEC_DMA_TX_2 112
>> +#define RX_CODEC_DMA_RX_0 113
>> +#define TX_CODEC_DMA_TX_0 114
>> +#define RX_CODEC_DMA_RX_1 115
>> +#define TX_CODEC_DMA_TX_1 116
>> +#define RX_CODEC_DMA_RX_2 117
>> +#define TX_CODEC_DMA_TX_2 118
>> +#define RX_CODEC_DMA_RX_3 119
>> +#define TX_CODEC_DMA_TX_3 120
>> +#define RX_CODEC_DMA_RX_4 121
>> +#define TX_CODEC_DMA_TX_4 122
>> +#define RX_CODEC_DMA_RX_5 123
>> +#define TX_CODEC_DMA_TX_5 124
>> +#define RX_CODEC_DMA_RX_6 125
>> +#define RX_CODEC_DMA_RX_7 126
>> +
>> +#define LPASS_CLK_ID_PRI_MI2S_IBIT 1
>> +#define LPASS_CLK_ID_PRI_MI2S_EBIT 2
>> +#define LPASS_CLK_ID_SEC_MI2S_IBIT 3
>> +#define LPASS_CLK_ID_SEC_MI2S_EBIT 4
>> +#define LPASS_CLK_ID_TER_MI2S_IBIT 5
>> +#define LPASS_CLK_ID_TER_MI2S_EBIT 6
>> +#define LPASS_CLK_ID_QUAD_MI2S_IBIT 7
>> +#define LPASS_CLK_ID_QUAD_MI2S_EBIT 8
>> +#define LPASS_CLK_ID_SPEAKER_I2S_IBIT 9
>> +#define LPASS_CLK_ID_SPEAKER_I2S_EBIT 10
>> +#define LPASS_CLK_ID_SPEAKER_I2S_OSR 11
>> +#define LPASS_CLK_ID_QUI_MI2S_IBIT 12
>> +#define LPASS_CLK_ID_QUI_MI2S_EBIT 13
>> +#define LPASS_CLK_ID_SEN_MI2S_IBIT 14
>> +#define LPASS_CLK_ID_SEN_MI2S_EBIT 15
>> +#define LPASS_CLK_ID_INT0_MI2S_IBIT 16
>> +#define LPASS_CLK_ID_INT1_MI2S_IBIT 17
>> +#define LPASS_CLK_ID_INT2_MI2S_IBIT 18
>> +#define LPASS_CLK_ID_INT3_MI2S_IBIT 19
>> +#define LPASS_CLK_ID_INT4_MI2S_IBIT 20
>> +#define LPASS_CLK_ID_INT5_MI2S_IBIT 21
>> +#define LPASS_CLK_ID_INT6_MI2S_IBIT 22
>> +#define LPASS_CLK_ID_QUI_MI2S_OSR 23
>> +#define LPASS_CLK_ID_PRI_PCM_IBIT 24
>> +#define LPASS_CLK_ID_PRI_PCM_EBIT 25
>> +#define LPASS_CLK_ID_SEC_PCM_IBIT 26
>> +#define LPASS_CLK_ID_SEC_PCM_EBIT 27
>> +#define LPASS_CLK_ID_TER_PCM_IBIT 28
>> +#define LPASS_CLK_ID_TER_PCM_EBIT 29
>> +#define LPASS_CLK_ID_QUAD_PCM_IBIT 30
>> +#define LPASS_CLK_ID_QUAD_PCM_EBIT 31
>> +#define LPASS_CLK_ID_QUIN_PCM_IBIT 32
>> +#define LPASS_CLK_ID_QUIN_PCM_EBIT 33
>> +#define LPASS_CLK_ID_QUI_PCM_OSR 34
>> +#define LPASS_CLK_ID_PRI_TDM_IBIT 35
>> +#define LPASS_CLK_ID_PRI_TDM_EBIT 36
>> +#define LPASS_CLK_ID_SEC_TDM_IBIT 37
>> +#define LPASS_CLK_ID_SEC_TDM_EBIT 38
>> +#define LPASS_CLK_ID_TER_TDM_IBIT 39
>> +#define LPASS_CLK_ID_TER_TDM_EBIT 40
>> +#define LPASS_CLK_ID_QUAD_TDM_IBIT 41
>> +#define LPASS_CLK_ID_QUAD_TDM_EBIT 42
>> +#define LPASS_CLK_ID_QUIN_TDM_IBIT 43
>> +#define LPASS_CLK_ID_QUIN_TDM_EBIT 44
>> +#define LPASS_CLK_ID_QUIN_TDM_OSR 45
>> +#define LPASS_CLK_ID_MCLK_1 46
>> +#define LPASS_CLK_ID_MCLK_2 47
>> +#define LPASS_CLK_ID_MCLK_3 48
>> +#define LPASS_CLK_ID_MCLK_4 49
>> +#define LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE 50
>> +#define LPASS_CLK_ID_INT_MCLK_0 51
>> +#define LPASS_CLK_ID_INT_MCLK_1 52
>> +#define LPASS_CLK_ID_MCLK_5 53
>> +#define LPASS_CLK_ID_WSA_CORE_MCLK 54
>> +#define LPASS_CLK_ID_WSA_CORE_NPL_MCLK 55
>> +#define LPASS_CLK_ID_VA_CORE_MCLK 56
>> +#define LPASS_CLK_ID_TX_CORE_MCLK 57
>> +#define LPASS_CLK_ID_TX_CORE_NPL_MCLK 58
>> +#define LPASS_CLK_ID_RX_CORE_MCLK 59
>> +#define LPASS_CLK_ID_RX_CORE_NPL_MCLK 60
>> +#define LPASS_CLK_ID_VA_CORE_2X_MCLK 61
>> +
>> +#define LPASS_HW_AVTIMER_VOTE 101
>> +#define LPASS_HW_MACRO_VOTE 102
>> +#define LPASS_HW_DCODEC_VOTE 103
>> +
>> +#define Q6APM_MAX_CLK_ID 104
>> +
>> +#define LPASS_CLK_ATTRIBUTE_INVALID 0x0
>> +#define LPASS_CLK_ATTRIBUTE_COUPLE_NO 0x1
>> +#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND 0x2
>> +#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR 0x3
>> +
>> +#endif /* __DT_BINDINGS_Q6_APM_H__ */
^ permalink raw reply [flat|nested] 42+ messages in thread
* [RFC PATCH 06/13] ASoC: qcom: audioreach: add module configuration command helpers
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-07 15:28 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: plai, tiwai, robh, devicetree, perex, alsa-devel, linux-kernel,
lgirdwood, bgoswami, Srinivas Kandagatla
Audioreach module configuration helpers, which will be used by the q6apm-dai driver.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
sound/soc/qcom/audioreach/audioreach.c | 551 +++++++++++++++++++++++++
sound/soc/qcom/audioreach/audioreach.h | 16 +
sound/soc/qcom/audioreach/q6apm.c | 265 ++++++++++++
3 files changed, 832 insertions(+)
diff --git a/sound/soc/qcom/audioreach/audioreach.c b/sound/soc/qcom/audioreach/audioreach.c
index 7291adb37d49..eecea02f93bd 100644
--- a/sound/soc/qcom/audioreach/audioreach.c
+++ b/sound/soc/qcom/audioreach/audioreach.c
@@ -529,3 +529,554 @@ void *audioreach_alloc_graph_pkt(struct q6apm *apm,
return pkt;
}
+int audioreach_graph_send_cmd_sync(struct q6apm_graph *graph,
+ struct gpr_pkt *pkt,
+ uint32_t rsp_opcode)
+{
+
+ struct device *dev = graph->dev;
+ struct gpr_hdr *hdr = &pkt->hdr;
+ int rc;
+
+ mutex_lock(&graph->cmd_lock);
+ graph->result.opcode = 0;
+ graph->result.status = 0;
+
+ rc = gpr_send_port_pkt(graph->port, pkt);
+ if (rc < 0)
+ goto err;
+
+ if (rsp_opcode)
+ rc = wait_event_timeout(graph->cmd_wait,
+ (graph->result.opcode == hdr->opcode) ||
+ (graph->result.opcode == rsp_opcode),
+ 5 * HZ);
+ else
+ rc = wait_event_timeout(graph->cmd_wait,
+ (graph->result.opcode == hdr->opcode),
+ 5 * HZ);
+
+ if (!rc) {
+ dev_err(dev, "CMD timeout for [%x] opcode\n", hdr->opcode);
+ rc = -ETIMEDOUT;
+ } else if (graph->result.status > 0) {
+ dev_err(dev, "DSP returned error[%x] %x\n", hdr->opcode,
+ graph->result.status);
+ rc = -EINVAL;
+ } else {
+ dev_err(dev, "DSP returned [%x]\n", graph->result.status);
+ rc = 0;
+ }
+
+err:
+ mutex_unlock(&graph->cmd_lock);
+ return rc;
+}
+EXPORT_SYMBOL_GPL(audioreach_graph_send_cmd_sync);
+
+static int audioreach_codec_dma_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module,
+ int direction, uint32_t rate,
+ uint32_t num_channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ struct apm_module_param_data *param_data;
+ struct apm_codec_dma_module_intf_cfg *intf_cfg;
+ struct apm_module_hw_ep_mf_cfg *hw_cfg;
+ struct apm_module_frame_size_factor_cfg *fs_cfg;
+ struct apm_module_hw_ep_power_mode_cfg *pm_cfg;
+ int ic_sz, ep_sz, fs_sz, pm_sz, dl_sz;
+ int rc, payload_size;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ ic_sz = APM_CDMA_INTF_CFG_PSIZE;
+ ep_sz = APM_HW_EP_CFG_PSIZE;
+ fs_sz = APM_FS_CFG_PSIZE;
+ pm_sz = APM_HW_EP_PMODE_CFG_PSIZE;
+ dl_sz = 0;
+
+ payload_size = ic_sz + ep_sz + fs_sz + pm_sz + dl_sz;
+
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_SET_CFG, 0);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ hw_cfg = p;
+ param_data = &hw_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_HW_EP_MF_CFG;
+ param_data->param_size = ep_sz - APM_MODULE_PARAM_DATA_SIZE;
+
+ hw_cfg->mf.sample_rate = rate;
+ hw_cfg->mf.bit_width = bits_per_sample;
+ hw_cfg->mf.num_channels = num_channels;
+ hw_cfg->mf.data_format = module->data_format;
+ p += ep_sz;
+
+ fs_cfg = p;
+ param_data = &fs_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_HW_EP_FRAME_SIZE_FACTOR;
+ param_data->param_size = fs_sz - APM_MODULE_PARAM_DATA_SIZE;
+ fs_cfg->frame_size_factor = 1;
+ p += fs_sz;
+
+ intf_cfg = p;
+ param_data = &intf_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_CODEC_DMA_INTF_CFG;
+ param_data->param_size = ic_sz - APM_MODULE_PARAM_DATA_SIZE;
+
+ intf_cfg->cfg.lpaif_type = module->hw_interface_type;
+ intf_cfg->cfg.intf_index = module->hw_interface_idx;
+ intf_cfg->cfg.active_channels_mask = (1 << num_channels) - 1;
+ p += ic_sz;
+
+ pm_cfg = p;
+ param_data = &pm_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_HW_EP_POWER_MODE_CFG;
+ param_data->param_size = pm_sz - APM_MODULE_PARAM_DATA_SIZE;
+ pm_cfg->power_mode.power_mode = 0;
+
+ rc = q6apm_send_cmd_sync(graph->apm, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int audioreach_i2s_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module,
+ int direction, uint32_t rate,
+ uint32_t num_channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ struct apm_module_frame_size_factor_cfg *fs_cfg;
+ struct apm_module_param_data *param_data;
+ struct apm_i2s_module_intf_cfg *intf_cfg;
+ struct apm_module_hw_ep_mf_cfg *hw_cfg;
+ int ic_sz, ep_sz, fs_sz;
+ int rc, payload_size;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ ic_sz = APM_I2S_INTF_CFG_PSIZE;
+ ep_sz = APM_HW_EP_CFG_PSIZE;
+ fs_sz = APM_FS_CFG_PSIZE;
+
+ payload_size = ic_sz + ep_sz + fs_sz;
+
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_SET_CFG, 0);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+ intf_cfg = p;
+
+ param_data = &intf_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_I2S_INTF_CFG;
+ param_data->param_size = ic_sz - APM_MODULE_PARAM_DATA_SIZE;
+
+ intf_cfg->cfg.intf_idx = module->hw_interface_idx;
+ intf_cfg->cfg.sd_line_idx = module->sd_line_idx;
+ intf_cfg->cfg.ws_src = module->ws_src;
+
+ p += ic_sz;
+ hw_cfg = p;
+ param_data = &hw_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_HW_EP_MF_CFG;
+ param_data->param_size = ep_sz - APM_MODULE_PARAM_DATA_SIZE;
+
+ hw_cfg->mf.sample_rate = rate;
+ hw_cfg->mf.bit_width = bits_per_sample;
+ hw_cfg->mf.num_channels = num_channels;
+ hw_cfg->mf.data_format = module->data_format;
+
+ p += ep_sz;
+ fs_cfg = p;
+ param_data = &fs_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_HW_EP_FRAME_SIZE_FACTOR;
+ param_data->param_size = fs_sz - APM_MODULE_PARAM_DATA_SIZE;
+ fs_cfg->frame_size_factor = 1;
+
+ rc = q6apm_send_cmd_sync(graph->apm, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int audioreach_logging_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module)
+{
+ struct apm_module_param_data *param_data;
+ struct data_logging_config *cfg;
+ int rc, payload_size;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ payload_size = sizeof(*cfg) + APM_MODULE_PARAM_DATA_SIZE;
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_SET_CFG, 0);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ param_data = p;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_DATA_LOGGING_CONFIG;
+ param_data->param_size = payload_size - APM_MODULE_PARAM_DATA_SIZE;
+
+ p = p + APM_MODULE_PARAM_DATA_SIZE;
+ cfg = p;
+ cfg->log_code = module->log_code;
+ cfg->log_tap_point_id = module->log_tap_point_id;
+ cfg->mode = module->mode;
+
+ rc = q6apm_send_cmd_sync(graph->apm, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int audioreach_pcm_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module,
+ int direction, uint32_t rate,
+ uint32_t num_channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ struct apm_pcm_module_media_fmt_cmd *cfg;
+ struct apm_module_param_data *param_data;
+ int rc, payload_size;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ payload_size = APM_PCM_MODULE_FMT_CMD_PSIZE(num_channels);
+
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_SET_CFG, 0);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+ cfg = p;
+
+ param_data = &cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_PCM_OUTPUT_FORMAT_CFG;
+ param_data->param_size = payload_size - APM_MODULE_PARAM_DATA_SIZE;
+
+ cfg->header.data_format = DATA_FORMAT_FIXED_POINT;
+ cfg->header.fmt_id = MEDIA_FMT_ID_PCM;
+ cfg->header.payload_size = APM_PCM_OUT_FMT_CFG_PSIZE(num_channels);
+
+ cfg->media_cfg.alignment = PCM_LSB_ALIGNED;
+ cfg->media_cfg.bit_width = bits_per_sample;
+ cfg->media_cfg.endianness = PCM_LITTLE_ENDIAN;
+ cfg->media_cfg.interleaved = module->interleave_type;
+ cfg->media_cfg.num_channels = num_channels;
+ cfg->media_cfg.q_factor = bits_per_sample - 1;
+ cfg->media_cfg.bits_per_sample = bits_per_sample;
+
+ if (num_channels == 1) {
+ cfg->media_cfg.channel_mapping[0] = PCM_CHANNEL_L;
+ } else if (num_channels == 2) {
+ cfg->media_cfg.channel_mapping[0] = PCM_CHANNEL_L;
+ cfg->media_cfg.channel_mapping[1] = PCM_CHANNEL_R;
+ } else {
+ dev_err(graph->dev, "Error: Invalid channels (%d)!\n", num_channels);
+ }
+
+ rc = q6apm_send_cmd_sync(graph->apm, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int audioreach_shmem_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module,
+ int direction, uint32_t rate,
+ uint32_t num_channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ struct apm_module_param_data *param_data;
+ struct payload_media_fmt_pcm *cfg;
+ struct media_format *header;
+ int rc, payload_size;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ if (num_channels < 0 || num_channels > 2)
+ dev_err(graph->dev, "Error: Invalid channels (%d)!\n", num_channels);
+
+ payload_size = APM_SHMEM_FMT_CFG_PSIZE(num_channels) + APM_MODULE_PARAM_DATA_SIZE;
+
+ p = audioreach_alloc_cmd_pkt(payload_size, APM_CMD_SET_CFG, 0,
+ graph->port->id, module->instance_id);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ param_data = p;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_MEDIA_FORMAT;
+ param_data->param_size = payload_size - APM_MODULE_PARAM_DATA_SIZE;
+ p = p + APM_MODULE_PARAM_DATA_SIZE;
+
+ header = p;
+ header->data_format = DATA_FORMAT_FIXED_POINT;
+ header->fmt_id = MEDIA_FMT_ID_PCM;
+ header->payload_size = payload_size - sizeof(*header);
+
+ p = p + sizeof(*header);
+ cfg = p;
+ cfg->sample_rate = rate;
+ cfg->bit_width = bits_per_sample;
+ cfg->alignment = PCM_LSB_ALIGNED;
+ cfg->bits_per_sample = bits_per_sample;
+ cfg->q_factor = bits_per_sample - 1;
+ cfg->endianness = PCM_LITTLE_ENDIAN;
+ cfg->num_channels = num_channels;
+
+ if (num_channels == 1) {
+ cfg->channel_mapping[0] = PCM_CHANNEL_L;
+ } else if (num_channels == 2) {
+ cfg->channel_mapping[0] = PCM_CHANNEL_L;
+ cfg->channel_mapping[1] = PCM_CHANNEL_R;
+ } else {
+ dev_err(graph->dev, "Error: Invalid channels (%d)!\n", num_channels);
+ }
+
+ rc = audioreach_graph_send_cmd_sync(graph, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int audioreach_gain_set(struct q6apm_graph *graph,
+ struct audioreach_module *module)
+{
+ struct apm_module_param_data *param_data;
+ struct apm_gain_module_cfg *cfg;
+ int rc, payload_size;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ payload_size = APM_GAIN_CFG_PSIZE;
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_SET_CFG, 0);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+ cfg = p;
+
+ param_data = &cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = APM_PARAM_ID_GAIN;
+ param_data->param_size = payload_size - APM_MODULE_PARAM_DATA_SIZE;
+
+ cfg->gain_cfg.gain = module->gain;
+
+ rc = q6apm_send_cmd_sync(graph->apm, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+int audioreach_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module,
+ int direction, uint32_t rate,
+ uint32_t channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ int rc;
+
+ switch (module->module_id) {
+ case MODULE_ID_DATA_LOGGING:
+ rc = audioreach_logging_set_media_format(graph, module);
+ break;
+ case MODULE_ID_PCM_DEC:
+ case MODULE_ID_PCM_ENC:
+ case MODULE_ID_PCM_CNV:
+ rc = audioreach_pcm_set_media_format(graph, module,
+ direction, rate,
+ channels, channel_map,
+ bits_per_sample);
+ break;
+ case MODULE_ID_I2S_SINK:
+ rc = audioreach_i2s_set_media_format(graph, module,
+ direction, rate,
+ channels, channel_map,
+ bits_per_sample);
+ break;
+ case MODULE_ID_WR_SHARED_MEM_EP:
+ rc = audioreach_shmem_set_media_format(graph, module,
+ direction, rate,
+ channels, channel_map,
+ bits_per_sample);
+ break;
+ case MODULE_ID_GAIN:
+ rc = audioreach_gain_set(graph, module);
+ break;
+ case MODULE_ID_CODEC_DMA_SINK:
+ case MODULE_ID_CODEC_DMA_SOURCE:
+ rc = audioreach_codec_dma_set_media_format(graph, module,
+ direction, rate,
+ channels, channel_map,
+ bits_per_sample);
+ break;
+ default:
+ rc = 0;
+ }
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(audioreach_set_media_format);
+
+void audioreach_graph_free_buf(struct q6apm_graph *graph)
+{
+ struct audioreach_graph_data *port;
+ unsigned long flags;
+
+ spin_lock_irqsave(&graph->lock, flags);
+ port = &graph->rx_data;
+ port->num_periods = 0;
+ kfree(port->buf);
+ port->buf = NULL;
+
+ port = &graph->tx_data;
+ port->num_periods = 0;
+ kfree(port->buf);
+ port->buf = NULL;
+ spin_unlock_irqrestore(&graph->lock, flags);
+}
+EXPORT_SYMBOL_GPL(audioreach_graph_free_buf);
+
+int audioreach_map_memory_regions(struct q6apm_graph *graph,
+ unsigned int dir, size_t period_sz,
+ unsigned int periods,
+ bool is_contiguous)
+{
+ struct apm_shared_map_region_payload *mregions;
+ struct apm_cmd_shared_mem_map_regions *cmd;
+ uint32_t num_regions, buf_sz, payload_size;
+ struct audioreach_graph_data *data;
+ struct audio_buffer *ab;
+ unsigned long flags;
+ struct gpr_pkt *pkt;
+ void *p;
+ int rc, i;
+
+ if (dir == SNDRV_PCM_STREAM_PLAYBACK)
+ data = &graph->rx_data;
+ else
+ data = &graph->tx_data;
+
+ if (is_contiguous) {
+ num_regions = 1;
+ buf_sz = period_sz * periods;
+ } else {
+ buf_sz = period_sz;
+ num_regions = periods;
+ }
+
+ /* DSP expects size should be aligned to 4K */
+ buf_sz = ALIGN(buf_sz, 4096);
+
+ payload_size = sizeof(*cmd) + (sizeof(*mregions) * num_regions);
+
+ p = audioreach_alloc_apm_pkt(payload_size,
+ APM_CMD_SHARED_MEM_MAP_REGIONS, dir,
+ graph->port->id);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE;
+ cmd = p;
+ cmd->mem_pool_id = APM_MEMORY_MAP_SHMEM8_4K_POOL;
+ cmd->num_regions = num_regions;
+
+ cmd->property_flag = 0x0;
+
+ mregions = p + sizeof(*cmd);
+
+ spin_lock_irqsave(&graph->lock, flags);
+
+ for (i = 0; i < num_regions; i++) {
+ ab = &data->buf[i];
+ mregions->shm_addr_lsw = lower_32_bits(ab->phys);
+ mregions->shm_addr_msw = upper_32_bits(ab->phys);
+ mregions->mem_size_bytes = buf_sz;
+ ++mregions;
+ }
+ spin_unlock_irqrestore(&graph->lock, flags);
+
+ rc = audioreach_graph_send_cmd_sync(graph, pkt,
+ APM_CMD_RSP_SHARED_MEM_MAP_REGIONS);
+
+ kfree(pkt);
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(audioreach_map_memory_regions);
+
+int audioreach_shared_memory_send_eos(struct q6apm_graph *graph)
+{
+ struct data_cmd_wr_sh_mem_ep_eos *eos;
+ struct gpr_pkt *pkt;
+ int rc = 0, iid;
+ void *p;
+
+ iid = q6apm_graph_get_rx_shmem_module_iid(graph);
+ p = audioreach_alloc_cmd_pkt(sizeof(*eos),
+ DATA_CMD_WR_SH_MEM_EP_EOS,
+ 0,
+ graph->port->id, iid);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ eos = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ eos->policy = WR_SH_MEM_EP_EOS_POLICY_LAST;
+
+ rc = gpr_send_port_pkt(graph->port, pkt);
+ kfree(pkt);
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(audioreach_shared_memory_send_eos);
diff --git a/sound/soc/qcom/audioreach/audioreach.h b/sound/soc/qcom/audioreach/audioreach.h
index e5736fdda66b..07423369cc84 100644
--- a/sound/soc/qcom/audioreach/audioreach.h
+++ b/sound/soc/qcom/audioreach/audioreach.h
@@ -627,4 +627,20 @@ void *audioreach_alloc_pkt(int pkt_size, uint32_t opcode, uint32_t token,
void *audioreach_alloc_graph_pkt(struct q6apm *apm,
struct list_head *sg_list,
int graph_id);
+/* Module specific */
+void audioreach_graph_free_buf(struct q6apm_graph *graph);
+int audioreach_map_memory_regions(struct q6apm_graph *graph,
+ unsigned int dir, size_t period_sz,
+ unsigned int periods,
+ bool is_contiguous);
+int audioreach_graph_send_cmd_sync(struct q6apm_graph *graph,
+ struct gpr_pkt *pkt,
+ uint32_t rsp_opcode);
+int audioreach_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module,
+ int direction, uint32_t rate,
+ uint32_t channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample);
+int audioreach_shared_memory_send_eos(struct q6apm_graph *graph);
#endif /* __AUDIOREACH_H__ */
diff --git a/sound/soc/qcom/audioreach/q6apm.c b/sound/soc/qcom/audioreach/q6apm.c
index d0deb69114b0..6a98c114ea7a 100644
--- a/sound/soc/qcom/audioreach/q6apm.c
+++ b/sound/soc/qcom/audioreach/q6apm.c
@@ -309,6 +309,172 @@ int q6apm_connect_sub_graphs(struct q6apm *apm, u32 src_sgid,
return 0;
}
+int q6apm_graph_media_format_shmem(struct q6apm_graph *graph,
+ int direction, uint32_t rate,
+ uint32_t channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ struct audioreach_module *module;
+
+ if (direction == SNDRV_PCM_STREAM_CAPTURE)
+ module = q6apm_find_module_by_mid(graph,
+ MODULE_ID_RD_SHARED_MEM_EP);
+ else
+ module = q6apm_find_module_by_mid(graph,
+ MODULE_ID_WR_SHARED_MEM_EP);
+
+ if (!module)
+ return -ENODEV;
+
+ audioreach_set_media_format(graph, module, direction, rate,
+ channels, channel_map,
+ bits_per_sample);
+
+ return 0;
+
+}
+EXPORT_SYMBOL_GPL(q6apm_graph_media_format_shmem);
+
+int q6apm_map_memory_regions(struct q6apm_graph *graph,
+ unsigned int dir, phys_addr_t phys,
+ size_t period_sz, unsigned int periods)
+{
+ struct audioreach_graph_data *data;
+ struct audio_buffer *buf;
+ unsigned long flags;
+ int cnt;
+ int rc;
+
+ if (dir == SNDRV_PCM_STREAM_PLAYBACK)
+ data = &graph->rx_data;
+ else
+ data = &graph->tx_data;
+
+ spin_lock_irqsave(&graph->lock, flags);
+
+ if (data->buf) {
+ dev_err(graph->dev, "Buffer already allocated\n");
+ spin_unlock_irqrestore(&graph->lock, flags);
+ return 0;
+ }
+
+ buf = kzalloc(((sizeof(struct audio_buffer)) * periods), GFP_ATOMIC);
+ if (!buf) {
+ spin_unlock_irqrestore(&graph->lock, flags);
+ return -ENOMEM;
+ }
+
+ if (dir == SNDRV_PCM_STREAM_PLAYBACK)
+ data = &graph->rx_data;
+ else
+ data = &graph->tx_data;
+
+ data->buf = buf;
+
+ buf[0].phys = phys;
+ buf[0].size = period_sz;
+
+ for (cnt = 1; cnt < periods; cnt++) {
+ if (period_sz > 0) {
+ buf[cnt].phys = buf[0].phys + (cnt * period_sz);
+ buf[cnt].size = period_sz;
+ }
+ }
+ data->num_periods = periods;
+
+ spin_unlock_irqrestore(&graph->lock, flags);
+
+ rc = audioreach_map_memory_regions(graph, dir, period_sz,
+ periods, 1);
+ if (rc < 0) {
+ dev_err(graph->dev, "Memory_map_regions failed\n");
+ audioreach_graph_free_buf(graph);
+ }
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(q6apm_map_memory_regions);
+
+int q6apm_unmap_memory_regions(struct q6apm_graph *graph,
+ unsigned int dir)
+{
+ struct audioreach_graph_data *data;
+ struct apm_cmd_shared_mem_unmap_regions *cmd = NULL;
+ struct gpr_pkt *pkt;
+ void *p;
+ int rc;
+
+ if (dir == SNDRV_PCM_STREAM_PLAYBACK)
+ data = &graph->rx_data;
+ else
+ data = &graph->tx_data;
+
+ if (!data->mem_map_handle) {
+ return 0;
+ }
+
+ p = audioreach_alloc_apm_pkt(sizeof(*cmd),
+ APM_CMD_SHARED_MEM_UNMAP_REGIONS, dir,
+ graph->port->id);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ cmd = p + GPR_HDR_SIZE;
+ cmd->mem_map_handle = data->mem_map_handle;
+
+ rc = audioreach_graph_send_cmd_sync(graph, pkt, APM_CMD_SHARED_MEM_UNMAP_REGIONS);
+ kfree(pkt);
+
+ audioreach_graph_free_buf(graph);
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(q6apm_unmap_memory_regions);
+
+int q6apm_graph_media_format_pcm(struct q6apm_graph *graph,
+ int direction, uint32_t rate,
+ uint32_t channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ struct audioreach_graph_info *info = graph->info;
+ struct audioreach_sub_graph *sgs;
+ struct audioreach_container *container;
+ struct audioreach_module *module;
+
+ list_for_each_entry(sgs, &info->sg_list, node) {
+ list_for_each_entry(container, &sgs->container_list, node) {
+ list_for_each_entry(module, &container->modules_list, node) {
+ if ((MODULE_ID_WR_SHARED_MEM_EP == module->module_id) ||
+ (MODULE_ID_WR_SHARED_MEM_EP == module->module_id))
+ continue;
+
+ audioreach_set_media_format(graph, module, direction, rate,
+ channels, channel_map,
+ bits_per_sample);
+ }
+ }
+ }
+
+ return 0;
+
+}
+EXPORT_SYMBOL_GPL(q6apm_graph_media_format_pcm);
+
+static int q6apm_graph_get_tx_shmem_module_iid(struct q6apm_graph *graph)
+{
+ struct audioreach_module *module;
+
+ module = q6apm_find_module_by_mid(graph, MODULE_ID_RD_SHARED_MEM_EP);
+ if (!module)
+ return -ENODEV;
+
+ return module->instance_id;
+
+}
+
int q6apm_graph_get_rx_shmem_module_iid(struct q6apm_graph *graph)
{
struct audioreach_module *module;
@@ -322,6 +488,105 @@ int q6apm_graph_get_rx_shmem_module_iid(struct q6apm_graph *graph)
}
EXPORT_SYMBOL_GPL(q6apm_graph_get_rx_shmem_module_iid);
+int q6apm_write_async(struct q6apm_graph *graph, uint32_t len, uint32_t msw_ts,
+ uint32_t lsw_ts, uint32_t wflags)
+{
+ struct gpr_pkt *pkt;
+ void *p;
+ int rc, payload_size, iid;
+ struct apm_data_cmd_wr_sh_mem_ep_data_buffer_v2 *write;
+ struct audio_buffer *ab;
+ unsigned long flags;
+
+ payload_size = sizeof(*write);
+
+ iid = q6apm_graph_get_rx_shmem_module_iid(graph);
+ p = audioreach_alloc_pkt(payload_size,
+ DATA_CMD_WR_SH_MEM_EP_DATA_BUFFER_V2,
+ graph->rx_data.dsp_buf,
+ graph->port->id, iid);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE;
+ write = p;
+
+ spin_lock_irqsave(&graph->lock, flags);
+ ab = &graph->rx_data.buf[graph->rx_data.dsp_buf];
+
+ write->buf_addr_lsw = lower_32_bits(ab->phys);
+ write->buf_addr_msw = upper_32_bits(ab->phys);
+ write->buf_size = len;
+ write->timestamp_lsw = lsw_ts;
+ write->timestamp_msw = msw_ts;
+ write->mem_map_handle = graph->rx_data.mem_map_handle;
+
+ //FIXME use other flags
+ if (wflags == NO_TIMESTAMP)
+ write->flags = 0;
+ else
+ write->flags = 0x80000000;
+
+ graph->rx_data.dsp_buf++;
+
+ if (graph->rx_data.dsp_buf >= graph->rx_data.num_periods)
+ graph->rx_data.dsp_buf = 0;
+
+ spin_unlock_irqrestore(&graph->lock, flags);
+
+ rc = gpr_send_port_pkt(graph->port, pkt);
+
+ kfree(pkt);
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(q6apm_write_async);
+
+int q6apm_read(struct q6apm_graph *graph)
+{
+ struct data_cmd_rd_sh_mem_ep_data_buffer_v2 *read;
+ struct audioreach_graph_data *port;
+ struct audio_buffer *ab;
+ struct gpr_pkt *pkt;
+ unsigned long flags;
+ int rc = 0, iid;
+ void *p;
+
+ iid = q6apm_graph_get_tx_shmem_module_iid(graph);
+ p = audioreach_alloc_pkt(sizeof(*read),
+ DATA_CMD_RD_SH_MEM_EP_DATA_BUFFER_V2,
+ graph->tx_data.dsp_buf,
+ graph->port->id, iid);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ read = p + GPR_HDR_SIZE;
+
+ spin_lock_irqsave(&graph->lock, flags);
+ port = &graph->tx_data;
+ ab = &port->buf[port->dsp_buf];
+
+ read->buf_addr_lsw = lower_32_bits(ab->phys);
+ read->buf_addr_msw = upper_32_bits(ab->phys);
+ read->mem_map_handle = port->mem_map_handle;
+ read->buf_size = ab->size;
+
+ port->dsp_buf++;
+
+ if (port->dsp_buf >= port->num_periods)
+ port->dsp_buf = 0;
+
+ spin_unlock_irqrestore(&graph->lock, flags);
+
+ rc = gpr_send_port_pkt(graph->port, pkt);
+ kfree(pkt);
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(q6apm_read);
+
static int graph_callback(struct gpr_resp_pkt *data, void *priv, int op)
{
struct q6apm_graph *graph = priv;
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* [RFC PATCH 06/13] ASoC: qcom: audioreach: add module configuration command helpers
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
Audioreach module configuration helpers, which will be used by the q6apm-dai driver.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
sound/soc/qcom/audioreach/audioreach.c | 551 +++++++++++++++++++++++++
sound/soc/qcom/audioreach/audioreach.h | 16 +
sound/soc/qcom/audioreach/q6apm.c | 265 ++++++++++++
3 files changed, 832 insertions(+)
diff --git a/sound/soc/qcom/audioreach/audioreach.c b/sound/soc/qcom/audioreach/audioreach.c
index 7291adb37d49..eecea02f93bd 100644
--- a/sound/soc/qcom/audioreach/audioreach.c
+++ b/sound/soc/qcom/audioreach/audioreach.c
@@ -529,3 +529,554 @@ void *audioreach_alloc_graph_pkt(struct q6apm *apm,
return pkt;
}
+int audioreach_graph_send_cmd_sync(struct q6apm_graph *graph,
+ struct gpr_pkt *pkt,
+ uint32_t rsp_opcode)
+{
+
+ struct device *dev = graph->dev;
+ struct gpr_hdr *hdr = &pkt->hdr;
+ int rc;
+
+ mutex_lock(&graph->cmd_lock);
+ graph->result.opcode = 0;
+ graph->result.status = 0;
+
+ rc = gpr_send_port_pkt(graph->port, pkt);
+ if (rc < 0)
+ goto err;
+
+ if (rsp_opcode)
+ rc = wait_event_timeout(graph->cmd_wait,
+ (graph->result.opcode == hdr->opcode) ||
+ (graph->result.opcode == rsp_opcode),
+ 5 * HZ);
+ else
+ rc = wait_event_timeout(graph->cmd_wait,
+ (graph->result.opcode == hdr->opcode),
+ 5 * HZ);
+
+ if (!rc) {
+ dev_err(dev, "CMD timeout for [%x] opcode\n", hdr->opcode);
+ rc = -ETIMEDOUT;
+ } else if (graph->result.status > 0) {
+ dev_err(dev, "DSP returned error[%x] %x\n", hdr->opcode,
+ graph->result.status);
+ rc = -EINVAL;
+ } else {
+ dev_err(dev, "DSP returned [%x]\n", graph->result.status);
+ rc = 0;
+ }
+
+err:
+ mutex_unlock(&graph->cmd_lock);
+ return rc;
+}
+EXPORT_SYMBOL_GPL(audioreach_graph_send_cmd_sync);
+
+static int audioreach_codec_dma_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module,
+ int direction, uint32_t rate,
+ uint32_t num_channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ struct apm_module_param_data *param_data;
+ struct apm_codec_dma_module_intf_cfg *intf_cfg;
+ struct apm_module_hw_ep_mf_cfg *hw_cfg;
+ struct apm_module_frame_size_factor_cfg *fs_cfg;
+ struct apm_module_hw_ep_power_mode_cfg *pm_cfg;
+ int ic_sz, ep_sz, fs_sz, pm_sz, dl_sz;
+ int rc, payload_size;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ ic_sz = APM_CDMA_INTF_CFG_PSIZE;
+ ep_sz = APM_HW_EP_CFG_PSIZE;
+ fs_sz = APM_FS_CFG_PSIZE;
+ pm_sz = APM_HW_EP_PMODE_CFG_PSIZE;
+ dl_sz = 0;
+
+ payload_size = ic_sz + ep_sz + fs_sz + pm_sz + dl_sz;
+
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_SET_CFG, 0);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ hw_cfg = p;
+ param_data = &hw_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_HW_EP_MF_CFG;
+ param_data->param_size = ep_sz - APM_MODULE_PARAM_DATA_SIZE;
+
+ hw_cfg->mf.sample_rate = rate;
+ hw_cfg->mf.bit_width = bits_per_sample;
+ hw_cfg->mf.num_channels = num_channels;
+ hw_cfg->mf.data_format = module->data_format;
+ p += ep_sz;
+
+ fs_cfg = p;
+ param_data = &fs_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_HW_EP_FRAME_SIZE_FACTOR;
+ param_data->param_size = fs_sz - APM_MODULE_PARAM_DATA_SIZE;
+ fs_cfg->frame_size_factor = 1;
+ p += fs_sz;
+
+ intf_cfg = p;
+ param_data = &intf_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_CODEC_DMA_INTF_CFG;
+ param_data->param_size = ic_sz - APM_MODULE_PARAM_DATA_SIZE;
+
+ intf_cfg->cfg.lpaif_type = module->hw_interface_type;
+ intf_cfg->cfg.intf_index = module->hw_interface_idx;
+ intf_cfg->cfg.active_channels_mask = (1 << num_channels) - 1;
+ p += ic_sz;
+
+ pm_cfg = p;
+ param_data = &pm_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_HW_EP_POWER_MODE_CFG;
+ param_data->param_size = pm_sz - APM_MODULE_PARAM_DATA_SIZE;
+ pm_cfg->power_mode.power_mode = 0;
+
+ rc = q6apm_send_cmd_sync(graph->apm, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int audioreach_i2s_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module,
+ int direction, uint32_t rate,
+ uint32_t num_channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ struct apm_module_frame_size_factor_cfg *fs_cfg;
+ struct apm_module_param_data *param_data;
+ struct apm_i2s_module_intf_cfg *intf_cfg;
+ struct apm_module_hw_ep_mf_cfg *hw_cfg;
+ int ic_sz, ep_sz, fs_sz;
+ int rc, payload_size;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ ic_sz = APM_I2S_INTF_CFG_PSIZE;
+ ep_sz = APM_HW_EP_CFG_PSIZE;
+ fs_sz = APM_FS_CFG_PSIZE;
+
+ payload_size = ic_sz + ep_sz + fs_sz;
+
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_SET_CFG, 0);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+ intf_cfg = p;
+
+ param_data = &intf_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_I2S_INTF_CFG;
+ param_data->param_size = ic_sz - APM_MODULE_PARAM_DATA_SIZE;
+
+ intf_cfg->cfg.intf_idx = module->hw_interface_idx;
+ intf_cfg->cfg.sd_line_idx = module->sd_line_idx;
+ intf_cfg->cfg.ws_src = module->ws_src;
+
+ p += ic_sz;
+ hw_cfg = p;
+ param_data = &hw_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_HW_EP_MF_CFG;
+ param_data->param_size = ep_sz - APM_MODULE_PARAM_DATA_SIZE;
+
+ hw_cfg->mf.sample_rate = rate;
+ hw_cfg->mf.bit_width = bits_per_sample;
+ hw_cfg->mf.num_channels = num_channels;
+ hw_cfg->mf.data_format = module->data_format;
+
+ p += ep_sz;
+ fs_cfg = p;
+ param_data = &fs_cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_HW_EP_FRAME_SIZE_FACTOR;
+ param_data->param_size = fs_sz - APM_MODULE_PARAM_DATA_SIZE;
+ fs_cfg->frame_size_factor = 1;
+
+ rc = q6apm_send_cmd_sync(graph->apm, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int audioreach_logging_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module)
+{
+ struct apm_module_param_data *param_data;
+ struct data_logging_config *cfg;
+ int rc, payload_size;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ payload_size = sizeof(*cfg) + APM_MODULE_PARAM_DATA_SIZE;
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_SET_CFG, 0);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ param_data = p;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_DATA_LOGGING_CONFIG;
+ param_data->param_size = payload_size - APM_MODULE_PARAM_DATA_SIZE;
+
+ p = p + APM_MODULE_PARAM_DATA_SIZE;
+ cfg = p;
+ cfg->log_code = module->log_code;
+ cfg->log_tap_point_id = module->log_tap_point_id;
+ cfg->mode = module->mode;
+
+ rc = q6apm_send_cmd_sync(graph->apm, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int audioreach_pcm_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module,
+ int direction, uint32_t rate,
+ uint32_t num_channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ struct apm_pcm_module_media_fmt_cmd *cfg;
+ struct apm_module_param_data *param_data;
+ int rc, payload_size;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ payload_size = APM_PCM_MODULE_FMT_CMD_PSIZE(num_channels);
+
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_SET_CFG, 0);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+ cfg = p;
+
+ param_data = &cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_PCM_OUTPUT_FORMAT_CFG;
+ param_data->param_size = payload_size - APM_MODULE_PARAM_DATA_SIZE;
+
+ cfg->header.data_format = DATA_FORMAT_FIXED_POINT;
+ cfg->header.fmt_id = MEDIA_FMT_ID_PCM;
+ cfg->header.payload_size = APM_PCM_OUT_FMT_CFG_PSIZE(num_channels);
+
+ cfg->media_cfg.alignment = PCM_LSB_ALIGNED;
+ cfg->media_cfg.bit_width = bits_per_sample;
+ cfg->media_cfg.endianness = PCM_LITTLE_ENDIAN;
+ cfg->media_cfg.interleaved = module->interleave_type;
+ cfg->media_cfg.num_channels = num_channels;
+ cfg->media_cfg.q_factor = bits_per_sample - 1;
+ cfg->media_cfg.bits_per_sample = bits_per_sample;
+
+ if (num_channels == 1) {
+ cfg->media_cfg.channel_mapping[0] = PCM_CHANNEL_L;
+ } else if (num_channels == 2) {
+ cfg->media_cfg.channel_mapping[0] = PCM_CHANNEL_L;
+ cfg->media_cfg.channel_mapping[1] = PCM_CHANNEL_R;
+ } else {
+ dev_err(graph->dev, "Error: Invalid channels (%d)!\n", num_channels);
+ }
+
+ rc = q6apm_send_cmd_sync(graph->apm, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int audioreach_shmem_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module,
+ int direction, uint32_t rate,
+ uint32_t num_channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ struct apm_module_param_data *param_data;
+ struct payload_media_fmt_pcm *cfg;
+ struct media_format *header;
+ int rc, payload_size;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ if (num_channels < 0 || num_channels > 2)
+ dev_err(graph->dev, "Error: Invalid channels (%d)!\n", num_channels);
+
+ payload_size = APM_SHMEM_FMT_CFG_PSIZE(num_channels) + APM_MODULE_PARAM_DATA_SIZE;
+
+ p = audioreach_alloc_cmd_pkt(payload_size, APM_CMD_SET_CFG, 0,
+ graph->port->id, module->instance_id);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ param_data = p;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_MEDIA_FORMAT;
+ param_data->param_size = payload_size - APM_MODULE_PARAM_DATA_SIZE;
+ p = p + APM_MODULE_PARAM_DATA_SIZE;
+
+ header = p;
+ header->data_format = DATA_FORMAT_FIXED_POINT;
+ header->fmt_id = MEDIA_FMT_ID_PCM;
+ header->payload_size = payload_size - sizeof(*header);
+
+ p = p + sizeof(*header);
+ cfg = p;
+ cfg->sample_rate = rate;
+ cfg->bit_width = bits_per_sample;
+ cfg->alignment = PCM_LSB_ALIGNED;
+ cfg->bits_per_sample = bits_per_sample;
+ cfg->q_factor = bits_per_sample - 1;
+ cfg->endianness = PCM_LITTLE_ENDIAN;
+ cfg->num_channels = num_channels;
+
+ if (num_channels == 1) {
+ cfg->channel_mapping[0] = PCM_CHANNEL_L;
+ } else if (num_channels == 2) {
+ cfg->channel_mapping[0] = PCM_CHANNEL_L;
+ cfg->channel_mapping[1] = PCM_CHANNEL_R;
+ } else {
+ dev_err(graph->dev, "Error: Invalid channels (%d)!\n", num_channels);
+ }
+
+ rc = audioreach_graph_send_cmd_sync(graph, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int audioreach_gain_set(struct q6apm_graph *graph,
+ struct audioreach_module *module)
+{
+ struct apm_module_param_data *param_data;
+ struct apm_gain_module_cfg *cfg;
+ int rc, payload_size;
+ struct gpr_pkt *pkt;
+ void *p;
+
+ payload_size = APM_GAIN_CFG_PSIZE;
+ p = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_SET_CFG, 0);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+ cfg = p;
+
+ param_data = &cfg->param_data;
+ param_data->module_instance_id = module->instance_id;
+ param_data->error_code = 0;
+ param_data->param_id = APM_PARAM_ID_GAIN;
+ param_data->param_size = payload_size - APM_MODULE_PARAM_DATA_SIZE;
+
+ cfg->gain_cfg.gain = module->gain;
+
+ rc = q6apm_send_cmd_sync(graph->apm, pkt, 0);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+int audioreach_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module,
+ int direction, uint32_t rate,
+ uint32_t channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ int rc;
+
+ switch (module->module_id) {
+ case MODULE_ID_DATA_LOGGING:
+ rc = audioreach_logging_set_media_format(graph, module);
+ break;
+ case MODULE_ID_PCM_DEC:
+ case MODULE_ID_PCM_ENC:
+ case MODULE_ID_PCM_CNV:
+ rc = audioreach_pcm_set_media_format(graph, module,
+ direction, rate,
+ channels, channel_map,
+ bits_per_sample);
+ break;
+ case MODULE_ID_I2S_SINK:
+ rc = audioreach_i2s_set_media_format(graph, module,
+ direction, rate,
+ channels, channel_map,
+ bits_per_sample);
+ break;
+ case MODULE_ID_WR_SHARED_MEM_EP:
+ rc = audioreach_shmem_set_media_format(graph, module,
+ direction, rate,
+ channels, channel_map,
+ bits_per_sample);
+ break;
+ case MODULE_ID_GAIN:
+ rc = audioreach_gain_set(graph, module);
+ break;
+ case MODULE_ID_CODEC_DMA_SINK:
+ case MODULE_ID_CODEC_DMA_SOURCE:
+ rc = audioreach_codec_dma_set_media_format(graph, module,
+ direction, rate,
+ channels, channel_map,
+ bits_per_sample);
+ break;
+ default:
+ rc = 0;
+ }
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(audioreach_set_media_format);
+
+void audioreach_graph_free_buf(struct q6apm_graph *graph)
+{
+ struct audioreach_graph_data *port;
+ unsigned long flags;
+
+ spin_lock_irqsave(&graph->lock, flags);
+ port = &graph->rx_data;
+ port->num_periods = 0;
+ kfree(port->buf);
+ port->buf = NULL;
+
+ port = &graph->tx_data;
+ port->num_periods = 0;
+ kfree(port->buf);
+ port->buf = NULL;
+ spin_unlock_irqrestore(&graph->lock, flags);
+}
+EXPORT_SYMBOL_GPL(audioreach_graph_free_buf);
+
+int audioreach_map_memory_regions(struct q6apm_graph *graph,
+ unsigned int dir, size_t period_sz,
+ unsigned int periods,
+ bool is_contiguous)
+{
+ struct apm_shared_map_region_payload *mregions;
+ struct apm_cmd_shared_mem_map_regions *cmd;
+ uint32_t num_regions, buf_sz, payload_size;
+ struct audioreach_graph_data *data;
+ struct audio_buffer *ab;
+ unsigned long flags;
+ struct gpr_pkt *pkt;
+ void *p;
+ int rc, i;
+
+ if (dir == SNDRV_PCM_STREAM_PLAYBACK)
+ data = &graph->rx_data;
+ else
+ data = &graph->tx_data;
+
+ if (is_contiguous) {
+ num_regions = 1;
+ buf_sz = period_sz * periods;
+ } else {
+ buf_sz = period_sz;
+ num_regions = periods;
+ }
+
+ /* DSP expects size should be aligned to 4K */
+ buf_sz = ALIGN(buf_sz, 4096);
+
+ payload_size = sizeof(*cmd) + (sizeof(*mregions) * num_regions);
+
+ p = audioreach_alloc_apm_pkt(payload_size,
+ APM_CMD_SHARED_MEM_MAP_REGIONS, dir,
+ graph->port->id);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE;
+ cmd = p;
+ cmd->mem_pool_id = APM_MEMORY_MAP_SHMEM8_4K_POOL;
+ cmd->num_regions = num_regions;
+
+ cmd->property_flag = 0x0;
+
+ mregions = p + sizeof(*cmd);
+
+ spin_lock_irqsave(&graph->lock, flags);
+
+ for (i = 0; i < num_regions; i++) {
+ ab = &data->buf[i];
+ mregions->shm_addr_lsw = lower_32_bits(ab->phys);
+ mregions->shm_addr_msw = upper_32_bits(ab->phys);
+ mregions->mem_size_bytes = buf_sz;
+ ++mregions;
+ }
+ spin_unlock_irqrestore(&graph->lock, flags);
+
+ rc = audioreach_graph_send_cmd_sync(graph, pkt,
+ APM_CMD_RSP_SHARED_MEM_MAP_REGIONS);
+
+ kfree(pkt);
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(audioreach_map_memory_regions);
+
+int audioreach_shared_memory_send_eos(struct q6apm_graph *graph)
+{
+ struct data_cmd_wr_sh_mem_ep_eos *eos;
+ struct gpr_pkt *pkt;
+ int rc = 0, iid;
+ void *p;
+
+ iid = q6apm_graph_get_rx_shmem_module_iid(graph);
+ p = audioreach_alloc_cmd_pkt(sizeof(*eos),
+ DATA_CMD_WR_SH_MEM_EP_EOS,
+ 0,
+ graph->port->id, iid);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ eos = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ eos->policy = WR_SH_MEM_EP_EOS_POLICY_LAST;
+
+ rc = gpr_send_port_pkt(graph->port, pkt);
+ kfree(pkt);
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(audioreach_shared_memory_send_eos);
diff --git a/sound/soc/qcom/audioreach/audioreach.h b/sound/soc/qcom/audioreach/audioreach.h
index e5736fdda66b..07423369cc84 100644
--- a/sound/soc/qcom/audioreach/audioreach.h
+++ b/sound/soc/qcom/audioreach/audioreach.h
@@ -627,4 +627,20 @@ void *audioreach_alloc_pkt(int pkt_size, uint32_t opcode, uint32_t token,
void *audioreach_alloc_graph_pkt(struct q6apm *apm,
struct list_head *sg_list,
int graph_id);
+/* Module specific */
+void audioreach_graph_free_buf(struct q6apm_graph *graph);
+int audioreach_map_memory_regions(struct q6apm_graph *graph,
+ unsigned int dir, size_t period_sz,
+ unsigned int periods,
+ bool is_contiguous);
+int audioreach_graph_send_cmd_sync(struct q6apm_graph *graph,
+ struct gpr_pkt *pkt,
+ uint32_t rsp_opcode);
+int audioreach_set_media_format(struct q6apm_graph *graph,
+ struct audioreach_module *module,
+ int direction, uint32_t rate,
+ uint32_t channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample);
+int audioreach_shared_memory_send_eos(struct q6apm_graph *graph);
#endif /* __AUDIOREACH_H__ */
diff --git a/sound/soc/qcom/audioreach/q6apm.c b/sound/soc/qcom/audioreach/q6apm.c
index d0deb69114b0..6a98c114ea7a 100644
--- a/sound/soc/qcom/audioreach/q6apm.c
+++ b/sound/soc/qcom/audioreach/q6apm.c
@@ -309,6 +309,172 @@ int q6apm_connect_sub_graphs(struct q6apm *apm, u32 src_sgid,
return 0;
}
+int q6apm_graph_media_format_shmem(struct q6apm_graph *graph,
+ int direction, uint32_t rate,
+ uint32_t channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ struct audioreach_module *module;
+
+ if (direction == SNDRV_PCM_STREAM_CAPTURE)
+ module = q6apm_find_module_by_mid(graph,
+ MODULE_ID_RD_SHARED_MEM_EP);
+ else
+ module = q6apm_find_module_by_mid(graph,
+ MODULE_ID_WR_SHARED_MEM_EP);
+
+ if (!module)
+ return -ENODEV;
+
+ audioreach_set_media_format(graph, module, direction, rate,
+ channels, channel_map,
+ bits_per_sample);
+
+ return 0;
+
+}
+EXPORT_SYMBOL_GPL(q6apm_graph_media_format_shmem);
+
+int q6apm_map_memory_regions(struct q6apm_graph *graph,
+ unsigned int dir, phys_addr_t phys,
+ size_t period_sz, unsigned int periods)
+{
+ struct audioreach_graph_data *data;
+ struct audio_buffer *buf;
+ unsigned long flags;
+ int cnt;
+ int rc;
+
+ if (dir == SNDRV_PCM_STREAM_PLAYBACK)
+ data = &graph->rx_data;
+ else
+ data = &graph->tx_data;
+
+ spin_lock_irqsave(&graph->lock, flags);
+
+ if (data->buf) {
+ dev_err(graph->dev, "Buffer already allocated\n");
+ spin_unlock_irqrestore(&graph->lock, flags);
+ return 0;
+ }
+
+ buf = kzalloc(((sizeof(struct audio_buffer)) * periods), GFP_ATOMIC);
+ if (!buf) {
+ spin_unlock_irqrestore(&graph->lock, flags);
+ return -ENOMEM;
+ }
+
+ if (dir == SNDRV_PCM_STREAM_PLAYBACK)
+ data = &graph->rx_data;
+ else
+ data = &graph->tx_data;
+
+ data->buf = buf;
+
+ buf[0].phys = phys;
+ buf[0].size = period_sz;
+
+ for (cnt = 1; cnt < periods; cnt++) {
+ if (period_sz > 0) {
+ buf[cnt].phys = buf[0].phys + (cnt * period_sz);
+ buf[cnt].size = period_sz;
+ }
+ }
+ data->num_periods = periods;
+
+ spin_unlock_irqrestore(&graph->lock, flags);
+
+ rc = audioreach_map_memory_regions(graph, dir, period_sz,
+ periods, 1);
+ if (rc < 0) {
+ dev_err(graph->dev, "Memory_map_regions failed\n");
+ audioreach_graph_free_buf(graph);
+ }
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(q6apm_map_memory_regions);
+
+int q6apm_unmap_memory_regions(struct q6apm_graph *graph,
+ unsigned int dir)
+{
+ struct audioreach_graph_data *data;
+ struct apm_cmd_shared_mem_unmap_regions *cmd = NULL;
+ struct gpr_pkt *pkt;
+ void *p;
+ int rc;
+
+ if (dir == SNDRV_PCM_STREAM_PLAYBACK)
+ data = &graph->rx_data;
+ else
+ data = &graph->tx_data;
+
+ if (!data->mem_map_handle) {
+ return 0;
+ }
+
+ p = audioreach_alloc_apm_pkt(sizeof(*cmd),
+ APM_CMD_SHARED_MEM_UNMAP_REGIONS, dir,
+ graph->port->id);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ cmd = p + GPR_HDR_SIZE;
+ cmd->mem_map_handle = data->mem_map_handle;
+
+ rc = audioreach_graph_send_cmd_sync(graph, pkt, APM_CMD_SHARED_MEM_UNMAP_REGIONS);
+ kfree(pkt);
+
+ audioreach_graph_free_buf(graph);
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(q6apm_unmap_memory_regions);
+
+int q6apm_graph_media_format_pcm(struct q6apm_graph *graph,
+ int direction, uint32_t rate,
+ uint32_t channels,
+ u8 channel_map[PCM_MAX_NUM_CHANNEL],
+ uint16_t bits_per_sample)
+{
+ struct audioreach_graph_info *info = graph->info;
+ struct audioreach_sub_graph *sgs;
+ struct audioreach_container *container;
+ struct audioreach_module *module;
+
+ list_for_each_entry(sgs, &info->sg_list, node) {
+ list_for_each_entry(container, &sgs->container_list, node) {
+ list_for_each_entry(module, &container->modules_list, node) {
+ if ((MODULE_ID_WR_SHARED_MEM_EP == module->module_id) ||
+ (MODULE_ID_WR_SHARED_MEM_EP == module->module_id))
+ continue;
+
+ audioreach_set_media_format(graph, module, direction, rate,
+ channels, channel_map,
+ bits_per_sample);
+ }
+ }
+ }
+
+ return 0;
+
+}
+EXPORT_SYMBOL_GPL(q6apm_graph_media_format_pcm);
+
+static int q6apm_graph_get_tx_shmem_module_iid(struct q6apm_graph *graph)
+{
+ struct audioreach_module *module;
+
+ module = q6apm_find_module_by_mid(graph, MODULE_ID_RD_SHARED_MEM_EP);
+ if (!module)
+ return -ENODEV;
+
+ return module->instance_id;
+
+}
+
int q6apm_graph_get_rx_shmem_module_iid(struct q6apm_graph *graph)
{
struct audioreach_module *module;
@@ -322,6 +488,105 @@ int q6apm_graph_get_rx_shmem_module_iid(struct q6apm_graph *graph)
}
EXPORT_SYMBOL_GPL(q6apm_graph_get_rx_shmem_module_iid);
+int q6apm_write_async(struct q6apm_graph *graph, uint32_t len, uint32_t msw_ts,
+ uint32_t lsw_ts, uint32_t wflags)
+{
+ struct gpr_pkt *pkt;
+ void *p;
+ int rc, payload_size, iid;
+ struct apm_data_cmd_wr_sh_mem_ep_data_buffer_v2 *write;
+ struct audio_buffer *ab;
+ unsigned long flags;
+
+ payload_size = sizeof(*write);
+
+ iid = q6apm_graph_get_rx_shmem_module_iid(graph);
+ p = audioreach_alloc_pkt(payload_size,
+ DATA_CMD_WR_SH_MEM_EP_DATA_BUFFER_V2,
+ graph->rx_data.dsp_buf,
+ graph->port->id, iid);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ p = p + GPR_HDR_SIZE;
+ write = p;
+
+ spin_lock_irqsave(&graph->lock, flags);
+ ab = &graph->rx_data.buf[graph->rx_data.dsp_buf];
+
+ write->buf_addr_lsw = lower_32_bits(ab->phys);
+ write->buf_addr_msw = upper_32_bits(ab->phys);
+ write->buf_size = len;
+ write->timestamp_lsw = lsw_ts;
+ write->timestamp_msw = msw_ts;
+ write->mem_map_handle = graph->rx_data.mem_map_handle;
+
+ //FIXME use other flags
+ if (wflags == NO_TIMESTAMP)
+ write->flags = 0;
+ else
+ write->flags = 0x80000000;
+
+ graph->rx_data.dsp_buf++;
+
+ if (graph->rx_data.dsp_buf >= graph->rx_data.num_periods)
+ graph->rx_data.dsp_buf = 0;
+
+ spin_unlock_irqrestore(&graph->lock, flags);
+
+ rc = gpr_send_port_pkt(graph->port, pkt);
+
+ kfree(pkt);
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(q6apm_write_async);
+
+int q6apm_read(struct q6apm_graph *graph)
+{
+ struct data_cmd_rd_sh_mem_ep_data_buffer_v2 *read;
+ struct audioreach_graph_data *port;
+ struct audio_buffer *ab;
+ struct gpr_pkt *pkt;
+ unsigned long flags;
+ int rc = 0, iid;
+ void *p;
+
+ iid = q6apm_graph_get_tx_shmem_module_iid(graph);
+ p = audioreach_alloc_pkt(sizeof(*read),
+ DATA_CMD_RD_SH_MEM_EP_DATA_BUFFER_V2,
+ graph->tx_data.dsp_buf,
+ graph->port->id, iid);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ read = p + GPR_HDR_SIZE;
+
+ spin_lock_irqsave(&graph->lock, flags);
+ port = &graph->tx_data;
+ ab = &port->buf[port->dsp_buf];
+
+ read->buf_addr_lsw = lower_32_bits(ab->phys);
+ read->buf_addr_msw = upper_32_bits(ab->phys);
+ read->mem_map_handle = port->mem_map_handle;
+ read->buf_size = ab->size;
+
+ port->dsp_buf++;
+
+ if (port->dsp_buf >= port->num_periods)
+ port->dsp_buf = 0;
+
+ spin_unlock_irqrestore(&graph->lock, flags);
+
+ rc = gpr_send_port_pkt(graph->port, pkt);
+ kfree(pkt);
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(q6apm_read);
+
static int graph_callback(struct gpr_resp_pkt *data, void *priv, int op)
{
struct q6apm_graph *graph = priv;
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [RFC PATCH 07/13] ASoC: qcom: audioreach: add topology support
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-07 15:28 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: plai, tiwai, robh, devicetree, perex, alsa-devel, linux-kernel,
lgirdwood, bgoswami, Srinivas Kandagatla
Add ASoC topology support in audioreach
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
include/uapi/sound/snd_ar_tokens.h | 200 ++++++
sound/soc/qcom/Kconfig | 1 +
sound/soc/qcom/audioreach/Makefile | 2 +-
sound/soc/qcom/audioreach/audioreach.h | 3 +
sound/soc/qcom/audioreach/q6apm.c | 4 +-
sound/soc/qcom/audioreach/topology.c | 848 +++++++++++++++++++++++++
6 files changed, 1056 insertions(+), 2 deletions(-)
create mode 100644 include/uapi/sound/snd_ar_tokens.h
create mode 100644 sound/soc/qcom/audioreach/topology.c
diff --git a/include/uapi/sound/snd_ar_tokens.h b/include/uapi/sound/snd_ar_tokens.h
new file mode 100644
index 000000000000..8ca4823b7448
--- /dev/null
+++ b/include/uapi/sound/snd_ar_tokens.h
@@ -0,0 +1,200 @@
+#ifndef __SND_AR_TOKENS_H__
+#define __SND_AR_TOKENS_H__
+
+#define APM_SUB_GRAPH_PERF_MODE_LOW_POWER 0x1
+#define APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY 0x2
+
+#define APM_SUB_GRAPH_DIRECTION_TX 0x1
+#define APM_SUB_GRAPH_DIRECTION_RX 0x2
+
+/** Scenario ID Audio Playback */
+#define APM_SUB_GRAPH_SID_AUDIO_PLAYBACK 0x1
+/* Scenario ID Audio Record */
+#define APM_SUB_GRAPH_SID_AUDIO_RECORD 0x2
+/* Scenario ID Voice call. */
+#define APM_SUB_GRAPH_SID_VOICE_CALL 0x3
+
+/* container capability ID Pre/Post Processing (PP) */
+#define APM_CONTAINER_CAP_ID_PP 0x1
+/* container capability ID Compression/Decompression (CD) */
+#define APM_CONTAINER_CAP_ID_CD 0x2
+/* container capability ID End Point(EP) */
+#define APM_CONTAINER_CAP_ID_EP 0x3
+/* container capability ID Offload (OLC) */
+#define APM_CONTAINER_CAP_ID_OLC 0x4
+
+/* container graph position Stream */
+#define APM_CONT_GRAPH_POS_STREAM 0x1
+/* container graph position Per Stream Per Device*/
+#define APM_CONT_GRAPH_POS_PER_STR_PER_DEV 0x2
+/* container graph position Stream-Device */
+#define APM_CONT_GRAPH_POS_STR_DEV 0x3
+/* container graph position Global Device */
+#define APM_CONT_GRAPH_POS_GLOBAL_DEV 0x4
+
+#define APM_PROC_DOMAIN_ID_MDSP 0x1
+#define APM_PROC_DOMAIN_ID_ADSP 0x2
+#define APM_PROC_DOMAIN_ID_SDSP 0x4
+#define APM_PROC_DOMAIN_ID_CDSP 0x5
+
+#define PCM_INTERLEAVED 1
+#define PCM_DEINTERLEAVED_PACKED 2
+#define PCM_DEINTERLEAVED_UNPACKED 3
+#define AR_I2S_WS_SRC_EXTERNAL 0
+#define AR_I2S_WS_SRC_INTERNAL 1
+
+/*
+ * Kcontrol IDs
+ */
+#define SND_SOC_AR_TPLG_FE_BE_GRAPH_CTL_MIX 256
+
+/**
+ * %AR_TKN_U32_SUB_GRAPH_INSTANCE_ID: Sub Graph Instance Id
+ *
+ * %AR_TKN_U32_SUB_GRAPH_PERF_MODE: Performance mode of subgraph
+ * APM_SUB_GRAPH_PERF_MODE_LOW_POWER = 1,
+ * APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY = 2
+ *
+ * %AR_TKN_U32_SUB_GRAPH_DIRECTION: Direction of subgraph
+ * APM_SUB_GRAPH_DIRECTION_TX = 1,
+ * APM_SUB_GRAPH_DIRECTION_RX = 2
+ *
+ * %AR_TKN_U32_SUB_GRAPH_SCENARIO_ID: Scenario ID for subgraph
+ * APM_SUB_GRAPH_SID_AUDIO_PLAYBACK = 1,
+ * APM_SUB_GRAPH_SID_AUDIO_RECORD = 2,
+ * APM_SUB_GRAPH_SID_VOICE_CALL = 3
+ *
+ * %AR_TKN_U32_CONAINER_INSTANCE_ID: Container Instance ID
+ *
+ * %AR_TKN_U32_CONAINER_CAPABILITY_ID: Container capability ID
+ * APM_CONTAINER_CAP_ID_PP = 1,
+ * APM_CONTAINER_CAP_ID_CD = 2,
+ * APM_CONTAINER_CAP_ID_EP = 3,
+ * APM_CONTAINER_CAP_ID_OLC = 4
+ *
+ * %AR_TKN_U32_CONAINER_STACK_SIZE: Stack size in the container.
+ *
+ * %AR_TKN_U32_CONAINER_GRAPH_POS: Graph Position
+ * APM_CONT_GRAPH_POS_STREAM = 1,
+ * APM_CONT_GRAPH_POS_PER_STR_PER_DEV = 2,
+ * APM_CONT_GRAPH_POS_STR_DEV = 3,
+ * APM_CONT_GRAPH_POS_GLOBAL_DEV = 4
+ *
+ * %AR_TKN_U32_CONAINER_PROC_DOMAIN: Processor domain of container
+ * APM_PROC_DOMAIN_ID_MDSP = 1,
+ * APM_PROC_DOMAIN_ID_ADSP = 2,
+ * APM_PROC_DOMAIN_ID_SDSP = 4,
+ * APM_PROC_DOMAIN_ID_CDSP = 5
+ *
+ * %AR_TKN_U32_MODULE_ID: Module ID
+ *
+ * %AR_TKN_U32_MODULE_INSTANCE_ID: Module Instance ID.
+ *
+ * %AR_TKN_U32_MODULE_MAX_IP_PORTS: Module maximum input ports
+ *
+ * %AR_TKN_U32_MODULE_MAX_OP_PORTS: Module maximum output ports.
+ *
+ * %AR_TKN_U32_MODULE_IN_PORTS: Number of in ports
+ *
+ * %AR_TKN_U32_MODULE_OUT_PORTS: Number of out ports.
+ *
+ * %AR_TKN_U32_MODULE_SRC_OP_PORT_ID: Source module output port ID
+ *
+ * %AR_TKN_U32_MODULE_DST_IN_PORT_ID: Destination module input port ID
+ *
+ * %AR_TKN_U32_MODULE_HW_IF_IDX: Interface index types for I2S/LPAIF
+ *
+ * %AR_TKN_U32_MODULE_HW_IF_TYPE: Interface type
+ * LPAIF = 0,
+ * LPAIF_RXTX = 1,
+ * LPAIF_WSA = 2,
+ * LPAIF_VA = 3,
+ * LPAIF_AXI = 4
+ *
+ * %AR_TKN_U32_MODULE_FMT_INTERLEAVE: PCM Interleaving
+ * PCM_INTERLEAVED = 1,
+ * PCM_DEINTERLEAVED_PACKED = 2,
+ * PCM_DEINTERLEAVED_UNPACKED = 3
+ *
+ * %AR_TKN_U32_MODULE_FMT_DATA: data format
+ * FIXED POINT = 1,
+ * IEC60958 PACKETIZED = 3,
+ * IEC60958 PACKETIZED NON LINEAR = 8,
+ * COMPR OVER PCM PACKETIZED = 7,
+ * IEC61937 PACKETIZED = 2,
+ * GENERIC COMPRESSED = 5
+ *
+ * %AR_TKN_U32_MODULE_FMT_FREQ: bit rate
+ *
+ * %AR_TKN_U32_MODULE_FMT_BIT_DEPTH: bit depth
+ *
+ * %AR_TKN_U32_MODULE_SD_LINE_IDX: I2S serial data line idx
+ * I2S_SD0 = 1,
+ * I2S_SD1 = 2,
+ * I2S_SD2 = 3,
+ * I2S_SD3 = 4,
+ * I2S_QUAD01 = 5,
+ * I2S_QUAD23 = 6,
+ * I2S_6CHS = 7,
+ * I2S_8CHS = 8
+ *
+ * %AR_TKN_U32_MODULE_WS_SRC: Word Select Source
+ * AR_I2S_WS_SRC_EXTERNAL = 0,
+ * AR_I2S_WS_SRC_INTERNAL = 1,
+ *
+ * %AR_TKN_U32_MODULE_FRAME_SZ_FACTOR: Frame size factor
+ *
+ * %AR_TKN_U32_MODULE_LOG_CODE: Log Module Code
+ *
+ * %AR_TKN_U32_MODULE_LOG_TAP_POINT_ID: logging tap point of this module
+ *
+ * %AR_TKN_U32_MODULE_LOG_MODE: logging mode
+ * LOG_WAIT = 0,
+ * LOG_IMMEDIATELY = 1
+ *
+ * %AR_TKN_DAI_INDEX: dai index
+ *
+ */
+enum AR_TKNS {
+ /* SUB GRAPH Tokens */
+ AR_TKN_U32_SUB_GRAPH_INSTANCE_ID = 1,
+ AR_TKN_U32_SUB_GRAPH_PERF_MODE,
+ AR_TKN_U32_SUB_GRAPH_DIRECTION,
+ AR_TKN_U32_SUB_GRAPH_SCENARIO_ID,
+
+ /* Container Tokens */
+ AR_TKN_U32_CONAINER_INSTANCE_ID,
+ AR_TKN_U32_CONAINER_CAPABILITY_ID,
+ AR_TKN_U32_CONAINER_STACK_SIZE,
+ AR_TKN_U32_CONAINER_GRAPH_POS,
+ AR_TKN_U32_CONAINER_PROC_DOMAIN,
+
+ /* Module Tokens */
+ AR_TKN_U32_MODULE_ID,
+ AR_TKN_U32_MODULE_INSTANCE_ID,
+ AR_TKN_U32_MODULE_MAX_IP_PORTS,
+ AR_TKN_U32_MODULE_MAX_OP_PORTS,
+ AR_TKN_U32_MODULE_IN_PORTS,
+ AR_TKN_U32_MODULE_OUT_PORTS,
+ AR_TKN_U32_MODULE_SRC_OP_PORT_ID,
+ AR_TKN_U32_MODULE_DST_IN_PORT_ID,
+
+ AR_TKN_U32_MODULE_HW_IF_IDX,
+ AR_TKN_U32_MODULE_HW_IF_TYPE,
+ AR_TKN_U32_MODULE_FMT_INTERLEAVE,
+ AR_TKN_U32_MODULE_FMT_DATA,
+ AR_TKN_U32_MODULE_FMT_FREQ,
+ AR_TKN_U32_MODULE_FMT_BIT_DEPTH,
+ AR_TKN_U32_MODULE_SD_LINE_IDX,
+ AR_TKN_U32_MODULE_WS_SRC,
+ AR_TKN_U32_MODULE_FRAME_SZ_FACTOR,
+ AR_TKN_U32_MODULE_LOG_CODE,
+ AR_TKN_U32_MODULE_LOG_TAP_POINT_ID,
+ AR_TKN_U32_MODULE_LOG_MODE,
+
+ /* DAI Tokens */
+ AR_TKN_DAI_INDEX,
+ AR_TKN_MAX = AR_TKN_DAI_INDEX,
+};
+
+#endif /* __SND_AR_TOKENS_H__ */
diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
index 3070eccb6064..c0e7f4cb328f 100644
--- a/sound/soc/qcom/Kconfig
+++ b/sound/soc/qcom/Kconfig
@@ -106,6 +106,7 @@ config SND_SOC_QDSP6
config SND_SOC_QCOM_AUDIOREACH
tristate "SoC ALSA audio drives for Qualcomm AUDIOREACH"
depends on QCOM_GPR
+ select SND_SOC_TOPOLOGY
help
Support for AudioReach in QDSP
diff --git a/sound/soc/qcom/audioreach/Makefile b/sound/soc/qcom/audioreach/Makefile
index d76afc51556b..65ea488e4cc8 100644
--- a/sound/soc/qcom/audioreach/Makefile
+++ b/sound/soc/qcom/audioreach/Makefile
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
-snd-ar-objs := audioreach.o q6apm.o
+snd-ar-objs := audioreach.o q6apm.o topology.o
obj-$(CONFIG_SND_SOC_QCOM_AUDIOREACH) += snd-ar.o
diff --git a/sound/soc/qcom/audioreach/audioreach.h b/sound/soc/qcom/audioreach/audioreach.h
index 07423369cc84..069e2475f484 100644
--- a/sound/soc/qcom/audioreach/audioreach.h
+++ b/sound/soc/qcom/audioreach/audioreach.h
@@ -627,6 +627,9 @@ void *audioreach_alloc_pkt(int pkt_size, uint32_t opcode, uint32_t token,
void *audioreach_alloc_graph_pkt(struct q6apm *apm,
struct list_head *sg_list,
int graph_id);
+/* Topology specific */
+int audioreach_tplg_init(struct snd_soc_component *component);
+
/* Module specific */
void audioreach_graph_free_buf(struct q6apm_graph *graph);
int audioreach_map_memory_regions(struct q6apm_graph *graph,
diff --git a/sound/soc/qcom/audioreach/q6apm.c b/sound/soc/qcom/audioreach/q6apm.c
index 6a98c114ea7a..3e1c39161ae0 100644
--- a/sound/soc/qcom/audioreach/q6apm.c
+++ b/sound/soc/qcom/audioreach/q6apm.c
@@ -817,11 +817,13 @@ int q6apm_graph_flush(struct q6apm_graph *graph)
static int q6apm_audio_probe(struct snd_soc_component *component)
{
- return 0;
+ return audioreach_tplg_init(component);
}
static void q6apm_audio_remove(struct snd_soc_component *component)
{
+ /* remove topology */
+ snd_soc_tplg_component_remove(component);
}
#define APM_AUDIO_DRV_NAME "q6apm-audio"
diff --git a/sound/soc/qcom/audioreach/topology.c b/sound/soc/qcom/audioreach/topology.c
new file mode 100644
index 000000000000..8c233e012d05
--- /dev/null
+++ b/sound/soc/qcom/audioreach/topology.c
@@ -0,0 +1,848 @@
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/pcm.h>
+#include <sound/control.h>
+#include <sound/asound.h>
+#include <linux/firmware.h>
+#include <sound/soc-topology.h>
+#include <sound/soc-dpcm.h>
+#include <uapi/sound/snd_ar_tokens.h>
+#include <linux/kernel.h>
+#include <linux/wait.h>
+#include "q6apm.h"
+#include "audioreach.h"
+
+struct snd_ar_control {
+ u32 sgid; /* Sub Graph ID */
+ struct snd_soc_component *scomp;
+};
+
+static struct audioreach_graph_info *audioreach_tplg_alloc_graph_info(
+ struct q6apm *apm, uint32_t graph_id,
+ bool *found)
+{
+ struct audioreach_graph_info *info;
+
+ spin_lock(&apm->lock);
+ info = idr_find(&apm->graph_info_idr, graph_id);
+ spin_unlock(&apm->lock);
+
+ if (info) {
+ *found = true;
+ return info;
+ }
+
+ *found = false;
+ info = kzalloc(sizeof(*info), GFP_KERNEL);
+ if (!info)
+ return ERR_PTR(-ENOMEM);
+
+
+ INIT_LIST_HEAD(&info->sg_list);
+ spin_lock_init(&info->sg_list_lock);
+
+ spin_lock(&apm->lock);
+ idr_alloc(&apm->graph_info_idr, info, graph_id,
+ graph_id + 1, GFP_ATOMIC);
+ spin_unlock(&apm->lock);
+
+ info->id = graph_id;
+
+ return info;
+}
+
+static void audioreach_tplg_add_sub_graph(struct audioreach_sub_graph *sg,
+ struct audioreach_graph_info *info)
+{
+ list_add_tail(&sg->node, &info->sg_list);
+ info->num_sub_graphs++;
+}
+
+
+static struct audioreach_sub_graph *audioreach_tplg_alloc_sub_graph(
+ struct q6apm *apm,
+ uint32_t sub_graph_id,
+ bool *found)
+{
+ struct audioreach_sub_graph *sg = NULL;
+
+ /* Find if there is already a matching sub-graph */
+ spin_lock(&apm->lock);
+ sg = idr_find(&apm->sub_graphs_idr, sub_graph_id);
+ spin_unlock(&apm->lock);
+
+
+ if (sg) {
+ *found = true;
+ return sg;
+ }
+
+ *found = false;
+ sg = kzalloc(sizeof(*sg), GFP_KERNEL);
+ if (!sg)
+ return ERR_PTR(-ENOMEM);
+
+ INIT_LIST_HEAD(&sg->container_list);
+
+ spin_lock(&apm->lock);
+ idr_alloc(&apm->sub_graphs_idr, sg, sub_graph_id,
+ sub_graph_id + 1, GFP_ATOMIC);
+ spin_unlock(&apm->lock);
+
+ return sg;
+}
+
+static struct audioreach_container *audioreach_tplg_alloc_container(struct q6apm *apm,
+ struct audioreach_sub_graph *sg,
+ uint32_t container_id,
+ bool *found)
+{
+ struct audioreach_container *cont = NULL;
+
+ spin_lock(&apm->lock);
+ cont = idr_find(&apm->containers_idr, container_id);
+ spin_unlock(&apm->lock);
+
+ if (cont) {
+ *found = true;
+ return cont;
+ }
+ *found = false;
+
+ cont = kzalloc(sizeof(*cont), GFP_KERNEL);
+ if (!cont)
+ return ERR_PTR(-ENOMEM);
+
+ INIT_LIST_HEAD(&cont->modules_list);
+
+ spin_lock(&apm->lock);
+ idr_alloc(&apm->containers_idr, cont, container_id,
+ container_id + 1, GFP_ATOMIC);
+ spin_unlock(&apm->lock);
+
+ /* add to container list */
+ list_add_tail(&cont->node, &sg->container_list);
+ sg->num_containers++;
+
+ return cont;
+}
+
+static struct audioreach_module *audioreach_tplg_alloc_module(struct q6apm *apm,
+ struct audioreach_container *cont,
+ struct snd_soc_dapm_widget *w,
+ uint32_t module_id,
+ bool *found)
+{
+ struct audioreach_module *mod = NULL;
+
+ spin_lock(&apm->lock);
+ mod = idr_find(&apm->modules_idr, module_id);
+ spin_unlock(&apm->lock);
+
+ if (mod) {
+ *found = true;
+ return mod;
+ }
+ *found = false;
+ mod = kzalloc(sizeof(*mod), GFP_KERNEL);
+ if (!mod)
+ return ERR_PTR(-ENOMEM);
+
+ spin_lock(&apm->lock);
+ idr_alloc(&apm->modules_idr, mod, module_id,
+ module_id + 1, GFP_ATOMIC);
+ spin_unlock(&apm->lock);
+
+ /* add to module list */
+ list_add_tail(&mod->node, &cont->modules_list);
+ mod->container = cont;
+ mod->widget = w;
+ cont->num_modules++;
+
+ return mod;
+}
+
+static struct audioreach_sub_graph *audioreach_parse_sg_tokens(struct q6apm *apm,
+ struct snd_soc_tplg_vendor_array *sg_array)
+{
+ struct audioreach_graph_info *info = NULL;
+ struct snd_soc_tplg_vendor_value_elem *sg_elem = sg_array->value;
+ struct audioreach_sub_graph *sg;
+ int graph_id, sub_graph_id, tkn_count = 0;
+ bool found;
+
+ while (tkn_count <= (le32_to_cpu(sg_array->num_elems) - 1)) {
+ switch (le32_to_cpu(sg_elem->token)) {
+ case AR_TKN_U32_SUB_GRAPH_INSTANCE_ID:
+ sub_graph_id = le32_to_cpu(sg_elem->value);
+ sg = audioreach_tplg_alloc_sub_graph(apm, sub_graph_id, &found);
+ if (IS_ERR(sg)) {
+ return sg;
+ } else if (found) {
+ /* Already parsed data for this sub-graph */
+ return sg;
+ }
+ dev_err(apm->dev, "%s: New subgraph id : 0x%08x\n", __func__,
+ sub_graph_id);
+ sg->sub_graph_id = sub_graph_id;
+ break;
+ case AR_TKN_DAI_INDEX:
+ /* Sub graph is associated with predefined graph */
+ graph_id = le32_to_cpu(sg_elem->value);
+ info = audioreach_tplg_alloc_graph_info(apm, graph_id, &found);
+ if (IS_ERR(info))
+ return ERR_CAST(info);
+ break;
+ case AR_TKN_U32_SUB_GRAPH_PERF_MODE:
+ sg->perf_mode = le32_to_cpu(sg_elem->value);
+ break;
+ case AR_TKN_U32_SUB_GRAPH_DIRECTION:
+ sg->direction = le32_to_cpu(sg_elem->value);
+ break;
+ case AR_TKN_U32_SUB_GRAPH_SCENARIO_ID:
+ sg->scenario_id = le32_to_cpu(sg_elem->value);
+ break;
+ default:
+ dev_err(apm->dev, "Not a valid token %d for graph\n",
+ sg_elem->token);
+ break;
+
+ }
+ tkn_count++;
+ sg_elem++;
+ }
+
+ /* Sub graph is associated with predefined graph */
+ if (info) {
+ dev_err(apm->dev, "%s: adding subgraph id : 0x%08x -> %d\n", __func__,
+ sub_graph_id, graph_id);
+
+ audioreach_tplg_add_sub_graph(sg, info);
+ }
+
+ return sg;
+}
+
+
+static struct audioreach_container *audioreach_parse_cont_tokens(struct q6apm *apm,
+ struct audioreach_sub_graph *sg,
+ struct snd_soc_tplg_vendor_array *cont_array)
+{
+ struct snd_soc_tplg_vendor_value_elem *cont_elem;
+ struct audioreach_container *cont;
+ int container_id, tkn_count = 0;
+ bool found = false;
+
+ cont_elem = cont_array->value;
+ while (tkn_count <= (le32_to_cpu(cont_array->num_elems) - 1)) {
+ switch (le32_to_cpu(cont_elem->token)) {
+ case AR_TKN_U32_CONAINER_INSTANCE_ID:
+ container_id = le32_to_cpu(cont_elem->value);
+ cont = audioreach_tplg_alloc_container(apm, sg, container_id, &found);
+ if (IS_ERR(cont))
+ return ERR_PTR(-ENOMEM);
+ else if (found) /* Already parsed container data */
+ return cont;
+
+ cont->container_id = container_id;
+ break;
+ case AR_TKN_U32_CONAINER_CAPABILITY_ID:
+ cont->capability_id = le32_to_cpu(cont_elem->value);
+ break;
+ case AR_TKN_U32_CONAINER_STACK_SIZE:
+ cont->stack_size = le32_to_cpu(cont_elem->value);
+ break;
+ case AR_TKN_U32_CONAINER_GRAPH_POS:
+ cont->graph_pos = le32_to_cpu(cont_elem->value);
+ break;
+ case AR_TKN_U32_CONAINER_PROC_DOMAIN:
+ cont->proc_domain = le32_to_cpu(cont_elem->value);
+ break;
+ default:
+ dev_err(apm->dev, "Not a valid token %d for graph\n",
+ cont_elem->token);
+ break;
+
+ }
+ tkn_count++;
+ cont_elem++;
+ }
+
+ return cont;
+}
+
+static struct audioreach_module *audioreach_parse_common_tokens(struct q6apm *apm,
+ struct audioreach_container *cont,
+ struct snd_soc_tplg_vendor_array *mod_array,
+ struct snd_soc_dapm_widget *w)
+{
+ struct snd_soc_tplg_vendor_value_elem *mod_elem;
+ struct audioreach_module *mod;
+ int module_iid, tkn_count = 0;
+ bool found;
+
+ mod_elem = mod_array->value;
+ module_iid = le32_to_cpu(mod_elem->value);
+
+ mod = audioreach_tplg_alloc_module(apm, cont, w, module_iid, &found);
+ if (IS_ERR(mod)) {
+ return ERR_PTR(-ENOMEM);
+ } else if (found) {
+ dev_err(apm->dev, "Duplicate Module Instance ID 0x%08x found\n", module_iid);
+ return ERR_PTR(-EINVAL);
+ }
+
+ while (tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) {
+ switch (le32_to_cpu(mod_elem->token)) {
+ /* common module info */
+ case AR_TKN_U32_MODULE_ID:
+ mod->module_id = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_INSTANCE_ID:
+ mod->instance_id = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_MAX_IP_PORTS:
+ mod->max_ip_port = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_MAX_OP_PORTS:
+ mod->max_op_port = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_IN_PORTS:
+ mod->in_port = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_OUT_PORTS:
+ mod->out_port = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_SRC_OP_PORT_ID:
+ mod->src_mod_op_port_id = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_DST_IN_PORT_ID:
+ mod->dst_mod_ip_port_id = le32_to_cpu(mod_elem->value);
+
+ default:
+ break;
+
+ }
+ tkn_count++;
+ mod_elem++;
+ }
+
+ return mod;
+}
+
+static int audioreach_widget_load_module_common(struct snd_soc_component *component,
+ int index, struct snd_soc_dapm_widget *w,
+ struct snd_soc_tplg_dapm_widget *tplg_w,
+ size_t *sz)
+{
+ struct q6apm *apm = dev_get_drvdata(component->dev);
+ struct audioreach_sub_graph *sg;
+ struct audioreach_container *cont;
+ struct audioreach_module *mod;
+ struct snd_soc_dobj *dobj;
+ void *data = tplg_w->priv.data;
+ struct snd_soc_tplg_vendor_array *array = &tplg_w->priv.array[0];
+
+ sg = audioreach_parse_sg_tokens(apm, &tplg_w->priv.array[0]);
+ if (IS_ERR(sg))
+ return PTR_ERR(sg);
+
+ *sz = le32_to_cpu(array->size);
+ array = data + *sz;
+ cont = audioreach_parse_cont_tokens(apm, sg, array);
+ if (IS_ERR(cont))
+ return PTR_ERR(cont);
+
+ *sz = *sz + le32_to_cpu(array->size);
+ array = data + *sz;
+ mod = audioreach_parse_common_tokens(apm, cont, array, w);
+ if (IS_ERR(mod))
+ return PTR_ERR(mod);
+
+ dobj = &w->dobj;
+ dobj->private = mod;
+
+ return 0;
+}
+
+static int audioreach_widget_load_pcm(struct snd_soc_component *component,
+ int index, struct snd_soc_dapm_widget *w,
+ struct snd_soc_tplg_dapm_widget *tplg_w)
+{
+ size_t sz;
+
+ return audioreach_widget_load_module_common(component, index, w,
+ tplg_w, &sz);
+}
+
+static int audioreach_widget_load_enc_dec_cnv(struct snd_soc_component *component,
+ int index, struct snd_soc_dapm_widget *w,
+ struct snd_soc_tplg_dapm_widget *tplg_w)
+{
+ struct snd_soc_tplg_vendor_array *mod_array;
+ struct snd_soc_tplg_vendor_value_elem *mod_elem;
+ struct audioreach_module *mod;
+ struct snd_soc_dobj *dobj;
+ size_t sz;
+ int tkn_count = 0;
+ int ret;
+
+ ret = audioreach_widget_load_module_common(component, index, w, tplg_w,
+ &sz);
+ if (ret)
+ return ret;
+
+ dobj = &w->dobj;
+ mod = dobj->private;
+ mod_array = (struct snd_soc_tplg_vendor_array *)((u8 *)tplg_w->priv.data + sz);
+ mod_elem = mod_array->value;
+
+ while (tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) {
+ switch (le32_to_cpu(mod_elem->token)) {
+ case AR_TKN_U32_MODULE_FMT_INTERLEAVE:
+ mod->interleave_type = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_FMT_FREQ:
+ mod->rate = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_FMT_BIT_DEPTH:
+ mod->bit_depth = le32_to_cpu(mod_elem->value);
+ break;
+ default:
+ break;
+ }
+ tkn_count++;
+ mod_elem++;
+ }
+
+ return 0;
+}
+
+static int audioreach_widget_log_module_load(struct audioreach_module *mod,
+ struct snd_soc_tplg_vendor_array *mod_array)
+{
+ struct snd_soc_tplg_vendor_value_elem *mod_elem;
+ int tkn_count = 0;
+
+ mod_elem = mod_array->value;
+
+ while (tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) {
+ switch (le32_to_cpu(mod_elem->token)) {
+
+ case AR_TKN_U32_MODULE_LOG_CODE:
+ mod->log_code = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_LOG_TAP_POINT_ID:
+ mod->log_tap_point_id = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_LOG_MODE:
+ mod->mode = le32_to_cpu(mod_elem->value);
+ break;
+ default:
+ break;
+ }
+ tkn_count++;
+ mod_elem++;
+ }
+
+ return 0;
+}
+
+static int audioreach_widget_dma_module_load(struct audioreach_module *mod,
+ struct snd_soc_tplg_vendor_array *mod_array)
+{
+ struct snd_soc_tplg_vendor_value_elem *mod_elem;
+ int tkn_count = 0;
+
+ mod_elem = mod_array->value;
+
+ while (tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) {
+ switch (le32_to_cpu(mod_elem->token)) {
+ case AR_TKN_U32_MODULE_HW_IF_IDX:
+ mod->hw_interface_idx = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_FMT_DATA:
+ mod->data_format = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_HW_IF_TYPE:
+ mod->hw_interface_type = le32_to_cpu(mod_elem->value);
+ break;
+ default:
+ break;
+ }
+ tkn_count++;
+ mod_elem++;
+ }
+
+ return 0;
+}
+
+static int audioreach_widget_load_buffer(struct snd_soc_component *component,
+ int index, struct snd_soc_dapm_widget *w,
+ struct snd_soc_tplg_dapm_widget *tplg_w)
+{
+ struct snd_soc_tplg_vendor_array *mod_array;
+ struct audioreach_module *mod;
+ struct snd_soc_dobj *dobj;
+ size_t sz;
+ int ret;
+
+ ret = audioreach_widget_load_module_common(component, index, w, tplg_w,
+ &sz);
+ if (ret)
+ return ret;
+
+ dobj = &w->dobj;
+ mod = dobj->private;
+
+ mod_array = (struct snd_soc_tplg_vendor_array *)((u8 *)tplg_w->priv.data + sz);
+
+ switch (mod->module_id) {
+ case MODULE_ID_CODEC_DMA_SINK:
+ case MODULE_ID_CODEC_DMA_SOURCE:
+ audioreach_widget_dma_module_load(mod, mod_array);
+ break;
+ case MODULE_ID_DATA_LOGGING:
+ audioreach_widget_log_module_load(mod, mod_array);
+ break;
+ }
+
+ return 0;
+}
+
+static int audioreach_widget_load_mixer(struct snd_soc_component *component,
+ int index, struct snd_soc_dapm_widget *w,
+ struct snd_soc_tplg_dapm_widget *tplg_w)
+{
+ struct snd_soc_tplg_vendor_value_elem *w_elem;
+ struct snd_soc_tplg_vendor_array *w_array;
+ struct snd_ar_control *scontrol;
+ struct snd_soc_dobj *dobj;
+ int tkn_count = 0;
+
+ dev_err(component->dev, "DEBUG:: %s \n", __func__);
+ w_array = &tplg_w->priv.array[0];
+
+ scontrol = kzalloc(sizeof(*scontrol), GFP_KERNEL);
+ if (!scontrol)
+ return -ENOMEM;
+
+ scontrol->scomp = component;
+ dobj = &w->dobj;
+ dobj->private = scontrol;
+
+ w_elem = w_array->value;
+ while (tkn_count <= (le32_to_cpu(w_array->num_elems) - 1)) {
+ switch (le32_to_cpu(w_elem->token)) {
+ case AR_TKN_U32_SUB_GRAPH_INSTANCE_ID:
+ scontrol->sgid = le32_to_cpu(w_elem->value);
+ break;
+ default: /* ignore other tokens */
+ break;
+ }
+ tkn_count++;
+ w_elem++;
+ }
+
+ return 0;
+}
+
+static int audioreach_widget_ready(struct snd_soc_component *component,
+ int index, struct snd_soc_dapm_widget *w,
+ struct snd_soc_tplg_dapm_widget *tplg_w)
+{
+ switch (w->id) {
+ case snd_soc_dapm_aif_in:
+ case snd_soc_dapm_aif_out:
+ audioreach_widget_load_pcm(component, index, w, tplg_w);
+ break;
+ case snd_soc_dapm_decoder:
+ case snd_soc_dapm_encoder:
+ case snd_soc_dapm_src:
+ audioreach_widget_load_enc_dec_cnv(component, index, w, tplg_w);
+ break;
+ case snd_soc_dapm_buffer:
+ audioreach_widget_load_buffer(component, index, w, tplg_w);
+ break;
+ case snd_soc_dapm_mixer:
+ return audioreach_widget_load_mixer(component, index, w, tplg_w);
+ case snd_soc_dapm_dai_link:
+ case snd_soc_dapm_pga:
+ case snd_soc_dapm_scheduler:
+ case snd_soc_dapm_out_drv:
+ default:
+ dev_err(component->dev, "Widget type (0x%x) not yet supported\n",
+ w->id);
+ break;
+ }
+
+ return 0;
+}
+
+
+static int audioreach_widget_unload(struct snd_soc_component *scomp,
+ struct snd_soc_dobj *dobj)
+{
+ struct q6apm *apm = dev_get_drvdata(scomp->dev);
+ struct audioreach_container *cont;
+ struct audioreach_module *mod;
+
+ mod = dobj->private;
+ cont = mod->container;
+ /* find a way to remove the container and sub-graph */
+
+ spin_lock(&apm->lock);
+ idr_remove(&apm->modules_idr, mod->module_id);
+ cont->num_modules--;
+
+ /* delete list */
+ list_del(&mod->node);
+ /* free memory */
+ kfree(mod);
+
+ if (list_empty(&cont->modules_list)) { /* remove container */
+ struct audioreach_sub_graph *sg = cont->sub_graph;
+
+ idr_remove(&apm->containers_idr, cont->container_id);
+ list_del(&cont->node);
+ sg->num_containers--;
+ kfree(cont);
+ if (list_empty(&sg->container_list)) { /* remove sg */
+ struct audioreach_graph_info *info = sg->info;
+
+ idr_remove(&apm->sub_graphs_idr, sg->sub_graph_id);
+ list_del(&sg->node);
+ info->num_sub_graphs--;
+ kfree(sg);
+ if (list_empty(&info->sg_list)) { /* remove graph info */
+ idr_remove(&apm->graph_info_idr, info->id);
+ kfree(info);
+ }
+ }
+ }
+
+ spin_unlock(&apm->lock);
+
+ return 0;
+}
+
+static struct audioreach_module *audioreach_find_widget(struct snd_soc_component *comp,
+ const char *name)
+{
+ struct q6apm *apm = dev_get_drvdata(comp->dev);
+ struct audioreach_module *module;
+ int id;
+
+ idr_for_each_entry(&apm->modules_idr, module, id) {
+ if (!strcmp(name, module->widget->name))
+ return module;
+ }
+
+ return NULL;
+}
+
+static int audioreach_route_load(struct snd_soc_component *scomp, int index,
+ struct snd_soc_dapm_route *route)
+{
+ struct audioreach_module *src, *sink;
+
+ src = audioreach_find_widget(scomp, route->source);
+ sink = audioreach_find_widget(scomp, route->sink);
+
+ if (src && sink) {
+ src->dst_mod_inst_id = sink->instance_id;
+ sink->src_mod_inst_id = src->instance_id;
+ }
+
+ return 0;
+}
+
+static int audioreach_route_unload(struct snd_soc_component *scomp,
+ struct snd_soc_dobj *dobj)
+{
+
+ return 0;
+}
+
+static void audioreach_tplg_complete(struct snd_soc_component *component)
+{
+ /* TBD */
+}
+
+/* DAI link - used for any driver specific init */
+static int audioreach_link_load(struct snd_soc_component *component, int index,
+ struct snd_soc_dai_link *link,
+ struct snd_soc_tplg_link_config *cfg)
+{
+ link->nonatomic = true;
+ link->dynamic = true;
+ link->platforms->name = NULL;
+ link->platforms->of_node = of_get_compatible_child(component->dev->of_node,
+ "qcom,q6apm-dais");
+ link->trigger[0] = SND_SOC_DPCM_TRIGGER_POST;
+ link->trigger[1] = SND_SOC_DPCM_TRIGGER_POST;
+
+ return 0;
+}
+
+static int audioreach_get_audio_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_dapm_widget *dw = snd_soc_dapm_kcontrol_widget(kcontrol);
+ struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol);
+ struct snd_soc_component *c = snd_soc_dapm_to_component(dapm);
+ struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value;
+ struct snd_ar_control *scontrol = mc->dobj.private;
+ struct snd_ar_control *dapm_scontrol = dw->dobj.private;
+ struct q6apm *data = dev_get_drvdata(c->dev);
+ bool connected;
+
+ connected = q6apm_is_sub_graphs_connected(data, scontrol->sgid,
+ dapm_scontrol->sgid);
+ if (connected)
+ ucontrol->value.integer.value[0] = 1;
+ else
+ ucontrol->value.integer.value[0] = 0;
+
+ return 0;
+}
+
+static int audioreach_put_audio_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_dapm_widget *dw = snd_soc_dapm_kcontrol_widget(kcontrol);
+ struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol);
+ struct snd_soc_component *c = snd_soc_dapm_to_component(dapm);
+ struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value;
+ struct snd_ar_control *scontrol = mc->dobj.private;
+ struct snd_ar_control *dapm_scontrol = dw->dobj.private;
+ struct q6apm *data = dev_get_drvdata(c->dev);
+ struct snd_soc_dapm_update *update = NULL;
+
+ if (ucontrol->value.integer.value[0]) {
+ q6apm_connect_sub_graphs(data, scontrol->sgid,
+ dapm_scontrol->sgid, true);
+ snd_soc_dapm_mixer_update_power(dapm, kcontrol, 1, update);
+ } else {
+ q6apm_connect_sub_graphs(data, scontrol->sgid,
+ dapm_scontrol->sgid, false);
+ snd_soc_dapm_mixer_update_power(dapm, kcontrol, 0, update);
+ }
+ return 0;
+}
+
+static int audioreach_control_load_volume(struct snd_soc_component *scomp,
+ struct snd_ar_control *scontrol,
+ struct snd_kcontrol_new *kc,
+ struct snd_soc_tplg_ctl_hdr *hdr)
+{
+ struct snd_soc_tplg_mixer_control *mc = container_of(hdr, struct snd_soc_tplg_mixer_control, hdr);
+ struct snd_soc_tplg_vendor_array *c_array =(struct snd_soc_tplg_vendor_array *)mc->priv.data;
+ int tkn_count = 0;
+ struct snd_soc_tplg_vendor_value_elem *c_elem;
+
+ c_elem = c_array->value;
+
+ while (tkn_count <= (le32_to_cpu(c_array->num_elems) - 1)) {
+ switch (le32_to_cpu(c_elem->token)) {
+ case AR_TKN_U32_SUB_GRAPH_INSTANCE_ID:
+ scontrol->sgid = le32_to_cpu(c_elem->value);
+ break;
+ default:
+ /* Ignore other tokens */
+ break;
+
+ }
+ c_elem++;
+ tkn_count++;
+ }
+
+ return 0;
+}
+
+static int audioreach_control_load(struct snd_soc_component *scomp, int index,
+ struct snd_kcontrol_new *kc,
+ struct snd_soc_tplg_ctl_hdr *hdr)
+{
+ struct snd_ar_control *scontrol;
+ struct snd_soc_dobj *dobj;
+ struct soc_mixer_control *sm;
+ int ret;
+
+ scontrol = kzalloc(sizeof(*scontrol), GFP_KERNEL);
+ if (!scontrol)
+ return -ENOMEM;
+
+ scontrol->scomp = scomp;
+
+ switch (le32_to_cpu(hdr->ops.info)) {
+ case SND_SOC_TPLG_CTL_VOLSW:
+ sm = (struct soc_mixer_control *)kc->private_value;
+ dobj = &sm->dobj;
+ ret = audioreach_control_load_volume(scomp, scontrol, kc, hdr);
+ break;
+ default:
+ dev_warn(scomp->dev, "control type not supported %d:%d:%d\n",
+ hdr->ops.get, hdr->ops.put, hdr->ops.info);
+ kfree(scontrol);
+ break;
+ }
+
+ dobj->private = scontrol;
+ return ret;
+}
+
+static int audioreach_control_unload(struct snd_soc_component *scomp,
+ struct snd_soc_dobj *dobj)
+{
+ struct snd_ar_control *scontrol = dobj->private;
+
+ kfree(scontrol);
+
+ return 0;
+}
+
+static const struct snd_soc_tplg_kcontrol_ops audioreach_io_ops[] = {
+ {SND_SOC_AR_TPLG_FE_BE_GRAPH_CTL_MIX, audioreach_get_audio_mixer,
+ audioreach_put_audio_mixer, snd_soc_info_volsw},
+};
+
+static struct snd_soc_tplg_ops audioreach_tplg_ops = {
+ .io_ops = audioreach_io_ops,
+ .io_ops_count = ARRAY_SIZE(audioreach_io_ops),
+
+ .control_load = audioreach_control_load,
+ .control_unload = audioreach_control_unload,
+
+ .widget_ready = audioreach_widget_ready,
+ .widget_unload = audioreach_widget_unload,
+
+ .complete = audioreach_tplg_complete,
+ .link_load = audioreach_link_load,
+
+ .dapm_route_load = audioreach_route_load,
+ .dapm_route_unload = audioreach_route_unload,
+};
+
+int audioreach_tplg_init(struct snd_soc_component *component)
+{
+ struct device *dev = component->dev;
+ const struct firmware *fw;
+ int ret;
+
+ ret = request_firmware(&fw, "audioreach.bin", dev);
+ if (ret < 0) {
+ dev_err(dev, "tplg fw audioreach.bin load failed with %d\n", ret);
+ return ret;
+ }
+
+ ret = snd_soc_tplg_component_load(component, &audioreach_tplg_ops, fw);
+ if (ret < 0) {
+ dev_err(dev, "tplg component load failed%d\n", ret);
+ release_firmware(fw);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(audioreach_tplg_init);
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* [RFC PATCH 07/13] ASoC: qcom: audioreach: add topology support
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
Add ASoC topology support in audioreach
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
include/uapi/sound/snd_ar_tokens.h | 200 ++++++
sound/soc/qcom/Kconfig | 1 +
sound/soc/qcom/audioreach/Makefile | 2 +-
sound/soc/qcom/audioreach/audioreach.h | 3 +
sound/soc/qcom/audioreach/q6apm.c | 4 +-
sound/soc/qcom/audioreach/topology.c | 848 +++++++++++++++++++++++++
6 files changed, 1056 insertions(+), 2 deletions(-)
create mode 100644 include/uapi/sound/snd_ar_tokens.h
create mode 100644 sound/soc/qcom/audioreach/topology.c
diff --git a/include/uapi/sound/snd_ar_tokens.h b/include/uapi/sound/snd_ar_tokens.h
new file mode 100644
index 000000000000..8ca4823b7448
--- /dev/null
+++ b/include/uapi/sound/snd_ar_tokens.h
@@ -0,0 +1,200 @@
+#ifndef __SND_AR_TOKENS_H__
+#define __SND_AR_TOKENS_H__
+
+#define APM_SUB_GRAPH_PERF_MODE_LOW_POWER 0x1
+#define APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY 0x2
+
+#define APM_SUB_GRAPH_DIRECTION_TX 0x1
+#define APM_SUB_GRAPH_DIRECTION_RX 0x2
+
+/** Scenario ID Audio Playback */
+#define APM_SUB_GRAPH_SID_AUDIO_PLAYBACK 0x1
+/* Scenario ID Audio Record */
+#define APM_SUB_GRAPH_SID_AUDIO_RECORD 0x2
+/* Scenario ID Voice call. */
+#define APM_SUB_GRAPH_SID_VOICE_CALL 0x3
+
+/* container capability ID Pre/Post Processing (PP) */
+#define APM_CONTAINER_CAP_ID_PP 0x1
+/* container capability ID Compression/Decompression (CD) */
+#define APM_CONTAINER_CAP_ID_CD 0x2
+/* container capability ID End Point(EP) */
+#define APM_CONTAINER_CAP_ID_EP 0x3
+/* container capability ID Offload (OLC) */
+#define APM_CONTAINER_CAP_ID_OLC 0x4
+
+/* container graph position Stream */
+#define APM_CONT_GRAPH_POS_STREAM 0x1
+/* container graph position Per Stream Per Device*/
+#define APM_CONT_GRAPH_POS_PER_STR_PER_DEV 0x2
+/* container graph position Stream-Device */
+#define APM_CONT_GRAPH_POS_STR_DEV 0x3
+/* container graph position Global Device */
+#define APM_CONT_GRAPH_POS_GLOBAL_DEV 0x4
+
+#define APM_PROC_DOMAIN_ID_MDSP 0x1
+#define APM_PROC_DOMAIN_ID_ADSP 0x2
+#define APM_PROC_DOMAIN_ID_SDSP 0x4
+#define APM_PROC_DOMAIN_ID_CDSP 0x5
+
+#define PCM_INTERLEAVED 1
+#define PCM_DEINTERLEAVED_PACKED 2
+#define PCM_DEINTERLEAVED_UNPACKED 3
+#define AR_I2S_WS_SRC_EXTERNAL 0
+#define AR_I2S_WS_SRC_INTERNAL 1
+
+/*
+ * Kcontrol IDs
+ */
+#define SND_SOC_AR_TPLG_FE_BE_GRAPH_CTL_MIX 256
+
+/**
+ * %AR_TKN_U32_SUB_GRAPH_INSTANCE_ID: Sub Graph Instance Id
+ *
+ * %AR_TKN_U32_SUB_GRAPH_PERF_MODE: Performance mode of subgraph
+ * APM_SUB_GRAPH_PERF_MODE_LOW_POWER = 1,
+ * APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY = 2
+ *
+ * %AR_TKN_U32_SUB_GRAPH_DIRECTION: Direction of subgraph
+ * APM_SUB_GRAPH_DIRECTION_TX = 1,
+ * APM_SUB_GRAPH_DIRECTION_RX = 2
+ *
+ * %AR_TKN_U32_SUB_GRAPH_SCENARIO_ID: Scenario ID for subgraph
+ * APM_SUB_GRAPH_SID_AUDIO_PLAYBACK = 1,
+ * APM_SUB_GRAPH_SID_AUDIO_RECORD = 2,
+ * APM_SUB_GRAPH_SID_VOICE_CALL = 3
+ *
+ * %AR_TKN_U32_CONAINER_INSTANCE_ID: Container Instance ID
+ *
+ * %AR_TKN_U32_CONAINER_CAPABILITY_ID: Container capability ID
+ * APM_CONTAINER_CAP_ID_PP = 1,
+ * APM_CONTAINER_CAP_ID_CD = 2,
+ * APM_CONTAINER_CAP_ID_EP = 3,
+ * APM_CONTAINER_CAP_ID_OLC = 4
+ *
+ * %AR_TKN_U32_CONAINER_STACK_SIZE: Stack size in the container.
+ *
+ * %AR_TKN_U32_CONAINER_GRAPH_POS: Graph Position
+ * APM_CONT_GRAPH_POS_STREAM = 1,
+ * APM_CONT_GRAPH_POS_PER_STR_PER_DEV = 2,
+ * APM_CONT_GRAPH_POS_STR_DEV = 3,
+ * APM_CONT_GRAPH_POS_GLOBAL_DEV = 4
+ *
+ * %AR_TKN_U32_CONAINER_PROC_DOMAIN: Processor domain of container
+ * APM_PROC_DOMAIN_ID_MDSP = 1,
+ * APM_PROC_DOMAIN_ID_ADSP = 2,
+ * APM_PROC_DOMAIN_ID_SDSP = 4,
+ * APM_PROC_DOMAIN_ID_CDSP = 5
+ *
+ * %AR_TKN_U32_MODULE_ID: Module ID
+ *
+ * %AR_TKN_U32_MODULE_INSTANCE_ID: Module Instance ID.
+ *
+ * %AR_TKN_U32_MODULE_MAX_IP_PORTS: Module maximum input ports
+ *
+ * %AR_TKN_U32_MODULE_MAX_OP_PORTS: Module maximum output ports.
+ *
+ * %AR_TKN_U32_MODULE_IN_PORTS: Number of in ports
+ *
+ * %AR_TKN_U32_MODULE_OUT_PORTS: Number of out ports.
+ *
+ * %AR_TKN_U32_MODULE_SRC_OP_PORT_ID: Source module output port ID
+ *
+ * %AR_TKN_U32_MODULE_DST_IN_PORT_ID: Destination module input port ID
+ *
+ * %AR_TKN_U32_MODULE_HW_IF_IDX: Interface index types for I2S/LPAIF
+ *
+ * %AR_TKN_U32_MODULE_HW_IF_TYPE: Interface type
+ * LPAIF = 0,
+ * LPAIF_RXTX = 1,
+ * LPAIF_WSA = 2,
+ * LPAIF_VA = 3,
+ * LPAIF_AXI = 4
+ *
+ * %AR_TKN_U32_MODULE_FMT_INTERLEAVE: PCM Interleaving
+ * PCM_INTERLEAVED = 1,
+ * PCM_DEINTERLEAVED_PACKED = 2,
+ * PCM_DEINTERLEAVED_UNPACKED = 3
+ *
+ * %AR_TKN_U32_MODULE_FMT_DATA: data format
+ * FIXED POINT = 1,
+ * IEC60958 PACKETIZED = 3,
+ * IEC60958 PACKETIZED NON LINEAR = 8,
+ * COMPR OVER PCM PACKETIZED = 7,
+ * IEC61937 PACKETIZED = 2,
+ * GENERIC COMPRESSED = 5
+ *
+ * %AR_TKN_U32_MODULE_FMT_FREQ: bit rate
+ *
+ * %AR_TKN_U32_MODULE_FMT_BIT_DEPTH: bit depth
+ *
+ * %AR_TKN_U32_MODULE_SD_LINE_IDX: I2S serial data line idx
+ * I2S_SD0 = 1,
+ * I2S_SD1 = 2,
+ * I2S_SD2 = 3,
+ * I2S_SD3 = 4,
+ * I2S_QUAD01 = 5,
+ * I2S_QUAD23 = 6,
+ * I2S_6CHS = 7,
+ * I2S_8CHS = 8
+ *
+ * %AR_TKN_U32_MODULE_WS_SRC: Word Select Source
+ * AR_I2S_WS_SRC_EXTERNAL = 0,
+ * AR_I2S_WS_SRC_INTERNAL = 1,
+ *
+ * %AR_TKN_U32_MODULE_FRAME_SZ_FACTOR: Frame size factor
+ *
+ * %AR_TKN_U32_MODULE_LOG_CODE: Log Module Code
+ *
+ * %AR_TKN_U32_MODULE_LOG_TAP_POINT_ID: logging tap point of this module
+ *
+ * %AR_TKN_U32_MODULE_LOG_MODE: logging mode
+ * LOG_WAIT = 0,
+ * LOG_IMMEDIATELY = 1
+ *
+ * %AR_TKN_DAI_INDEX: dai index
+ *
+ */
+enum AR_TKNS {
+ /* SUB GRAPH Tokens */
+ AR_TKN_U32_SUB_GRAPH_INSTANCE_ID = 1,
+ AR_TKN_U32_SUB_GRAPH_PERF_MODE,
+ AR_TKN_U32_SUB_GRAPH_DIRECTION,
+ AR_TKN_U32_SUB_GRAPH_SCENARIO_ID,
+
+ /* Container Tokens */
+ AR_TKN_U32_CONAINER_INSTANCE_ID,
+ AR_TKN_U32_CONAINER_CAPABILITY_ID,
+ AR_TKN_U32_CONAINER_STACK_SIZE,
+ AR_TKN_U32_CONAINER_GRAPH_POS,
+ AR_TKN_U32_CONAINER_PROC_DOMAIN,
+
+ /* Module Tokens */
+ AR_TKN_U32_MODULE_ID,
+ AR_TKN_U32_MODULE_INSTANCE_ID,
+ AR_TKN_U32_MODULE_MAX_IP_PORTS,
+ AR_TKN_U32_MODULE_MAX_OP_PORTS,
+ AR_TKN_U32_MODULE_IN_PORTS,
+ AR_TKN_U32_MODULE_OUT_PORTS,
+ AR_TKN_U32_MODULE_SRC_OP_PORT_ID,
+ AR_TKN_U32_MODULE_DST_IN_PORT_ID,
+
+ AR_TKN_U32_MODULE_HW_IF_IDX,
+ AR_TKN_U32_MODULE_HW_IF_TYPE,
+ AR_TKN_U32_MODULE_FMT_INTERLEAVE,
+ AR_TKN_U32_MODULE_FMT_DATA,
+ AR_TKN_U32_MODULE_FMT_FREQ,
+ AR_TKN_U32_MODULE_FMT_BIT_DEPTH,
+ AR_TKN_U32_MODULE_SD_LINE_IDX,
+ AR_TKN_U32_MODULE_WS_SRC,
+ AR_TKN_U32_MODULE_FRAME_SZ_FACTOR,
+ AR_TKN_U32_MODULE_LOG_CODE,
+ AR_TKN_U32_MODULE_LOG_TAP_POINT_ID,
+ AR_TKN_U32_MODULE_LOG_MODE,
+
+ /* DAI Tokens */
+ AR_TKN_DAI_INDEX,
+ AR_TKN_MAX = AR_TKN_DAI_INDEX,
+};
+
+#endif /* __SND_AR_TOKENS_H__ */
diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
index 3070eccb6064..c0e7f4cb328f 100644
--- a/sound/soc/qcom/Kconfig
+++ b/sound/soc/qcom/Kconfig
@@ -106,6 +106,7 @@ config SND_SOC_QDSP6
config SND_SOC_QCOM_AUDIOREACH
tristate "SoC ALSA audio drives for Qualcomm AUDIOREACH"
depends on QCOM_GPR
+ select SND_SOC_TOPOLOGY
help
Support for AudioReach in QDSP
diff --git a/sound/soc/qcom/audioreach/Makefile b/sound/soc/qcom/audioreach/Makefile
index d76afc51556b..65ea488e4cc8 100644
--- a/sound/soc/qcom/audioreach/Makefile
+++ b/sound/soc/qcom/audioreach/Makefile
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
-snd-ar-objs := audioreach.o q6apm.o
+snd-ar-objs := audioreach.o q6apm.o topology.o
obj-$(CONFIG_SND_SOC_QCOM_AUDIOREACH) += snd-ar.o
diff --git a/sound/soc/qcom/audioreach/audioreach.h b/sound/soc/qcom/audioreach/audioreach.h
index 07423369cc84..069e2475f484 100644
--- a/sound/soc/qcom/audioreach/audioreach.h
+++ b/sound/soc/qcom/audioreach/audioreach.h
@@ -627,6 +627,9 @@ void *audioreach_alloc_pkt(int pkt_size, uint32_t opcode, uint32_t token,
void *audioreach_alloc_graph_pkt(struct q6apm *apm,
struct list_head *sg_list,
int graph_id);
+/* Topology specific */
+int audioreach_tplg_init(struct snd_soc_component *component);
+
/* Module specific */
void audioreach_graph_free_buf(struct q6apm_graph *graph);
int audioreach_map_memory_regions(struct q6apm_graph *graph,
diff --git a/sound/soc/qcom/audioreach/q6apm.c b/sound/soc/qcom/audioreach/q6apm.c
index 6a98c114ea7a..3e1c39161ae0 100644
--- a/sound/soc/qcom/audioreach/q6apm.c
+++ b/sound/soc/qcom/audioreach/q6apm.c
@@ -817,11 +817,13 @@ int q6apm_graph_flush(struct q6apm_graph *graph)
static int q6apm_audio_probe(struct snd_soc_component *component)
{
- return 0;
+ return audioreach_tplg_init(component);
}
static void q6apm_audio_remove(struct snd_soc_component *component)
{
+ /* remove topology */
+ snd_soc_tplg_component_remove(component);
}
#define APM_AUDIO_DRV_NAME "q6apm-audio"
diff --git a/sound/soc/qcom/audioreach/topology.c b/sound/soc/qcom/audioreach/topology.c
new file mode 100644
index 000000000000..8c233e012d05
--- /dev/null
+++ b/sound/soc/qcom/audioreach/topology.c
@@ -0,0 +1,848 @@
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/pcm.h>
+#include <sound/control.h>
+#include <sound/asound.h>
+#include <linux/firmware.h>
+#include <sound/soc-topology.h>
+#include <sound/soc-dpcm.h>
+#include <uapi/sound/snd_ar_tokens.h>
+#include <linux/kernel.h>
+#include <linux/wait.h>
+#include "q6apm.h"
+#include "audioreach.h"
+
+struct snd_ar_control {
+ u32 sgid; /* Sub Graph ID */
+ struct snd_soc_component *scomp;
+};
+
+static struct audioreach_graph_info *audioreach_tplg_alloc_graph_info(
+ struct q6apm *apm, uint32_t graph_id,
+ bool *found)
+{
+ struct audioreach_graph_info *info;
+
+ spin_lock(&apm->lock);
+ info = idr_find(&apm->graph_info_idr, graph_id);
+ spin_unlock(&apm->lock);
+
+ if (info) {
+ *found = true;
+ return info;
+ }
+
+ *found = false;
+ info = kzalloc(sizeof(*info), GFP_KERNEL);
+ if (!info)
+ return ERR_PTR(-ENOMEM);
+
+
+ INIT_LIST_HEAD(&info->sg_list);
+ spin_lock_init(&info->sg_list_lock);
+
+ spin_lock(&apm->lock);
+ idr_alloc(&apm->graph_info_idr, info, graph_id,
+ graph_id + 1, GFP_ATOMIC);
+ spin_unlock(&apm->lock);
+
+ info->id = graph_id;
+
+ return info;
+}
+
+static void audioreach_tplg_add_sub_graph(struct audioreach_sub_graph *sg,
+ struct audioreach_graph_info *info)
+{
+ list_add_tail(&sg->node, &info->sg_list);
+ info->num_sub_graphs++;
+}
+
+
+static struct audioreach_sub_graph *audioreach_tplg_alloc_sub_graph(
+ struct q6apm *apm,
+ uint32_t sub_graph_id,
+ bool *found)
+{
+ struct audioreach_sub_graph *sg = NULL;
+
+ /* Find if there is already a matching sub-graph */
+ spin_lock(&apm->lock);
+ sg = idr_find(&apm->sub_graphs_idr, sub_graph_id);
+ spin_unlock(&apm->lock);
+
+
+ if (sg) {
+ *found = true;
+ return sg;
+ }
+
+ *found = false;
+ sg = kzalloc(sizeof(*sg), GFP_KERNEL);
+ if (!sg)
+ return ERR_PTR(-ENOMEM);
+
+ INIT_LIST_HEAD(&sg->container_list);
+
+ spin_lock(&apm->lock);
+ idr_alloc(&apm->sub_graphs_idr, sg, sub_graph_id,
+ sub_graph_id + 1, GFP_ATOMIC);
+ spin_unlock(&apm->lock);
+
+ return sg;
+}
+
+static struct audioreach_container *audioreach_tplg_alloc_container(struct q6apm *apm,
+ struct audioreach_sub_graph *sg,
+ uint32_t container_id,
+ bool *found)
+{
+ struct audioreach_container *cont = NULL;
+
+ spin_lock(&apm->lock);
+ cont = idr_find(&apm->containers_idr, container_id);
+ spin_unlock(&apm->lock);
+
+ if (cont) {
+ *found = true;
+ return cont;
+ }
+ *found = false;
+
+ cont = kzalloc(sizeof(*cont), GFP_KERNEL);
+ if (!cont)
+ return ERR_PTR(-ENOMEM);
+
+ INIT_LIST_HEAD(&cont->modules_list);
+
+ spin_lock(&apm->lock);
+ idr_alloc(&apm->containers_idr, cont, container_id,
+ container_id + 1, GFP_ATOMIC);
+ spin_unlock(&apm->lock);
+
+ /* add to container list */
+ list_add_tail(&cont->node, &sg->container_list);
+ sg->num_containers++;
+
+ return cont;
+}
+
+static struct audioreach_module *audioreach_tplg_alloc_module(struct q6apm *apm,
+ struct audioreach_container *cont,
+ struct snd_soc_dapm_widget *w,
+ uint32_t module_id,
+ bool *found)
+{
+ struct audioreach_module *mod = NULL;
+
+ spin_lock(&apm->lock);
+ mod = idr_find(&apm->modules_idr, module_id);
+ spin_unlock(&apm->lock);
+
+ if (mod) {
+ *found = true;
+ return mod;
+ }
+ *found = false;
+ mod = kzalloc(sizeof(*mod), GFP_KERNEL);
+ if (!mod)
+ return ERR_PTR(-ENOMEM);
+
+ spin_lock(&apm->lock);
+ idr_alloc(&apm->modules_idr, mod, module_id,
+ module_id + 1, GFP_ATOMIC);
+ spin_unlock(&apm->lock);
+
+ /* add to module list */
+ list_add_tail(&mod->node, &cont->modules_list);
+ mod->container = cont;
+ mod->widget = w;
+ cont->num_modules++;
+
+ return mod;
+}
+
+static struct audioreach_sub_graph *audioreach_parse_sg_tokens(struct q6apm *apm,
+ struct snd_soc_tplg_vendor_array *sg_array)
+{
+ struct audioreach_graph_info *info = NULL;
+ struct snd_soc_tplg_vendor_value_elem *sg_elem = sg_array->value;
+ struct audioreach_sub_graph *sg;
+ int graph_id, sub_graph_id, tkn_count = 0;
+ bool found;
+
+ while (tkn_count <= (le32_to_cpu(sg_array->num_elems) - 1)) {
+ switch (le32_to_cpu(sg_elem->token)) {
+ case AR_TKN_U32_SUB_GRAPH_INSTANCE_ID:
+ sub_graph_id = le32_to_cpu(sg_elem->value);
+ sg = audioreach_tplg_alloc_sub_graph(apm, sub_graph_id, &found);
+ if (IS_ERR(sg)) {
+ return sg;
+ } else if (found) {
+ /* Already parsed data for this sub-graph */
+ return sg;
+ }
+ dev_err(apm->dev, "%s: New subgraph id : 0x%08x\n", __func__,
+ sub_graph_id);
+ sg->sub_graph_id = sub_graph_id;
+ break;
+ case AR_TKN_DAI_INDEX:
+ /* Sub graph is associated with predefined graph */
+ graph_id = le32_to_cpu(sg_elem->value);
+ info = audioreach_tplg_alloc_graph_info(apm, graph_id, &found);
+ if (IS_ERR(info))
+ return ERR_CAST(info);
+ break;
+ case AR_TKN_U32_SUB_GRAPH_PERF_MODE:
+ sg->perf_mode = le32_to_cpu(sg_elem->value);
+ break;
+ case AR_TKN_U32_SUB_GRAPH_DIRECTION:
+ sg->direction = le32_to_cpu(sg_elem->value);
+ break;
+ case AR_TKN_U32_SUB_GRAPH_SCENARIO_ID:
+ sg->scenario_id = le32_to_cpu(sg_elem->value);
+ break;
+ default:
+ dev_err(apm->dev, "Not a valid token %d for graph\n",
+ sg_elem->token);
+ break;
+
+ }
+ tkn_count++;
+ sg_elem++;
+ }
+
+ /* Sub graph is associated with predefined graph */
+ if (info) {
+ dev_err(apm->dev, "%s: adding subgraph id : 0x%08x -> %d\n", __func__,
+ sub_graph_id, graph_id);
+
+ audioreach_tplg_add_sub_graph(sg, info);
+ }
+
+ return sg;
+}
+
+
+static struct audioreach_container *audioreach_parse_cont_tokens(struct q6apm *apm,
+ struct audioreach_sub_graph *sg,
+ struct snd_soc_tplg_vendor_array *cont_array)
+{
+ struct snd_soc_tplg_vendor_value_elem *cont_elem;
+ struct audioreach_container *cont;
+ int container_id, tkn_count = 0;
+ bool found = false;
+
+ cont_elem = cont_array->value;
+ while (tkn_count <= (le32_to_cpu(cont_array->num_elems) - 1)) {
+ switch (le32_to_cpu(cont_elem->token)) {
+ case AR_TKN_U32_CONAINER_INSTANCE_ID:
+ container_id = le32_to_cpu(cont_elem->value);
+ cont = audioreach_tplg_alloc_container(apm, sg, container_id, &found);
+ if (IS_ERR(cont))
+ return ERR_PTR(-ENOMEM);
+ else if (found) /* Already parsed container data */
+ return cont;
+
+ cont->container_id = container_id;
+ break;
+ case AR_TKN_U32_CONAINER_CAPABILITY_ID:
+ cont->capability_id = le32_to_cpu(cont_elem->value);
+ break;
+ case AR_TKN_U32_CONAINER_STACK_SIZE:
+ cont->stack_size = le32_to_cpu(cont_elem->value);
+ break;
+ case AR_TKN_U32_CONAINER_GRAPH_POS:
+ cont->graph_pos = le32_to_cpu(cont_elem->value);
+ break;
+ case AR_TKN_U32_CONAINER_PROC_DOMAIN:
+ cont->proc_domain = le32_to_cpu(cont_elem->value);
+ break;
+ default:
+ dev_err(apm->dev, "Not a valid token %d for graph\n",
+ cont_elem->token);
+ break;
+
+ }
+ tkn_count++;
+ cont_elem++;
+ }
+
+ return cont;
+}
+
+static struct audioreach_module *audioreach_parse_common_tokens(struct q6apm *apm,
+ struct audioreach_container *cont,
+ struct snd_soc_tplg_vendor_array *mod_array,
+ struct snd_soc_dapm_widget *w)
+{
+ struct snd_soc_tplg_vendor_value_elem *mod_elem;
+ struct audioreach_module *mod;
+ int module_iid, tkn_count = 0;
+ bool found;
+
+ mod_elem = mod_array->value;
+ module_iid = le32_to_cpu(mod_elem->value);
+
+ mod = audioreach_tplg_alloc_module(apm, cont, w, module_iid, &found);
+ if (IS_ERR(mod)) {
+ return ERR_PTR(-ENOMEM);
+ } else if (found) {
+ dev_err(apm->dev, "Duplicate Module Instance ID 0x%08x found\n", module_iid);
+ return ERR_PTR(-EINVAL);
+ }
+
+ while (tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) {
+ switch (le32_to_cpu(mod_elem->token)) {
+ /* common module info */
+ case AR_TKN_U32_MODULE_ID:
+ mod->module_id = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_INSTANCE_ID:
+ mod->instance_id = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_MAX_IP_PORTS:
+ mod->max_ip_port = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_MAX_OP_PORTS:
+ mod->max_op_port = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_IN_PORTS:
+ mod->in_port = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_OUT_PORTS:
+ mod->out_port = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_SRC_OP_PORT_ID:
+ mod->src_mod_op_port_id = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_DST_IN_PORT_ID:
+ mod->dst_mod_ip_port_id = le32_to_cpu(mod_elem->value);
+
+ default:
+ break;
+
+ }
+ tkn_count++;
+ mod_elem++;
+ }
+
+ return mod;
+}
+
+static int audioreach_widget_load_module_common(struct snd_soc_component *component,
+ int index, struct snd_soc_dapm_widget *w,
+ struct snd_soc_tplg_dapm_widget *tplg_w,
+ size_t *sz)
+{
+ struct q6apm *apm = dev_get_drvdata(component->dev);
+ struct audioreach_sub_graph *sg;
+ struct audioreach_container *cont;
+ struct audioreach_module *mod;
+ struct snd_soc_dobj *dobj;
+ void *data = tplg_w->priv.data;
+ struct snd_soc_tplg_vendor_array *array = &tplg_w->priv.array[0];
+
+ sg = audioreach_parse_sg_tokens(apm, &tplg_w->priv.array[0]);
+ if (IS_ERR(sg))
+ return PTR_ERR(sg);
+
+ *sz = le32_to_cpu(array->size);
+ array = data + *sz;
+ cont = audioreach_parse_cont_tokens(apm, sg, array);
+ if (IS_ERR(cont))
+ return PTR_ERR(cont);
+
+ *sz = *sz + le32_to_cpu(array->size);
+ array = data + *sz;
+ mod = audioreach_parse_common_tokens(apm, cont, array, w);
+ if (IS_ERR(mod))
+ return PTR_ERR(mod);
+
+ dobj = &w->dobj;
+ dobj->private = mod;
+
+ return 0;
+}
+
+static int audioreach_widget_load_pcm(struct snd_soc_component *component,
+ int index, struct snd_soc_dapm_widget *w,
+ struct snd_soc_tplg_dapm_widget *tplg_w)
+{
+ size_t sz;
+
+ return audioreach_widget_load_module_common(component, index, w,
+ tplg_w, &sz);
+}
+
+static int audioreach_widget_load_enc_dec_cnv(struct snd_soc_component *component,
+ int index, struct snd_soc_dapm_widget *w,
+ struct snd_soc_tplg_dapm_widget *tplg_w)
+{
+ struct snd_soc_tplg_vendor_array *mod_array;
+ struct snd_soc_tplg_vendor_value_elem *mod_elem;
+ struct audioreach_module *mod;
+ struct snd_soc_dobj *dobj;
+ size_t sz;
+ int tkn_count = 0;
+ int ret;
+
+ ret = audioreach_widget_load_module_common(component, index, w, tplg_w,
+ &sz);
+ if (ret)
+ return ret;
+
+ dobj = &w->dobj;
+ mod = dobj->private;
+ mod_array = (struct snd_soc_tplg_vendor_array *)((u8 *)tplg_w->priv.data + sz);
+ mod_elem = mod_array->value;
+
+ while (tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) {
+ switch (le32_to_cpu(mod_elem->token)) {
+ case AR_TKN_U32_MODULE_FMT_INTERLEAVE:
+ mod->interleave_type = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_FMT_FREQ:
+ mod->rate = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_FMT_BIT_DEPTH:
+ mod->bit_depth = le32_to_cpu(mod_elem->value);
+ break;
+ default:
+ break;
+ }
+ tkn_count++;
+ mod_elem++;
+ }
+
+ return 0;
+}
+
+static int audioreach_widget_log_module_load(struct audioreach_module *mod,
+ struct snd_soc_tplg_vendor_array *mod_array)
+{
+ struct snd_soc_tplg_vendor_value_elem *mod_elem;
+ int tkn_count = 0;
+
+ mod_elem = mod_array->value;
+
+ while (tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) {
+ switch (le32_to_cpu(mod_elem->token)) {
+
+ case AR_TKN_U32_MODULE_LOG_CODE:
+ mod->log_code = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_LOG_TAP_POINT_ID:
+ mod->log_tap_point_id = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_LOG_MODE:
+ mod->mode = le32_to_cpu(mod_elem->value);
+ break;
+ default:
+ break;
+ }
+ tkn_count++;
+ mod_elem++;
+ }
+
+ return 0;
+}
+
+static int audioreach_widget_dma_module_load(struct audioreach_module *mod,
+ struct snd_soc_tplg_vendor_array *mod_array)
+{
+ struct snd_soc_tplg_vendor_value_elem *mod_elem;
+ int tkn_count = 0;
+
+ mod_elem = mod_array->value;
+
+ while (tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) {
+ switch (le32_to_cpu(mod_elem->token)) {
+ case AR_TKN_U32_MODULE_HW_IF_IDX:
+ mod->hw_interface_idx = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_FMT_DATA:
+ mod->data_format = le32_to_cpu(mod_elem->value);
+ break;
+ case AR_TKN_U32_MODULE_HW_IF_TYPE:
+ mod->hw_interface_type = le32_to_cpu(mod_elem->value);
+ break;
+ default:
+ break;
+ }
+ tkn_count++;
+ mod_elem++;
+ }
+
+ return 0;
+}
+
+static int audioreach_widget_load_buffer(struct snd_soc_component *component,
+ int index, struct snd_soc_dapm_widget *w,
+ struct snd_soc_tplg_dapm_widget *tplg_w)
+{
+ struct snd_soc_tplg_vendor_array *mod_array;
+ struct audioreach_module *mod;
+ struct snd_soc_dobj *dobj;
+ size_t sz;
+ int ret;
+
+ ret = audioreach_widget_load_module_common(component, index, w, tplg_w,
+ &sz);
+ if (ret)
+ return ret;
+
+ dobj = &w->dobj;
+ mod = dobj->private;
+
+ mod_array = (struct snd_soc_tplg_vendor_array *)((u8 *)tplg_w->priv.data + sz);
+
+ switch (mod->module_id) {
+ case MODULE_ID_CODEC_DMA_SINK:
+ case MODULE_ID_CODEC_DMA_SOURCE:
+ audioreach_widget_dma_module_load(mod, mod_array);
+ break;
+ case MODULE_ID_DATA_LOGGING:
+ audioreach_widget_log_module_load(mod, mod_array);
+ break;
+ }
+
+ return 0;
+}
+
+static int audioreach_widget_load_mixer(struct snd_soc_component *component,
+ int index, struct snd_soc_dapm_widget *w,
+ struct snd_soc_tplg_dapm_widget *tplg_w)
+{
+ struct snd_soc_tplg_vendor_value_elem *w_elem;
+ struct snd_soc_tplg_vendor_array *w_array;
+ struct snd_ar_control *scontrol;
+ struct snd_soc_dobj *dobj;
+ int tkn_count = 0;
+
+ dev_err(component->dev, "DEBUG:: %s \n", __func__);
+ w_array = &tplg_w->priv.array[0];
+
+ scontrol = kzalloc(sizeof(*scontrol), GFP_KERNEL);
+ if (!scontrol)
+ return -ENOMEM;
+
+ scontrol->scomp = component;
+ dobj = &w->dobj;
+ dobj->private = scontrol;
+
+ w_elem = w_array->value;
+ while (tkn_count <= (le32_to_cpu(w_array->num_elems) - 1)) {
+ switch (le32_to_cpu(w_elem->token)) {
+ case AR_TKN_U32_SUB_GRAPH_INSTANCE_ID:
+ scontrol->sgid = le32_to_cpu(w_elem->value);
+ break;
+ default: /* ignore other tokens */
+ break;
+ }
+ tkn_count++;
+ w_elem++;
+ }
+
+ return 0;
+}
+
+static int audioreach_widget_ready(struct snd_soc_component *component,
+ int index, struct snd_soc_dapm_widget *w,
+ struct snd_soc_tplg_dapm_widget *tplg_w)
+{
+ switch (w->id) {
+ case snd_soc_dapm_aif_in:
+ case snd_soc_dapm_aif_out:
+ audioreach_widget_load_pcm(component, index, w, tplg_w);
+ break;
+ case snd_soc_dapm_decoder:
+ case snd_soc_dapm_encoder:
+ case snd_soc_dapm_src:
+ audioreach_widget_load_enc_dec_cnv(component, index, w, tplg_w);
+ break;
+ case snd_soc_dapm_buffer:
+ audioreach_widget_load_buffer(component, index, w, tplg_w);
+ break;
+ case snd_soc_dapm_mixer:
+ return audioreach_widget_load_mixer(component, index, w, tplg_w);
+ case snd_soc_dapm_dai_link:
+ case snd_soc_dapm_pga:
+ case snd_soc_dapm_scheduler:
+ case snd_soc_dapm_out_drv:
+ default:
+ dev_err(component->dev, "Widget type (0x%x) not yet supported\n",
+ w->id);
+ break;
+ }
+
+ return 0;
+}
+
+
+static int audioreach_widget_unload(struct snd_soc_component *scomp,
+ struct snd_soc_dobj *dobj)
+{
+ struct q6apm *apm = dev_get_drvdata(scomp->dev);
+ struct audioreach_container *cont;
+ struct audioreach_module *mod;
+
+ mod = dobj->private;
+ cont = mod->container;
+ /* find a way to remove the container and sub-graph */
+
+ spin_lock(&apm->lock);
+ idr_remove(&apm->modules_idr, mod->module_id);
+ cont->num_modules--;
+
+ /* delete list */
+ list_del(&mod->node);
+ /* free memory */
+ kfree(mod);
+
+ if (list_empty(&cont->modules_list)) { /* remove container */
+ struct audioreach_sub_graph *sg = cont->sub_graph;
+
+ idr_remove(&apm->containers_idr, cont->container_id);
+ list_del(&cont->node);
+ sg->num_containers--;
+ kfree(cont);
+ if (list_empty(&sg->container_list)) { /* remove sg */
+ struct audioreach_graph_info *info = sg->info;
+
+ idr_remove(&apm->sub_graphs_idr, sg->sub_graph_id);
+ list_del(&sg->node);
+ info->num_sub_graphs--;
+ kfree(sg);
+ if (list_empty(&info->sg_list)) { /* remove graph info */
+ idr_remove(&apm->graph_info_idr, info->id);
+ kfree(info);
+ }
+ }
+ }
+
+ spin_unlock(&apm->lock);
+
+ return 0;
+}
+
+static struct audioreach_module *audioreach_find_widget(struct snd_soc_component *comp,
+ const char *name)
+{
+ struct q6apm *apm = dev_get_drvdata(comp->dev);
+ struct audioreach_module *module;
+ int id;
+
+ idr_for_each_entry(&apm->modules_idr, module, id) {
+ if (!strcmp(name, module->widget->name))
+ return module;
+ }
+
+ return NULL;
+}
+
+static int audioreach_route_load(struct snd_soc_component *scomp, int index,
+ struct snd_soc_dapm_route *route)
+{
+ struct audioreach_module *src, *sink;
+
+ src = audioreach_find_widget(scomp, route->source);
+ sink = audioreach_find_widget(scomp, route->sink);
+
+ if (src && sink) {
+ src->dst_mod_inst_id = sink->instance_id;
+ sink->src_mod_inst_id = src->instance_id;
+ }
+
+ return 0;
+}
+
+static int audioreach_route_unload(struct snd_soc_component *scomp,
+ struct snd_soc_dobj *dobj)
+{
+
+ return 0;
+}
+
+static void audioreach_tplg_complete(struct snd_soc_component *component)
+{
+ /* TBD */
+}
+
+/* DAI link - used for any driver specific init */
+static int audioreach_link_load(struct snd_soc_component *component, int index,
+ struct snd_soc_dai_link *link,
+ struct snd_soc_tplg_link_config *cfg)
+{
+ link->nonatomic = true;
+ link->dynamic = true;
+ link->platforms->name = NULL;
+ link->platforms->of_node = of_get_compatible_child(component->dev->of_node,
+ "qcom,q6apm-dais");
+ link->trigger[0] = SND_SOC_DPCM_TRIGGER_POST;
+ link->trigger[1] = SND_SOC_DPCM_TRIGGER_POST;
+
+ return 0;
+}
+
+static int audioreach_get_audio_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_dapm_widget *dw = snd_soc_dapm_kcontrol_widget(kcontrol);
+ struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol);
+ struct snd_soc_component *c = snd_soc_dapm_to_component(dapm);
+ struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value;
+ struct snd_ar_control *scontrol = mc->dobj.private;
+ struct snd_ar_control *dapm_scontrol = dw->dobj.private;
+ struct q6apm *data = dev_get_drvdata(c->dev);
+ bool connected;
+
+ connected = q6apm_is_sub_graphs_connected(data, scontrol->sgid,
+ dapm_scontrol->sgid);
+ if (connected)
+ ucontrol->value.integer.value[0] = 1;
+ else
+ ucontrol->value.integer.value[0] = 0;
+
+ return 0;
+}
+
+static int audioreach_put_audio_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_dapm_widget *dw = snd_soc_dapm_kcontrol_widget(kcontrol);
+ struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol);
+ struct snd_soc_component *c = snd_soc_dapm_to_component(dapm);
+ struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value;
+ struct snd_ar_control *scontrol = mc->dobj.private;
+ struct snd_ar_control *dapm_scontrol = dw->dobj.private;
+ struct q6apm *data = dev_get_drvdata(c->dev);
+ struct snd_soc_dapm_update *update = NULL;
+
+ if (ucontrol->value.integer.value[0]) {
+ q6apm_connect_sub_graphs(data, scontrol->sgid,
+ dapm_scontrol->sgid, true);
+ snd_soc_dapm_mixer_update_power(dapm, kcontrol, 1, update);
+ } else {
+ q6apm_connect_sub_graphs(data, scontrol->sgid,
+ dapm_scontrol->sgid, false);
+ snd_soc_dapm_mixer_update_power(dapm, kcontrol, 0, update);
+ }
+ return 0;
+}
+
+static int audioreach_control_load_volume(struct snd_soc_component *scomp,
+ struct snd_ar_control *scontrol,
+ struct snd_kcontrol_new *kc,
+ struct snd_soc_tplg_ctl_hdr *hdr)
+{
+ struct snd_soc_tplg_mixer_control *mc = container_of(hdr, struct snd_soc_tplg_mixer_control, hdr);
+ struct snd_soc_tplg_vendor_array *c_array =(struct snd_soc_tplg_vendor_array *)mc->priv.data;
+ int tkn_count = 0;
+ struct snd_soc_tplg_vendor_value_elem *c_elem;
+
+ c_elem = c_array->value;
+
+ while (tkn_count <= (le32_to_cpu(c_array->num_elems) - 1)) {
+ switch (le32_to_cpu(c_elem->token)) {
+ case AR_TKN_U32_SUB_GRAPH_INSTANCE_ID:
+ scontrol->sgid = le32_to_cpu(c_elem->value);
+ break;
+ default:
+ /* Ignore other tokens */
+ break;
+
+ }
+ c_elem++;
+ tkn_count++;
+ }
+
+ return 0;
+}
+
+static int audioreach_control_load(struct snd_soc_component *scomp, int index,
+ struct snd_kcontrol_new *kc,
+ struct snd_soc_tplg_ctl_hdr *hdr)
+{
+ struct snd_ar_control *scontrol;
+ struct snd_soc_dobj *dobj;
+ struct soc_mixer_control *sm;
+ int ret;
+
+ scontrol = kzalloc(sizeof(*scontrol), GFP_KERNEL);
+ if (!scontrol)
+ return -ENOMEM;
+
+ scontrol->scomp = scomp;
+
+ switch (le32_to_cpu(hdr->ops.info)) {
+ case SND_SOC_TPLG_CTL_VOLSW:
+ sm = (struct soc_mixer_control *)kc->private_value;
+ dobj = &sm->dobj;
+ ret = audioreach_control_load_volume(scomp, scontrol, kc, hdr);
+ break;
+ default:
+ dev_warn(scomp->dev, "control type not supported %d:%d:%d\n",
+ hdr->ops.get, hdr->ops.put, hdr->ops.info);
+ kfree(scontrol);
+ break;
+ }
+
+ dobj->private = scontrol;
+ return ret;
+}
+
+static int audioreach_control_unload(struct snd_soc_component *scomp,
+ struct snd_soc_dobj *dobj)
+{
+ struct snd_ar_control *scontrol = dobj->private;
+
+ kfree(scontrol);
+
+ return 0;
+}
+
+static const struct snd_soc_tplg_kcontrol_ops audioreach_io_ops[] = {
+ {SND_SOC_AR_TPLG_FE_BE_GRAPH_CTL_MIX, audioreach_get_audio_mixer,
+ audioreach_put_audio_mixer, snd_soc_info_volsw},
+};
+
+static struct snd_soc_tplg_ops audioreach_tplg_ops = {
+ .io_ops = audioreach_io_ops,
+ .io_ops_count = ARRAY_SIZE(audioreach_io_ops),
+
+ .control_load = audioreach_control_load,
+ .control_unload = audioreach_control_unload,
+
+ .widget_ready = audioreach_widget_ready,
+ .widget_unload = audioreach_widget_unload,
+
+ .complete = audioreach_tplg_complete,
+ .link_load = audioreach_link_load,
+
+ .dapm_route_load = audioreach_route_load,
+ .dapm_route_unload = audioreach_route_unload,
+};
+
+int audioreach_tplg_init(struct snd_soc_component *component)
+{
+ struct device *dev = component->dev;
+ const struct firmware *fw;
+ int ret;
+
+ ret = request_firmware(&fw, "audioreach.bin", dev);
+ if (ret < 0) {
+ dev_err(dev, "tplg fw audioreach.bin load failed with %d\n", ret);
+ return ret;
+ }
+
+ ret = snd_soc_tplg_component_load(component, &audioreach_tplg_ops, fw);
+ if (ret < 0) {
+ dev_err(dev, "tplg component load failed%d\n", ret);
+ release_firmware(fw);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(audioreach_tplg_init);
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [RFC PATCH 08/13] ASoC: qcom: audioreach: add q6apm-dai support
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-07 15:28 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: plai, tiwai, robh, devicetree, perex, alsa-devel, linux-kernel,
lgirdwood, bgoswami, Srinivas Kandagatla
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
sound/soc/qcom/Kconfig | 4 +
sound/soc/qcom/audioreach/Makefile | 2 +
sound/soc/qcom/audioreach/q6apm-dai.c | 494 ++++++++++++++++++++++++++
3 files changed, 500 insertions(+)
create mode 100644 sound/soc/qcom/audioreach/q6apm-dai.c
diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
index c0e7f4cb328f..258fe9ef26f3 100644
--- a/sound/soc/qcom/Kconfig
+++ b/sound/soc/qcom/Kconfig
@@ -103,10 +103,14 @@ config SND_SOC_QDSP6
audio drivers. This includes q6asm, q6adm,
q6afe interfaces to DSP using apr.
+config SND_SOC_QCOM_APM_DAI
+ tristate
+
config SND_SOC_QCOM_AUDIOREACH
tristate "SoC ALSA audio drives for Qualcomm AUDIOREACH"
depends on QCOM_GPR
select SND_SOC_TOPOLOGY
+ select SND_SOC_QCOM_APM_DAI
help
Support for AudioReach in QDSP
diff --git a/sound/soc/qcom/audioreach/Makefile b/sound/soc/qcom/audioreach/Makefile
index 65ea488e4cc8..7160bddbb1fb 100644
--- a/sound/soc/qcom/audioreach/Makefile
+++ b/sound/soc/qcom/audioreach/Makefile
@@ -1,6 +1,8 @@
# SPDX-License-Identifier: GPL-2.0-only
snd-ar-objs := audioreach.o q6apm.o topology.o
+snd-apm-dai-objs := q6apm-dai.o
obj-$(CONFIG_SND_SOC_QCOM_AUDIOREACH) += snd-ar.o
+obj-$(CONFIG_SND_SOC_QCOM_APM_DAI) += snd-apm-dai.o
diff --git a/sound/soc/qcom/audioreach/q6apm-dai.c b/sound/soc/qcom/audioreach/q6apm-dai.c
new file mode 100644
index 000000000000..ae83cac80978
--- /dev/null
+++ b/sound/soc/qcom/audioreach/q6apm-dai.c
@@ -0,0 +1,494 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2021, Linaro Limited
+
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/pcm.h>
+#include <linux/spinlock.h>
+#include <asm/dma.h>
+#include <linux/dma-mapping.h>
+#include <linux/of_device.h>
+#include <sound/pcm_params.h>
+#include "q6apm.h"
+
+#define DRV_NAME "q6apm-dai"
+
+#define PLAYBACK_MIN_NUM_PERIODS 2
+#define PLAYBACK_MAX_NUM_PERIODS 8
+#define PLAYBACK_MAX_PERIOD_SIZE 65536
+#define PLAYBACK_MIN_PERIOD_SIZE 128
+#define CAPTURE_MIN_NUM_PERIODS 2
+#define CAPTURE_MAX_NUM_PERIODS 8
+#define CAPTURE_MAX_PERIOD_SIZE 4096
+#define CAPTURE_MIN_PERIOD_SIZE 320
+#define BUFFER_BYTES_MAX (PLAYBACK_MAX_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE)
+#define BUFFER_BYTES_MIN (PLAYBACK_MIN_NUM_PERIODS * PLAYBACK_MIN_PERIOD_SIZE)
+
+#define SID_MASK_DEFAULT 0xF
+
+enum stream_state {
+ Q6APM_STREAM_IDLE = 0,
+ Q6APM_STREAM_STOPPED,
+ Q6APM_STREAM_RUNNING,
+};
+
+struct q6apm_dai_rtd {
+ struct snd_pcm_substream *substream;
+ struct snd_compr_stream *cstream;
+ struct snd_compr_params codec_param;
+ struct snd_dma_buffer dma_buffer;
+ spinlock_t lock;
+ phys_addr_t phys;
+ unsigned int pcm_size;
+ unsigned int pcm_count;
+ unsigned int pcm_irq_pos; /* IRQ position */
+ unsigned int periods;
+ unsigned int bytes_sent;
+ unsigned int bytes_received;
+ unsigned int copied_total;
+ uint16_t bits_per_sample;
+ uint16_t source; /* Encoding source bit mask */
+ uint16_t session_id;
+ enum stream_state state;
+ struct q6apm_graph *graph;
+};
+
+struct q6apm_dai_data {
+ long long int sid;
+};
+
+static struct snd_pcm_hardware q6apm_dai_hardware_capture = {
+ .info = (SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
+ .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE),
+ .rates = SNDRV_PCM_RATE_8000_48000,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ .channels_min = 2,
+ .channels_max = 4 ,
+ .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS *
+ CAPTURE_MAX_PERIOD_SIZE,
+ .period_bytes_min = CAPTURE_MIN_PERIOD_SIZE,
+ .period_bytes_max = CAPTURE_MAX_PERIOD_SIZE,
+ .periods_min = CAPTURE_MIN_NUM_PERIODS,
+ .periods_max = CAPTURE_MAX_NUM_PERIODS,
+ .fifo_size = 0,
+};
+
+static struct snd_pcm_hardware q6apm_dai_hardware_playback = {
+ .info = (SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
+ .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE),
+ .rates = SNDRV_PCM_RATE_8000_192000,
+ .rate_min = 8000,
+ .rate_max = 192000,
+ .channels_min = 2,
+ .channels_max = 8,
+ .buffer_bytes_max = (PLAYBACK_MAX_NUM_PERIODS *
+ PLAYBACK_MAX_PERIOD_SIZE),
+ .period_bytes_min = PLAYBACK_MIN_PERIOD_SIZE,
+ .period_bytes_max = PLAYBACK_MAX_PERIOD_SIZE,
+ .periods_min = PLAYBACK_MIN_NUM_PERIODS,
+ .periods_max = PLAYBACK_MAX_NUM_PERIODS,
+ .fifo_size = 0,
+};
+
+static void event_handler(uint32_t opcode, uint32_t token,
+ uint32_t *payload, void *priv)
+{
+ struct q6apm_dai_rtd *prtd = priv;
+ struct snd_pcm_substream *substream = prtd->substream;
+
+ switch (opcode) {
+ case APM_CLIENT_EVENT_CMD_EOS_DONE:
+ prtd->state = Q6APM_STREAM_STOPPED;
+ break;
+ case APM_CLIENT_EVENT_DATA_WRITE_DONE: {
+ prtd->pcm_irq_pos += prtd->pcm_count;
+ snd_pcm_period_elapsed(substream);
+ if (prtd->state == Q6APM_STREAM_RUNNING) {
+ q6apm_write_async(prtd->graph,
+ prtd->pcm_count, 0, 0, NO_TIMESTAMP);
+ }
+
+ break;
+ }
+ case APM_CLIENT_EVENT_DATA_READ_DONE:
+ prtd->pcm_irq_pos += prtd->pcm_count;
+ snd_pcm_period_elapsed(substream);
+ if (prtd->state == Q6APM_STREAM_RUNNING)
+ q6apm_read(prtd->graph);
+
+ break;
+ default:
+ break;
+ }
+}
+
+static int q6apm_dai_prepare(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct q6apm_dai_rtd *prtd = runtime->private_data;
+ struct q6apm_dai_data *pdata;
+ int ret, i;
+
+ pdata = snd_soc_component_get_drvdata(component);
+ if (!pdata)
+ return -EINVAL;
+
+ if (!prtd || !prtd->graph) {
+ dev_err(component->dev, "%s: private data null or audio client freed\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ prtd->pcm_count = snd_pcm_lib_period_bytes(substream);
+ prtd->pcm_irq_pos = 0;
+ /* rate and channels are sent to audio driver */
+ ret = q6apm_graph_media_format_shmem(prtd->graph,
+ substream->stream,
+ runtime->rate,
+ runtime->channels,
+ NULL,
+ prtd->bits_per_sample);
+
+ if (ret < 0) {
+ dev_err(component->dev, "%s: q6apm_open_write failed\n", __func__);
+ return ret;
+ }
+
+ ret = q6apm_graph_media_format_pcm(prtd->graph,
+ substream->stream,
+ runtime->rate,
+ runtime->channels,
+ NULL,
+ prtd->bits_per_sample);
+ if (ret < 0)
+ pr_info("%s: CMD Format block failed\n", __func__);
+
+ ret = q6apm_map_memory_regions(prtd->graph,
+ substream->stream,
+ prtd->phys,
+ (prtd->pcm_size / prtd->periods),
+ prtd->periods);
+
+ if (ret < 0) {
+ dev_err(component->dev, "Audio Start: Buffer Allocation failed rc = %d\n",
+ ret);
+ return -ENOMEM;
+ }
+
+ ret = q6apm_graph_prepare(prtd->graph);
+ ret = q6apm_graph_start(prtd->graph);
+
+ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
+ /* Queue the buffers */
+ for (i = 0; i < runtime->periods; i++)
+ q6apm_read(prtd->graph);
+
+ }
+ prtd->state = Q6APM_STREAM_RUNNING;
+
+ return 0;
+}
+
+static int q6apm_dai_trigger(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream, int cmd)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct q6apm_dai_rtd *prtd = runtime->private_data;
+ int ret = 0;
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_RESUME:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ ret = q6apm_write_async(prtd->graph, prtd->pcm_count, 0, 0, NO_TIMESTAMP);
+ break;
+ case SNDRV_PCM_TRIGGER_STOP:
+ prtd->state = Q6APM_STREAM_STOPPED;
+ //ret = q6apm_cmd_nowait(prtd->graph, CMD_EOS);
+ break;
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ //ret = q6apm_cmd_nowait(prtd->graph, CMD_PAUSE);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ return ret;
+}
+
+static int q6apm_dai_open(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct snd_soc_pcm_runtime *soc_prtd = substream->private_data;
+ struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(soc_prtd, 0);
+ struct q6apm_dai_rtd *prtd;
+ struct q6apm_dai_data *pdata;
+ struct device *dev = component->dev;
+ int ret;
+ int graph_id;
+
+ graph_id = cpu_dai->driver->id;
+
+ pdata = snd_soc_component_get_drvdata(component);
+ if (!pdata) {
+ dev_err(component->dev, "Drv data not found ..\n");
+ return -EINVAL;
+ }
+
+ prtd = kzalloc(sizeof(struct q6apm_dai_rtd), GFP_KERNEL);
+ if (prtd == NULL)
+ return -ENOMEM;
+
+ prtd->substream = substream;
+
+ prtd->graph = q6apm_graph_open(dev, (q6apm_cb)event_handler,
+ prtd, graph_id);
+ if (IS_ERR(prtd->graph)) {
+ pr_info("%s: Could not allocate memory\n", __func__);
+ ret = PTR_ERR(prtd->graph);
+ kfree(prtd);
+ return ret;
+ }
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ runtime->hw = q6apm_dai_hardware_playback;
+ else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
+ runtime->hw = q6apm_dai_hardware_capture;
+
+ /* Ensure that buffer size is a multiple of period size */
+ ret = snd_pcm_hw_constraint_integer(runtime,
+ SNDRV_PCM_HW_PARAM_PERIODS);
+ if (ret < 0)
+ dev_err(dev, "snd_pcm_hw_constraint_integer failed\n");
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ ret = snd_pcm_hw_constraint_minmax(runtime,
+ SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+ BUFFER_BYTES_MIN, BUFFER_BYTES_MAX);
+ if (ret < 0) {
+ dev_err(dev, "constraint for buffer bytes min max ret = %d\n",
+ ret);
+ }
+ }
+
+ ret = snd_pcm_hw_constraint_step(runtime, 0,
+ SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
+ if (ret < 0) {
+ dev_err(dev, "constraint for period bytes step ret = %d\n",
+ ret);
+ }
+ ret = snd_pcm_hw_constraint_step(runtime, 0,
+ SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
+ if (ret < 0) {
+ dev_err(dev, "constraint for buffer bytes step ret = %d\n",
+ ret);
+ }
+
+ runtime->private_data = prtd;
+ runtime->dma_bytes = BUFFER_BYTES_MAX;
+ if (pdata->sid < 0)
+ prtd->phys = substream->dma_buffer.addr;
+ else
+ prtd->phys = substream->dma_buffer.addr | (pdata->sid << 32);
+
+ snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
+
+ return 0;
+}
+
+static int q6apm_dai_close(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct q6apm_dai_rtd *prtd = runtime->private_data;
+
+ if (prtd && prtd->graph) {
+ q6apm_graph_stop(prtd->graph);
+
+ q6apm_unmap_memory_regions(prtd->graph,
+ substream->stream);
+ q6apm_graph_close(prtd->graph);
+ prtd->graph = NULL;
+ kfree(prtd);
+ runtime->private_data = NULL;
+ }
+
+ return 0;
+}
+
+static snd_pcm_uframes_t q6apm_dai_pointer(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream)
+{
+
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct q6apm_dai_rtd *prtd = runtime->private_data;
+
+ if (prtd->pcm_irq_pos >= prtd->pcm_size)
+ prtd->pcm_irq_pos = 0;
+
+ return bytes_to_frames(runtime, (prtd->pcm_irq_pos));
+}
+
+static int q6apm_dai_mmap(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream,
+ struct vm_area_struct *vma)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct device *dev = component->dev;
+
+ return dma_mmap_coherent(dev, vma,
+ runtime->dma_area, runtime->dma_addr,
+ runtime->dma_bytes);
+}
+
+static int q6apm_dai_hw_params(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct q6apm_dai_rtd *prtd = runtime->private_data;
+
+ prtd->pcm_size = params_buffer_bytes(params);
+ prtd->periods = params_periods(params);
+
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ prtd->bits_per_sample = 16;
+ break;
+ case SNDRV_PCM_FORMAT_S24_LE:
+ prtd->bits_per_sample = 24;
+ break;
+ }
+
+ return 0;
+}
+
+static int q6apm_dai_pcm_new(struct snd_soc_component *component,
+ struct snd_soc_pcm_runtime *rtd)
+{
+ struct snd_pcm_substream *psubstream, *csubstream;
+ struct snd_pcm *pcm = rtd->pcm;
+ struct device *dev;
+ int size, ret;
+
+ dev = component->dev;
+ size = BUFFER_BYTES_MAX;
+ psubstream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
+ if (psubstream) {
+ ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, dev, size,
+ &psubstream->dma_buffer);
+ if (ret) {
+ dev_err(dev, "Cannot allocate buffer(s)\n");
+ return ret;
+ }
+ }
+
+ csubstream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
+ if (csubstream) {
+ ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, dev, size,
+ &csubstream->dma_buffer);
+ if (ret) {
+ dev_err(dev, "Cannot allocate buffer(s)\n");
+ if (psubstream)
+ snd_dma_free_pages(&psubstream->dma_buffer);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static void q6apm_dai_pcm_free(struct snd_soc_component *component,
+ struct snd_pcm *pcm)
+{
+ struct snd_pcm_substream *substream;
+ int i;
+
+ if (!pcm->streams)
+ return;
+
+ for (i = 0; i < ARRAY_SIZE(pcm->streams); i++) {
+ substream = pcm->streams[i].substream;
+ if (substream) {
+ snd_dma_free_pages(&substream->dma_buffer);
+ substream->dma_buffer.area = NULL;
+ substream->dma_buffer.addr = 0;
+ }
+ }
+}
+
+static const struct snd_soc_component_driver q6apm_fe_dai_component = {
+ .name = DRV_NAME,
+ .open = q6apm_dai_open,
+ .close = q6apm_dai_close,
+ .prepare = q6apm_dai_prepare,
+ .pcm_construct = q6apm_dai_pcm_new,
+ .pcm_destruct = q6apm_dai_pcm_free,
+ .mmap = q6apm_dai_mmap,
+ .hw_params = q6apm_dai_hw_params,
+ .pointer = q6apm_dai_pointer,
+ .trigger = q6apm_dai_trigger,
+};
+
+static int q6apm_dai_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *node = dev->of_node;
+ struct of_phandle_args args;
+ struct q6apm_dai_data *pdata;
+ int rc;
+
+ pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return -ENOMEM;
+
+ rc = of_parse_phandle_with_fixed_args(node, "iommus", 1, 0, &args);
+ if (rc < 0)
+ pdata->sid = -1;
+ else
+ pdata->sid = args.args[0] & SID_MASK_DEFAULT;
+
+ dev_set_drvdata(dev, pdata);
+
+ return devm_snd_soc_register_component(dev, &q6apm_fe_dai_component,
+ NULL, 0);
+}
+
+static const struct of_device_id q6apm_dai_device_id[] = {
+ { .compatible = "qcom,q6apm-dais" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, q6apm_dai_device_id);
+
+static struct platform_driver q6apm_dai_platform_driver = {
+ .driver = {
+ .name = "q6apm-dai",
+ .of_match_table = of_match_ptr(q6apm_dai_device_id),
+ },
+ .probe = q6apm_dai_probe,
+};
+module_platform_driver(q6apm_dai_platform_driver);
+
+MODULE_DESCRIPTION("Q6APM dai driver");
+MODULE_LICENSE("GPL v2");
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* [RFC PATCH 08/13] ASoC: qcom: audioreach: add q6apm-dai support
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
sound/soc/qcom/Kconfig | 4 +
sound/soc/qcom/audioreach/Makefile | 2 +
sound/soc/qcom/audioreach/q6apm-dai.c | 494 ++++++++++++++++++++++++++
3 files changed, 500 insertions(+)
create mode 100644 sound/soc/qcom/audioreach/q6apm-dai.c
diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
index c0e7f4cb328f..258fe9ef26f3 100644
--- a/sound/soc/qcom/Kconfig
+++ b/sound/soc/qcom/Kconfig
@@ -103,10 +103,14 @@ config SND_SOC_QDSP6
audio drivers. This includes q6asm, q6adm,
q6afe interfaces to DSP using apr.
+config SND_SOC_QCOM_APM_DAI
+ tristate
+
config SND_SOC_QCOM_AUDIOREACH
tristate "SoC ALSA audio drives for Qualcomm AUDIOREACH"
depends on QCOM_GPR
select SND_SOC_TOPOLOGY
+ select SND_SOC_QCOM_APM_DAI
help
Support for AudioReach in QDSP
diff --git a/sound/soc/qcom/audioreach/Makefile b/sound/soc/qcom/audioreach/Makefile
index 65ea488e4cc8..7160bddbb1fb 100644
--- a/sound/soc/qcom/audioreach/Makefile
+++ b/sound/soc/qcom/audioreach/Makefile
@@ -1,6 +1,8 @@
# SPDX-License-Identifier: GPL-2.0-only
snd-ar-objs := audioreach.o q6apm.o topology.o
+snd-apm-dai-objs := q6apm-dai.o
obj-$(CONFIG_SND_SOC_QCOM_AUDIOREACH) += snd-ar.o
+obj-$(CONFIG_SND_SOC_QCOM_APM_DAI) += snd-apm-dai.o
diff --git a/sound/soc/qcom/audioreach/q6apm-dai.c b/sound/soc/qcom/audioreach/q6apm-dai.c
new file mode 100644
index 000000000000..ae83cac80978
--- /dev/null
+++ b/sound/soc/qcom/audioreach/q6apm-dai.c
@@ -0,0 +1,494 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2021, Linaro Limited
+
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/pcm.h>
+#include <linux/spinlock.h>
+#include <asm/dma.h>
+#include <linux/dma-mapping.h>
+#include <linux/of_device.h>
+#include <sound/pcm_params.h>
+#include "q6apm.h"
+
+#define DRV_NAME "q6apm-dai"
+
+#define PLAYBACK_MIN_NUM_PERIODS 2
+#define PLAYBACK_MAX_NUM_PERIODS 8
+#define PLAYBACK_MAX_PERIOD_SIZE 65536
+#define PLAYBACK_MIN_PERIOD_SIZE 128
+#define CAPTURE_MIN_NUM_PERIODS 2
+#define CAPTURE_MAX_NUM_PERIODS 8
+#define CAPTURE_MAX_PERIOD_SIZE 4096
+#define CAPTURE_MIN_PERIOD_SIZE 320
+#define BUFFER_BYTES_MAX (PLAYBACK_MAX_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE)
+#define BUFFER_BYTES_MIN (PLAYBACK_MIN_NUM_PERIODS * PLAYBACK_MIN_PERIOD_SIZE)
+
+#define SID_MASK_DEFAULT 0xF
+
+enum stream_state {
+ Q6APM_STREAM_IDLE = 0,
+ Q6APM_STREAM_STOPPED,
+ Q6APM_STREAM_RUNNING,
+};
+
+struct q6apm_dai_rtd {
+ struct snd_pcm_substream *substream;
+ struct snd_compr_stream *cstream;
+ struct snd_compr_params codec_param;
+ struct snd_dma_buffer dma_buffer;
+ spinlock_t lock;
+ phys_addr_t phys;
+ unsigned int pcm_size;
+ unsigned int pcm_count;
+ unsigned int pcm_irq_pos; /* IRQ position */
+ unsigned int periods;
+ unsigned int bytes_sent;
+ unsigned int bytes_received;
+ unsigned int copied_total;
+ uint16_t bits_per_sample;
+ uint16_t source; /* Encoding source bit mask */
+ uint16_t session_id;
+ enum stream_state state;
+ struct q6apm_graph *graph;
+};
+
+struct q6apm_dai_data {
+ long long int sid;
+};
+
+static struct snd_pcm_hardware q6apm_dai_hardware_capture = {
+ .info = (SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
+ .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE),
+ .rates = SNDRV_PCM_RATE_8000_48000,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ .channels_min = 2,
+ .channels_max = 4 ,
+ .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS *
+ CAPTURE_MAX_PERIOD_SIZE,
+ .period_bytes_min = CAPTURE_MIN_PERIOD_SIZE,
+ .period_bytes_max = CAPTURE_MAX_PERIOD_SIZE,
+ .periods_min = CAPTURE_MIN_NUM_PERIODS,
+ .periods_max = CAPTURE_MAX_NUM_PERIODS,
+ .fifo_size = 0,
+};
+
+static struct snd_pcm_hardware q6apm_dai_hardware_playback = {
+ .info = (SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
+ .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE),
+ .rates = SNDRV_PCM_RATE_8000_192000,
+ .rate_min = 8000,
+ .rate_max = 192000,
+ .channels_min = 2,
+ .channels_max = 8,
+ .buffer_bytes_max = (PLAYBACK_MAX_NUM_PERIODS *
+ PLAYBACK_MAX_PERIOD_SIZE),
+ .period_bytes_min = PLAYBACK_MIN_PERIOD_SIZE,
+ .period_bytes_max = PLAYBACK_MAX_PERIOD_SIZE,
+ .periods_min = PLAYBACK_MIN_NUM_PERIODS,
+ .periods_max = PLAYBACK_MAX_NUM_PERIODS,
+ .fifo_size = 0,
+};
+
+static void event_handler(uint32_t opcode, uint32_t token,
+ uint32_t *payload, void *priv)
+{
+ struct q6apm_dai_rtd *prtd = priv;
+ struct snd_pcm_substream *substream = prtd->substream;
+
+ switch (opcode) {
+ case APM_CLIENT_EVENT_CMD_EOS_DONE:
+ prtd->state = Q6APM_STREAM_STOPPED;
+ break;
+ case APM_CLIENT_EVENT_DATA_WRITE_DONE: {
+ prtd->pcm_irq_pos += prtd->pcm_count;
+ snd_pcm_period_elapsed(substream);
+ if (prtd->state == Q6APM_STREAM_RUNNING) {
+ q6apm_write_async(prtd->graph,
+ prtd->pcm_count, 0, 0, NO_TIMESTAMP);
+ }
+
+ break;
+ }
+ case APM_CLIENT_EVENT_DATA_READ_DONE:
+ prtd->pcm_irq_pos += prtd->pcm_count;
+ snd_pcm_period_elapsed(substream);
+ if (prtd->state == Q6APM_STREAM_RUNNING)
+ q6apm_read(prtd->graph);
+
+ break;
+ default:
+ break;
+ }
+}
+
+static int q6apm_dai_prepare(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct q6apm_dai_rtd *prtd = runtime->private_data;
+ struct q6apm_dai_data *pdata;
+ int ret, i;
+
+ pdata = snd_soc_component_get_drvdata(component);
+ if (!pdata)
+ return -EINVAL;
+
+ if (!prtd || !prtd->graph) {
+ dev_err(component->dev, "%s: private data null or audio client freed\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ prtd->pcm_count = snd_pcm_lib_period_bytes(substream);
+ prtd->pcm_irq_pos = 0;
+ /* rate and channels are sent to audio driver */
+ ret = q6apm_graph_media_format_shmem(prtd->graph,
+ substream->stream,
+ runtime->rate,
+ runtime->channels,
+ NULL,
+ prtd->bits_per_sample);
+
+ if (ret < 0) {
+ dev_err(component->dev, "%s: q6apm_open_write failed\n", __func__);
+ return ret;
+ }
+
+ ret = q6apm_graph_media_format_pcm(prtd->graph,
+ substream->stream,
+ runtime->rate,
+ runtime->channels,
+ NULL,
+ prtd->bits_per_sample);
+ if (ret < 0)
+ pr_info("%s: CMD Format block failed\n", __func__);
+
+ ret = q6apm_map_memory_regions(prtd->graph,
+ substream->stream,
+ prtd->phys,
+ (prtd->pcm_size / prtd->periods),
+ prtd->periods);
+
+ if (ret < 0) {
+ dev_err(component->dev, "Audio Start: Buffer Allocation failed rc = %d\n",
+ ret);
+ return -ENOMEM;
+ }
+
+ ret = q6apm_graph_prepare(prtd->graph);
+ ret = q6apm_graph_start(prtd->graph);
+
+ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
+ /* Queue the buffers */
+ for (i = 0; i < runtime->periods; i++)
+ q6apm_read(prtd->graph);
+
+ }
+ prtd->state = Q6APM_STREAM_RUNNING;
+
+ return 0;
+}
+
+static int q6apm_dai_trigger(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream, int cmd)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct q6apm_dai_rtd *prtd = runtime->private_data;
+ int ret = 0;
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_RESUME:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ ret = q6apm_write_async(prtd->graph, prtd->pcm_count, 0, 0, NO_TIMESTAMP);
+ break;
+ case SNDRV_PCM_TRIGGER_STOP:
+ prtd->state = Q6APM_STREAM_STOPPED;
+ //ret = q6apm_cmd_nowait(prtd->graph, CMD_EOS);
+ break;
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ //ret = q6apm_cmd_nowait(prtd->graph, CMD_PAUSE);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ return ret;
+}
+
+static int q6apm_dai_open(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct snd_soc_pcm_runtime *soc_prtd = substream->private_data;
+ struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(soc_prtd, 0);
+ struct q6apm_dai_rtd *prtd;
+ struct q6apm_dai_data *pdata;
+ struct device *dev = component->dev;
+ int ret;
+ int graph_id;
+
+ graph_id = cpu_dai->driver->id;
+
+ pdata = snd_soc_component_get_drvdata(component);
+ if (!pdata) {
+ dev_err(component->dev, "Drv data not found ..\n");
+ return -EINVAL;
+ }
+
+ prtd = kzalloc(sizeof(struct q6apm_dai_rtd), GFP_KERNEL);
+ if (prtd == NULL)
+ return -ENOMEM;
+
+ prtd->substream = substream;
+
+ prtd->graph = q6apm_graph_open(dev, (q6apm_cb)event_handler,
+ prtd, graph_id);
+ if (IS_ERR(prtd->graph)) {
+ pr_info("%s: Could not allocate memory\n", __func__);
+ ret = PTR_ERR(prtd->graph);
+ kfree(prtd);
+ return ret;
+ }
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ runtime->hw = q6apm_dai_hardware_playback;
+ else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
+ runtime->hw = q6apm_dai_hardware_capture;
+
+ /* Ensure that buffer size is a multiple of period size */
+ ret = snd_pcm_hw_constraint_integer(runtime,
+ SNDRV_PCM_HW_PARAM_PERIODS);
+ if (ret < 0)
+ dev_err(dev, "snd_pcm_hw_constraint_integer failed\n");
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ ret = snd_pcm_hw_constraint_minmax(runtime,
+ SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+ BUFFER_BYTES_MIN, BUFFER_BYTES_MAX);
+ if (ret < 0) {
+ dev_err(dev, "constraint for buffer bytes min max ret = %d\n",
+ ret);
+ }
+ }
+
+ ret = snd_pcm_hw_constraint_step(runtime, 0,
+ SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
+ if (ret < 0) {
+ dev_err(dev, "constraint for period bytes step ret = %d\n",
+ ret);
+ }
+ ret = snd_pcm_hw_constraint_step(runtime, 0,
+ SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
+ if (ret < 0) {
+ dev_err(dev, "constraint for buffer bytes step ret = %d\n",
+ ret);
+ }
+
+ runtime->private_data = prtd;
+ runtime->dma_bytes = BUFFER_BYTES_MAX;
+ if (pdata->sid < 0)
+ prtd->phys = substream->dma_buffer.addr;
+ else
+ prtd->phys = substream->dma_buffer.addr | (pdata->sid << 32);
+
+ snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
+
+ return 0;
+}
+
+static int q6apm_dai_close(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct q6apm_dai_rtd *prtd = runtime->private_data;
+
+ if (prtd && prtd->graph) {
+ q6apm_graph_stop(prtd->graph);
+
+ q6apm_unmap_memory_regions(prtd->graph,
+ substream->stream);
+ q6apm_graph_close(prtd->graph);
+ prtd->graph = NULL;
+ kfree(prtd);
+ runtime->private_data = NULL;
+ }
+
+ return 0;
+}
+
+static snd_pcm_uframes_t q6apm_dai_pointer(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream)
+{
+
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct q6apm_dai_rtd *prtd = runtime->private_data;
+
+ if (prtd->pcm_irq_pos >= prtd->pcm_size)
+ prtd->pcm_irq_pos = 0;
+
+ return bytes_to_frames(runtime, (prtd->pcm_irq_pos));
+}
+
+static int q6apm_dai_mmap(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream,
+ struct vm_area_struct *vma)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct device *dev = component->dev;
+
+ return dma_mmap_coherent(dev, vma,
+ runtime->dma_area, runtime->dma_addr,
+ runtime->dma_bytes);
+}
+
+static int q6apm_dai_hw_params(struct snd_soc_component *component,
+ struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct q6apm_dai_rtd *prtd = runtime->private_data;
+
+ prtd->pcm_size = params_buffer_bytes(params);
+ prtd->periods = params_periods(params);
+
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ prtd->bits_per_sample = 16;
+ break;
+ case SNDRV_PCM_FORMAT_S24_LE:
+ prtd->bits_per_sample = 24;
+ break;
+ }
+
+ return 0;
+}
+
+static int q6apm_dai_pcm_new(struct snd_soc_component *component,
+ struct snd_soc_pcm_runtime *rtd)
+{
+ struct snd_pcm_substream *psubstream, *csubstream;
+ struct snd_pcm *pcm = rtd->pcm;
+ struct device *dev;
+ int size, ret;
+
+ dev = component->dev;
+ size = BUFFER_BYTES_MAX;
+ psubstream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
+ if (psubstream) {
+ ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, dev, size,
+ &psubstream->dma_buffer);
+ if (ret) {
+ dev_err(dev, "Cannot allocate buffer(s)\n");
+ return ret;
+ }
+ }
+
+ csubstream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
+ if (csubstream) {
+ ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, dev, size,
+ &csubstream->dma_buffer);
+ if (ret) {
+ dev_err(dev, "Cannot allocate buffer(s)\n");
+ if (psubstream)
+ snd_dma_free_pages(&psubstream->dma_buffer);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static void q6apm_dai_pcm_free(struct snd_soc_component *component,
+ struct snd_pcm *pcm)
+{
+ struct snd_pcm_substream *substream;
+ int i;
+
+ if (!pcm->streams)
+ return;
+
+ for (i = 0; i < ARRAY_SIZE(pcm->streams); i++) {
+ substream = pcm->streams[i].substream;
+ if (substream) {
+ snd_dma_free_pages(&substream->dma_buffer);
+ substream->dma_buffer.area = NULL;
+ substream->dma_buffer.addr = 0;
+ }
+ }
+}
+
+static const struct snd_soc_component_driver q6apm_fe_dai_component = {
+ .name = DRV_NAME,
+ .open = q6apm_dai_open,
+ .close = q6apm_dai_close,
+ .prepare = q6apm_dai_prepare,
+ .pcm_construct = q6apm_dai_pcm_new,
+ .pcm_destruct = q6apm_dai_pcm_free,
+ .mmap = q6apm_dai_mmap,
+ .hw_params = q6apm_dai_hw_params,
+ .pointer = q6apm_dai_pointer,
+ .trigger = q6apm_dai_trigger,
+};
+
+static int q6apm_dai_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *node = dev->of_node;
+ struct of_phandle_args args;
+ struct q6apm_dai_data *pdata;
+ int rc;
+
+ pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return -ENOMEM;
+
+ rc = of_parse_phandle_with_fixed_args(node, "iommus", 1, 0, &args);
+ if (rc < 0)
+ pdata->sid = -1;
+ else
+ pdata->sid = args.args[0] & SID_MASK_DEFAULT;
+
+ dev_set_drvdata(dev, pdata);
+
+ return devm_snd_soc_register_component(dev, &q6apm_fe_dai_component,
+ NULL, 0);
+}
+
+static const struct of_device_id q6apm_dai_device_id[] = {
+ { .compatible = "qcom,q6apm-dais" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, q6apm_dai_device_id);
+
+static struct platform_driver q6apm_dai_platform_driver = {
+ .driver = {
+ .name = "q6apm-dai",
+ .of_match_table = of_match_ptr(q6apm_dai_device_id),
+ },
+ .probe = q6apm_dai_probe,
+};
+module_platform_driver(q6apm_dai_platform_driver);
+
+MODULE_DESCRIPTION("Q6APM dai driver");
+MODULE_LICENSE("GPL v2");
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: [RFC PATCH 08/13] ASoC: qcom: audioreach: add q6apm-dai support
2021-06-07 15:28 ` Srinivas Kandagatla
(?)
@ 2021-06-08 14:48 ` kernel test robot
-1 siblings, 0 replies; 42+ messages in thread
From: kernel test robot @ 2021-06-08 14:48 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 2108 bytes --]
Hi Srinivas,
[FYI, it's a private test report for your RFC patch.]
[auto build test ERROR on asoc/for-next]
[also build test ERROR on robh/for-next sound/for-next linus/master v5.13-rc5 next-20210607]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Srinivas-Kandagatla/ASoC-qcom-Add-AudioReach-support/20210607-233210
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
config: m68k-allmodconfig (attached as .config)
compiler: m68k-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/df205f36da94d1444ff26977479f356b09a39fc4
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Srinivas-Kandagatla/ASoC-qcom-Add-AudioReach-support/20210607-233210
git checkout df205f36da94d1444ff26977479f356b09a39fc4
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=m68k
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>, old ones prefixed by <<):
>> ERROR: modpost: "q6apm_graph_stop" [sound/soc/qcom/audioreach/snd-apm-dai.ko] undefined!
>> ERROR: modpost: "q6apm_graph_close" [sound/soc/qcom/audioreach/snd-apm-dai.ko] undefined!
>> ERROR: modpost: "q6apm_graph_start" [sound/soc/qcom/audioreach/snd-apm-dai.ko] undefined!
>> ERROR: modpost: "q6apm_graph_open" [sound/soc/qcom/audioreach/snd-apm-dai.ko] undefined!
ERROR: modpost: "q6apm_graph_prepare" [sound/soc/qcom/audioreach/snd-apm-dai.ko] undefined!
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 60515 bytes --]
^ permalink raw reply [flat|nested] 42+ messages in thread
* [RFC PATCH 09/13] ASoC: qcom: audioreach: add bedai support
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-07 15:28 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: plai, tiwai, robh, devicetree, perex, alsa-devel, linux-kernel,
lgirdwood, bgoswami, Srinivas Kandagatla
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
sound/soc/qcom/Kconfig | 4 +
sound/soc/qcom/audioreach/Makefile | 2 +
sound/soc/qcom/audioreach/q6apm-bedai.c | 377 ++++++++++++++++++++++++
3 files changed, 383 insertions(+)
create mode 100644 sound/soc/qcom/audioreach/q6apm-bedai.c
diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
index 258fe9ef26f3..4eb1b1a7c1f7 100644
--- a/sound/soc/qcom/Kconfig
+++ b/sound/soc/qcom/Kconfig
@@ -106,11 +106,15 @@ config SND_SOC_QDSP6
config SND_SOC_QCOM_APM_DAI
tristate
+config SND_SOC_QCOM_APM_BEDAI
+ tristate
+
config SND_SOC_QCOM_AUDIOREACH
tristate "SoC ALSA audio drives for Qualcomm AUDIOREACH"
depends on QCOM_GPR
select SND_SOC_TOPOLOGY
select SND_SOC_QCOM_APM_DAI
+ select SND_SOC_QCOM_APM_BEDAI
help
Support for AudioReach in QDSP
diff --git a/sound/soc/qcom/audioreach/Makefile b/sound/soc/qcom/audioreach/Makefile
index 7160bddbb1fb..e8651455b206 100644
--- a/sound/soc/qcom/audioreach/Makefile
+++ b/sound/soc/qcom/audioreach/Makefile
@@ -1,8 +1,10 @@
# SPDX-License-Identifier: GPL-2.0-only
snd-ar-objs := audioreach.o q6apm.o topology.o
snd-apm-dai-objs := q6apm-dai.o
+snd-apm-bedai-objs := q6apm-bedai.o
obj-$(CONFIG_SND_SOC_QCOM_AUDIOREACH) += snd-ar.o
obj-$(CONFIG_SND_SOC_QCOM_APM_DAI) += snd-apm-dai.o
+obj-$(CONFIG_SND_SOC_QCOM_APM_BEDAI) += snd-apm-bedai.o
diff --git a/sound/soc/qcom/audioreach/q6apm-bedai.c b/sound/soc/qcom/audioreach/q6apm-bedai.c
new file mode 100644
index 000000000000..3b0ccf4f119c
--- /dev/null
+++ b/sound/soc/qcom/audioreach/q6apm-bedai.c
@@ -0,0 +1,377 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2021, Linaro Limited
+
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/pcm_params.h>
+#include "audioreach.h"
+#include "q6apm.h"
+
+#define Q6APM_CDC_DMA_RX_DAI(did) { \
+ .playback = { \
+ .stream_name = #did" Playback", \
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
+ SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
+ SNDRV_PCM_RATE_176400, \
+ .formats = SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S24_LE | \
+ SNDRV_PCM_FMTBIT_S32_LE, \
+ .channels_min = 1, \
+ .channels_max = 8, \
+ .rate_min = 8000, \
+ .rate_max = 176400, \
+ }, \
+ .name = #did, \
+ .ops = &q6dma_ops, \
+ .id = did, \
+ }
+
+#define Q6APM_CDC_DMA_TX_DAI(did) { \
+ .capture = { \
+ .stream_name = #did" Capture", \
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
+ SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
+ SNDRV_PCM_RATE_176400, \
+ .formats = SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S24_LE | \
+ SNDRV_PCM_FMTBIT_S32_LE, \
+ .channels_min = 1, \
+ .channels_max = 8, \
+ .rate_min = 8000, \
+ .rate_max = 176400, \
+ }, \
+ .name = #did, \
+ .ops = &q6dma_ops, \
+ .id = did, \
+ }
+
+#define AUDIOREACH_BE_PCM_BASE 16
+
+struct q6apm_bedai_data {
+ struct q6apm_graph *graph[APM_PORT_MAX];
+ uint16_t bits_per_sample[APM_PORT_MAX];
+ bool is_port_started[APM_PORT_MAX];
+ struct q6apm_port_config port_config[APM_PORT_MAX];
+};
+
+static int q6dma_set_channel_map(struct snd_soc_dai *dai,
+ unsigned int tx_num, unsigned int *tx_ch_mask,
+ unsigned int rx_num, unsigned int *rx_ch_mask)
+{
+
+ struct q6apm_bedai_data *dai_data = dev_get_drvdata(dai->dev);
+ struct q6apm_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
+ int ch_mask;
+ int rc = 0;
+
+ switch (dai->id) {
+ case WSA_CODEC_DMA_TX_0:
+ case WSA_CODEC_DMA_TX_1:
+ case WSA_CODEC_DMA_TX_2:
+ case VA_CODEC_DMA_TX_0:
+ case VA_CODEC_DMA_TX_1:
+ case VA_CODEC_DMA_TX_2:
+ case TX_CODEC_DMA_TX_0:
+ case TX_CODEC_DMA_TX_1:
+ case TX_CODEC_DMA_TX_2:
+ case TX_CODEC_DMA_TX_3:
+ case TX_CODEC_DMA_TX_4:
+ case TX_CODEC_DMA_TX_5:
+ if (!tx_ch_mask) {
+ dev_err(dai->dev, "tx slot not found\n");
+ return -EINVAL;
+ }
+
+ if (tx_num > PCM_MAX_NUM_CHANNEL) {
+ dev_err(dai->dev, "invalid tx num %d\n",
+ tx_num);
+ return -EINVAL;
+ }
+ ch_mask = *tx_ch_mask;
+
+ break;
+ case WSA_CODEC_DMA_RX_0:
+ case WSA_CODEC_DMA_RX_1:
+ case RX_CODEC_DMA_RX_0:
+ case RX_CODEC_DMA_RX_1:
+ case RX_CODEC_DMA_RX_2:
+ case RX_CODEC_DMA_RX_3:
+ case RX_CODEC_DMA_RX_4:
+ case RX_CODEC_DMA_RX_5:
+ case RX_CODEC_DMA_RX_6:
+ case RX_CODEC_DMA_RX_7:
+ /* rx */
+ if (!rx_ch_mask) {
+ dev_err(dai->dev, "rx slot not found\n");
+ return -EINVAL;
+ }
+ if (rx_num > APM_PORT_MAX_AUDIO_CHAN_CNT) {
+ dev_err(dai->dev, "invalid rx num %d\n",
+ rx_num);
+ return -EINVAL;
+ }
+ ch_mask = *rx_ch_mask;
+
+ break;
+ default:
+ dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
+ __func__, dai->id);
+ return -EINVAL;
+ }
+
+ cfg->active_channels_mask = ch_mask;
+
+ return rc;
+}
+
+static int q6dma_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct q6apm_bedai_data *dai_data = dev_get_drvdata(dai->dev);
+ struct q6apm_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
+
+ cfg->bit_width = params_width(params);
+ cfg->sample_rate = params_rate(params);
+ cfg->num_channels = params_channels(params);
+
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ dai_data->bits_per_sample[dai->id] = 16;
+ break;
+ case SNDRV_PCM_FORMAT_S24_LE:
+ dai_data->bits_per_sample[dai->id] = 24;
+ break;
+ }
+
+ return 0;
+}
+
+static void q6apm_bedai_shutdown(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct q6apm_bedai_data *dai_data = dev_get_drvdata(dai->dev);
+ int rc;
+
+ if (!dai_data->is_port_started[dai->id])
+ return;
+ rc = q6apm_graph_stop(dai_data->graph[dai->id]);
+ if (rc < 0)
+ dev_err(dai->dev, "fail to close APM port (%d)\n", rc);
+
+ q6apm_graph_close(dai_data->graph[dai->id]);
+ dai_data->is_port_started[dai->id] = false;
+
+}
+
+static int q6apm_bedai_prepare(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct q6apm_bedai_data *dai_data = dev_get_drvdata(dai->dev);
+ struct q6apm_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
+ int graph_id = dai->id;
+ int rc;
+ int ret;
+ struct q6apm_graph *graph;
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ graph = q6apm_graph_open(dai->dev, NULL, dai->dev, graph_id);
+ if (IS_ERR(graph)) {
+ dev_err(dai->dev, "Failed to open graph (%d)\n",
+ graph_id);
+ ret = PTR_ERR(graph);
+ return ret;
+ }
+ dai_data->graph[graph_id] = graph;
+ }
+
+ rc = q6apm_graph_media_format_pcm(dai_data->graph[dai->id],
+ substream->stream, cfg->sample_rate,
+ cfg->num_channels, NULL, cfg->bit_width);
+
+ rc = q6apm_graph_prepare(dai_data->graph[dai->id]);
+ rc = q6apm_graph_start(dai_data->graph[dai->id]);
+ if (rc < 0) {
+ dev_err(dai->dev, "fail to start APM port %x\n", dai->id);
+ return rc;
+ }
+ dai_data->is_port_started[dai->id] = true;
+
+ return 0;
+}
+
+static const struct snd_soc_dapm_route q6apm_dapm_routes[] = {
+ {"WSA_CODEC_DMA_RX_0 Playback", NULL, "WSA_CODEC_DMA_RX_0"},
+ {"WSA_CODEC_DMA_TX_0", NULL, "WSA_CODEC_DMA_TX_0 Capture"},
+ {"WSA_CODEC_DMA_RX_1 Playback", NULL, "WSA_CODEC_DMA_RX_1"},
+ {"WSA_CODEC_DMA_TX_1", NULL, "WSA_CODEC_DMA_TX_1 Capture"},
+ {"WSA_CODEC_DMA_TX_2", NULL, "WSA_CODEC_DMA_TX_2 Capture"},
+ {"VA_CODEC_DMA_TX_0", NULL, "VA_CODEC_DMA_TX_0 Capture"},
+ {"VA_CODEC_DMA_TX_1", NULL, "VA_CODEC_DMA_TX_1 Capture"},
+ {"VA_CODEC_DMA_TX_2", NULL, "VA_CODEC_DMA_TX_2 Capture"},
+ {"RX_CODEC_DMA_RX_0 Playback", NULL, "RX_CODEC_DMA_RX_0"},
+ {"TX_CODEC_DMA_TX_0", NULL, "TX_CODEC_DMA_TX_0 Capture"},
+ {"RX_CODEC_DMA_RX_1 Playback", NULL, "RX_CODEC_DMA_RX_1"},
+ {"TX_CODEC_DMA_TX_1", NULL, "TX_CODEC_DMA_TX_1 Capture"},
+ {"RX_CODEC_DMA_RX_2 Playback", NULL, "RX_CODEC_DMA_RX_2"},
+ {"TX_CODEC_DMA_TX_2", NULL, "TX_CODEC_DMA_TX_2 Capture"},
+ {"RX_CODEC_DMA_RX_3 Playback", NULL, "RX_CODEC_DMA_RX_3"},
+ {"TX_CODEC_DMA_TX_3", NULL, "TX_CODEC_DMA_TX_3 Capture"},
+ {"RX_CODEC_DMA_RX_4 Playback", NULL, "RX_CODEC_DMA_RX_4"},
+ {"TX_CODEC_DMA_TX_4", NULL, "TX_CODEC_DMA_TX_4 Capture"},
+ {"RX_CODEC_DMA_RX_5 Playback", NULL, "RX_CODEC_DMA_RX_5"},
+ {"TX_CODEC_DMA_TX_5", NULL, "TX_CODEC_DMA_TX_5 Capture"},
+ {"RX_CODEC_DMA_RX_6 Playback", NULL, "RX_CODEC_DMA_RX_6"},
+ {"RX_CODEC_DMA_RX_7 Playback", NULL, "RX_CODEC_DMA_RX_7"},
+};
+
+static int q6apm_bedai_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct q6apm_bedai_data *dai_data = dev_get_drvdata(dai->dev);
+ int graph_id = dai->id, ret;
+ struct q6apm_graph *graph;
+
+ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
+ graph = q6apm_graph_open(dai->dev, NULL, dai->dev, graph_id);
+ if (IS_ERR(graph)) {
+ dev_err(dai->dev, "Failed to open graph (%d)\n",
+ graph_id);
+ ret = PTR_ERR(graph);
+ return ret;
+ }
+ dai_data->graph[graph_id] = graph;
+ }
+
+ return 0;
+}
+
+static const struct snd_soc_dai_ops q6dma_ops = {
+ .prepare = q6apm_bedai_prepare,
+ .startup = q6apm_bedai_startup,
+ .shutdown = q6apm_bedai_shutdown,
+ .set_channel_map = q6dma_set_channel_map,
+ .hw_params = q6dma_hw_params,
+};
+
+static struct snd_soc_dai_driver q6apm_be_dais[] = {
+ Q6APM_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_0),
+ Q6APM_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_0),
+ Q6APM_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_1),
+ Q6APM_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_1),
+ Q6APM_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_2),
+ Q6APM_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_0),
+ Q6APM_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_1),
+ Q6APM_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_2),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_0),
+ Q6APM_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_0),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_1),
+ Q6APM_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_1),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_2),
+ Q6APM_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_2),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_3),
+ Q6APM_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_3),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_4),
+ Q6APM_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_4),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_5),
+ Q6APM_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_5),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_6),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_7),
+};
+
+static int q6apm_of_xlate_dai_name(struct snd_soc_component *component,
+ const struct of_phandle_args *args,
+ const char **dai_name)
+{
+ int id = args->args[0];
+ int ret = -EINVAL;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(q6apm_be_dais); i++) {
+ if (q6apm_be_dais[i].id == id) {
+ *dai_name = q6apm_be_dais[i].name;
+ ret = 0;
+ break;
+ }
+ }
+
+ return ret;
+}
+
+static const struct snd_soc_dapm_widget q6apm_bedai_widgets[] = {
+ SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_0", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_0", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_1", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_1", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_2", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_0", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_1", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_2", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_0", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_0", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_1", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_1", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_2", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_2", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_3", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_3", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_4", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_4", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_5", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_5", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_6", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_7", "NULL", 0, SND_SOC_NOPM, 0, 0),
+};
+
+static const struct snd_soc_component_driver q6apm_bedai_component = {
+ .name = "q6apm-be-dai-component",
+ .dapm_widgets = q6apm_bedai_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(q6apm_bedai_widgets),
+ .dapm_routes = q6apm_dapm_routes,
+ .num_dapm_routes = ARRAY_SIZE(q6apm_dapm_routes),
+ .of_xlate_dai_name = q6apm_of_xlate_dai_name,
+ .be_pcm_base = AUDIOREACH_BE_PCM_BASE,
+ .use_dai_pcm_id = true,
+};
+
+static int q6apm_bedai_dev_probe(struct platform_device *pdev)
+{
+ struct q6apm_bedai_data *dai_data;
+ struct device *dev = &pdev->dev;
+
+ dai_data = devm_kzalloc(dev, sizeof(*dai_data), GFP_KERNEL);
+ if (!dai_data)
+ return -ENOMEM;
+
+ dev_set_drvdata(dev, dai_data);
+
+ return devm_snd_soc_register_component(dev, &q6apm_bedai_component,
+ q6apm_be_dais,
+ ARRAY_SIZE(q6apm_be_dais));
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id q6apm_bedai_device_id[] = {
+ { .compatible = "qcom,q6apm-be-dais" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, q6apm_bedai_device_id);
+#endif
+
+static struct platform_driver q6apm_bedai_platform_driver = {
+ .driver = {
+ .name = "q6apm-bedai",
+ .of_match_table = of_match_ptr(q6apm_bedai_device_id),
+ },
+ .probe = q6apm_bedai_dev_probe,
+};
+module_platform_driver(q6apm_bedai_platform_driver);
+
+MODULE_DESCRIPTION("AUDIOREACH Audio BackEnd dai driver");
+MODULE_LICENSE("GPL");
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* [RFC PATCH 09/13] ASoC: qcom: audioreach: add bedai support
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
sound/soc/qcom/Kconfig | 4 +
sound/soc/qcom/audioreach/Makefile | 2 +
sound/soc/qcom/audioreach/q6apm-bedai.c | 377 ++++++++++++++++++++++++
3 files changed, 383 insertions(+)
create mode 100644 sound/soc/qcom/audioreach/q6apm-bedai.c
diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
index 258fe9ef26f3..4eb1b1a7c1f7 100644
--- a/sound/soc/qcom/Kconfig
+++ b/sound/soc/qcom/Kconfig
@@ -106,11 +106,15 @@ config SND_SOC_QDSP6
config SND_SOC_QCOM_APM_DAI
tristate
+config SND_SOC_QCOM_APM_BEDAI
+ tristate
+
config SND_SOC_QCOM_AUDIOREACH
tristate "SoC ALSA audio drives for Qualcomm AUDIOREACH"
depends on QCOM_GPR
select SND_SOC_TOPOLOGY
select SND_SOC_QCOM_APM_DAI
+ select SND_SOC_QCOM_APM_BEDAI
help
Support for AudioReach in QDSP
diff --git a/sound/soc/qcom/audioreach/Makefile b/sound/soc/qcom/audioreach/Makefile
index 7160bddbb1fb..e8651455b206 100644
--- a/sound/soc/qcom/audioreach/Makefile
+++ b/sound/soc/qcom/audioreach/Makefile
@@ -1,8 +1,10 @@
# SPDX-License-Identifier: GPL-2.0-only
snd-ar-objs := audioreach.o q6apm.o topology.o
snd-apm-dai-objs := q6apm-dai.o
+snd-apm-bedai-objs := q6apm-bedai.o
obj-$(CONFIG_SND_SOC_QCOM_AUDIOREACH) += snd-ar.o
obj-$(CONFIG_SND_SOC_QCOM_APM_DAI) += snd-apm-dai.o
+obj-$(CONFIG_SND_SOC_QCOM_APM_BEDAI) += snd-apm-bedai.o
diff --git a/sound/soc/qcom/audioreach/q6apm-bedai.c b/sound/soc/qcom/audioreach/q6apm-bedai.c
new file mode 100644
index 000000000000..3b0ccf4f119c
--- /dev/null
+++ b/sound/soc/qcom/audioreach/q6apm-bedai.c
@@ -0,0 +1,377 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2021, Linaro Limited
+
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/pcm_params.h>
+#include "audioreach.h"
+#include "q6apm.h"
+
+#define Q6APM_CDC_DMA_RX_DAI(did) { \
+ .playback = { \
+ .stream_name = #did" Playback", \
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
+ SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
+ SNDRV_PCM_RATE_176400, \
+ .formats = SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S24_LE | \
+ SNDRV_PCM_FMTBIT_S32_LE, \
+ .channels_min = 1, \
+ .channels_max = 8, \
+ .rate_min = 8000, \
+ .rate_max = 176400, \
+ }, \
+ .name = #did, \
+ .ops = &q6dma_ops, \
+ .id = did, \
+ }
+
+#define Q6APM_CDC_DMA_TX_DAI(did) { \
+ .capture = { \
+ .stream_name = #did" Capture", \
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
+ SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
+ SNDRV_PCM_RATE_176400, \
+ .formats = SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S24_LE | \
+ SNDRV_PCM_FMTBIT_S32_LE, \
+ .channels_min = 1, \
+ .channels_max = 8, \
+ .rate_min = 8000, \
+ .rate_max = 176400, \
+ }, \
+ .name = #did, \
+ .ops = &q6dma_ops, \
+ .id = did, \
+ }
+
+#define AUDIOREACH_BE_PCM_BASE 16
+
+struct q6apm_bedai_data {
+ struct q6apm_graph *graph[APM_PORT_MAX];
+ uint16_t bits_per_sample[APM_PORT_MAX];
+ bool is_port_started[APM_PORT_MAX];
+ struct q6apm_port_config port_config[APM_PORT_MAX];
+};
+
+static int q6dma_set_channel_map(struct snd_soc_dai *dai,
+ unsigned int tx_num, unsigned int *tx_ch_mask,
+ unsigned int rx_num, unsigned int *rx_ch_mask)
+{
+
+ struct q6apm_bedai_data *dai_data = dev_get_drvdata(dai->dev);
+ struct q6apm_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
+ int ch_mask;
+ int rc = 0;
+
+ switch (dai->id) {
+ case WSA_CODEC_DMA_TX_0:
+ case WSA_CODEC_DMA_TX_1:
+ case WSA_CODEC_DMA_TX_2:
+ case VA_CODEC_DMA_TX_0:
+ case VA_CODEC_DMA_TX_1:
+ case VA_CODEC_DMA_TX_2:
+ case TX_CODEC_DMA_TX_0:
+ case TX_CODEC_DMA_TX_1:
+ case TX_CODEC_DMA_TX_2:
+ case TX_CODEC_DMA_TX_3:
+ case TX_CODEC_DMA_TX_4:
+ case TX_CODEC_DMA_TX_5:
+ if (!tx_ch_mask) {
+ dev_err(dai->dev, "tx slot not found\n");
+ return -EINVAL;
+ }
+
+ if (tx_num > PCM_MAX_NUM_CHANNEL) {
+ dev_err(dai->dev, "invalid tx num %d\n",
+ tx_num);
+ return -EINVAL;
+ }
+ ch_mask = *tx_ch_mask;
+
+ break;
+ case WSA_CODEC_DMA_RX_0:
+ case WSA_CODEC_DMA_RX_1:
+ case RX_CODEC_DMA_RX_0:
+ case RX_CODEC_DMA_RX_1:
+ case RX_CODEC_DMA_RX_2:
+ case RX_CODEC_DMA_RX_3:
+ case RX_CODEC_DMA_RX_4:
+ case RX_CODEC_DMA_RX_5:
+ case RX_CODEC_DMA_RX_6:
+ case RX_CODEC_DMA_RX_7:
+ /* rx */
+ if (!rx_ch_mask) {
+ dev_err(dai->dev, "rx slot not found\n");
+ return -EINVAL;
+ }
+ if (rx_num > APM_PORT_MAX_AUDIO_CHAN_CNT) {
+ dev_err(dai->dev, "invalid rx num %d\n",
+ rx_num);
+ return -EINVAL;
+ }
+ ch_mask = *rx_ch_mask;
+
+ break;
+ default:
+ dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
+ __func__, dai->id);
+ return -EINVAL;
+ }
+
+ cfg->active_channels_mask = ch_mask;
+
+ return rc;
+}
+
+static int q6dma_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct q6apm_bedai_data *dai_data = dev_get_drvdata(dai->dev);
+ struct q6apm_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
+
+ cfg->bit_width = params_width(params);
+ cfg->sample_rate = params_rate(params);
+ cfg->num_channels = params_channels(params);
+
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ dai_data->bits_per_sample[dai->id] = 16;
+ break;
+ case SNDRV_PCM_FORMAT_S24_LE:
+ dai_data->bits_per_sample[dai->id] = 24;
+ break;
+ }
+
+ return 0;
+}
+
+static void q6apm_bedai_shutdown(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct q6apm_bedai_data *dai_data = dev_get_drvdata(dai->dev);
+ int rc;
+
+ if (!dai_data->is_port_started[dai->id])
+ return;
+ rc = q6apm_graph_stop(dai_data->graph[dai->id]);
+ if (rc < 0)
+ dev_err(dai->dev, "fail to close APM port (%d)\n", rc);
+
+ q6apm_graph_close(dai_data->graph[dai->id]);
+ dai_data->is_port_started[dai->id] = false;
+
+}
+
+static int q6apm_bedai_prepare(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct q6apm_bedai_data *dai_data = dev_get_drvdata(dai->dev);
+ struct q6apm_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
+ int graph_id = dai->id;
+ int rc;
+ int ret;
+ struct q6apm_graph *graph;
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ graph = q6apm_graph_open(dai->dev, NULL, dai->dev, graph_id);
+ if (IS_ERR(graph)) {
+ dev_err(dai->dev, "Failed to open graph (%d)\n",
+ graph_id);
+ ret = PTR_ERR(graph);
+ return ret;
+ }
+ dai_data->graph[graph_id] = graph;
+ }
+
+ rc = q6apm_graph_media_format_pcm(dai_data->graph[dai->id],
+ substream->stream, cfg->sample_rate,
+ cfg->num_channels, NULL, cfg->bit_width);
+
+ rc = q6apm_graph_prepare(dai_data->graph[dai->id]);
+ rc = q6apm_graph_start(dai_data->graph[dai->id]);
+ if (rc < 0) {
+ dev_err(dai->dev, "fail to start APM port %x\n", dai->id);
+ return rc;
+ }
+ dai_data->is_port_started[dai->id] = true;
+
+ return 0;
+}
+
+static const struct snd_soc_dapm_route q6apm_dapm_routes[] = {
+ {"WSA_CODEC_DMA_RX_0 Playback", NULL, "WSA_CODEC_DMA_RX_0"},
+ {"WSA_CODEC_DMA_TX_0", NULL, "WSA_CODEC_DMA_TX_0 Capture"},
+ {"WSA_CODEC_DMA_RX_1 Playback", NULL, "WSA_CODEC_DMA_RX_1"},
+ {"WSA_CODEC_DMA_TX_1", NULL, "WSA_CODEC_DMA_TX_1 Capture"},
+ {"WSA_CODEC_DMA_TX_2", NULL, "WSA_CODEC_DMA_TX_2 Capture"},
+ {"VA_CODEC_DMA_TX_0", NULL, "VA_CODEC_DMA_TX_0 Capture"},
+ {"VA_CODEC_DMA_TX_1", NULL, "VA_CODEC_DMA_TX_1 Capture"},
+ {"VA_CODEC_DMA_TX_2", NULL, "VA_CODEC_DMA_TX_2 Capture"},
+ {"RX_CODEC_DMA_RX_0 Playback", NULL, "RX_CODEC_DMA_RX_0"},
+ {"TX_CODEC_DMA_TX_0", NULL, "TX_CODEC_DMA_TX_0 Capture"},
+ {"RX_CODEC_DMA_RX_1 Playback", NULL, "RX_CODEC_DMA_RX_1"},
+ {"TX_CODEC_DMA_TX_1", NULL, "TX_CODEC_DMA_TX_1 Capture"},
+ {"RX_CODEC_DMA_RX_2 Playback", NULL, "RX_CODEC_DMA_RX_2"},
+ {"TX_CODEC_DMA_TX_2", NULL, "TX_CODEC_DMA_TX_2 Capture"},
+ {"RX_CODEC_DMA_RX_3 Playback", NULL, "RX_CODEC_DMA_RX_3"},
+ {"TX_CODEC_DMA_TX_3", NULL, "TX_CODEC_DMA_TX_3 Capture"},
+ {"RX_CODEC_DMA_RX_4 Playback", NULL, "RX_CODEC_DMA_RX_4"},
+ {"TX_CODEC_DMA_TX_4", NULL, "TX_CODEC_DMA_TX_4 Capture"},
+ {"RX_CODEC_DMA_RX_5 Playback", NULL, "RX_CODEC_DMA_RX_5"},
+ {"TX_CODEC_DMA_TX_5", NULL, "TX_CODEC_DMA_TX_5 Capture"},
+ {"RX_CODEC_DMA_RX_6 Playback", NULL, "RX_CODEC_DMA_RX_6"},
+ {"RX_CODEC_DMA_RX_7 Playback", NULL, "RX_CODEC_DMA_RX_7"},
+};
+
+static int q6apm_bedai_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct q6apm_bedai_data *dai_data = dev_get_drvdata(dai->dev);
+ int graph_id = dai->id, ret;
+ struct q6apm_graph *graph;
+
+ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
+ graph = q6apm_graph_open(dai->dev, NULL, dai->dev, graph_id);
+ if (IS_ERR(graph)) {
+ dev_err(dai->dev, "Failed to open graph (%d)\n",
+ graph_id);
+ ret = PTR_ERR(graph);
+ return ret;
+ }
+ dai_data->graph[graph_id] = graph;
+ }
+
+ return 0;
+}
+
+static const struct snd_soc_dai_ops q6dma_ops = {
+ .prepare = q6apm_bedai_prepare,
+ .startup = q6apm_bedai_startup,
+ .shutdown = q6apm_bedai_shutdown,
+ .set_channel_map = q6dma_set_channel_map,
+ .hw_params = q6dma_hw_params,
+};
+
+static struct snd_soc_dai_driver q6apm_be_dais[] = {
+ Q6APM_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_0),
+ Q6APM_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_0),
+ Q6APM_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_1),
+ Q6APM_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_1),
+ Q6APM_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_2),
+ Q6APM_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_0),
+ Q6APM_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_1),
+ Q6APM_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_2),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_0),
+ Q6APM_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_0),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_1),
+ Q6APM_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_1),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_2),
+ Q6APM_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_2),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_3),
+ Q6APM_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_3),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_4),
+ Q6APM_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_4),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_5),
+ Q6APM_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_5),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_6),
+ Q6APM_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_7),
+};
+
+static int q6apm_of_xlate_dai_name(struct snd_soc_component *component,
+ const struct of_phandle_args *args,
+ const char **dai_name)
+{
+ int id = args->args[0];
+ int ret = -EINVAL;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(q6apm_be_dais); i++) {
+ if (q6apm_be_dais[i].id == id) {
+ *dai_name = q6apm_be_dais[i].name;
+ ret = 0;
+ break;
+ }
+ }
+
+ return ret;
+}
+
+static const struct snd_soc_dapm_widget q6apm_bedai_widgets[] = {
+ SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_0", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_0", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_1", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_1", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_2", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_0", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_1", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_2", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_0", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_0", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_1", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_1", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_2", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_2", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_3", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_3", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_4", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_4", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_5", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_5", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_6", "NULL", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_7", "NULL", 0, SND_SOC_NOPM, 0, 0),
+};
+
+static const struct snd_soc_component_driver q6apm_bedai_component = {
+ .name = "q6apm-be-dai-component",
+ .dapm_widgets = q6apm_bedai_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(q6apm_bedai_widgets),
+ .dapm_routes = q6apm_dapm_routes,
+ .num_dapm_routes = ARRAY_SIZE(q6apm_dapm_routes),
+ .of_xlate_dai_name = q6apm_of_xlate_dai_name,
+ .be_pcm_base = AUDIOREACH_BE_PCM_BASE,
+ .use_dai_pcm_id = true,
+};
+
+static int q6apm_bedai_dev_probe(struct platform_device *pdev)
+{
+ struct q6apm_bedai_data *dai_data;
+ struct device *dev = &pdev->dev;
+
+ dai_data = devm_kzalloc(dev, sizeof(*dai_data), GFP_KERNEL);
+ if (!dai_data)
+ return -ENOMEM;
+
+ dev_set_drvdata(dev, dai_data);
+
+ return devm_snd_soc_register_component(dev, &q6apm_bedai_component,
+ q6apm_be_dais,
+ ARRAY_SIZE(q6apm_be_dais));
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id q6apm_bedai_device_id[] = {
+ { .compatible = "qcom,q6apm-be-dais" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, q6apm_bedai_device_id);
+#endif
+
+static struct platform_driver q6apm_bedai_platform_driver = {
+ .driver = {
+ .name = "q6apm-bedai",
+ .of_match_table = of_match_ptr(q6apm_bedai_device_id),
+ },
+ .probe = q6apm_bedai_dev_probe,
+};
+module_platform_driver(q6apm_bedai_platform_driver);
+
+MODULE_DESCRIPTION("AUDIOREACH Audio BackEnd dai driver");
+MODULE_LICENSE("GPL");
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [RFC PATCH 10/13] ASoC: qcom: dt-bindings: add bindings for Proxy Resource Manager
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-07 15:28 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: plai, tiwai, robh, devicetree, perex, alsa-devel, linux-kernel,
lgirdwood, bgoswami, Srinivas Kandagatla
This patch adds bindings support for Qualcomm Proxy Resource Manager
service in Audio DSP.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../devicetree/bindings/sound/qcom,q6prm.yaml | 43 +++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6prm.yaml
diff --git a/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml
new file mode 100644
index 000000000000..6f14146c1ea1
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/qcom,q6prm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Q6 Proxy Resource Manager
+
+maintainers:
+ - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+
+description: |
+ Proxy Resource Manager module is core module used to manage
+ core dsp resources like clocks
+
+properties:
+ compatible:
+ const: qcom,q6prm
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 2
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ gpr {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gprservice@2 {
+ compatible = "qcom,q6prm";
+ reg = <2>;
+ #clock-cells = <2>;
+ };
+ };
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* [RFC PATCH 10/13] ASoC: qcom: dt-bindings: add bindings for Proxy Resource Manager
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
This patch adds bindings support for Qualcomm Proxy Resource Manager
service in Audio DSP.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../devicetree/bindings/sound/qcom,q6prm.yaml | 43 +++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6prm.yaml
diff --git a/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml
new file mode 100644
index 000000000000..6f14146c1ea1
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/qcom,q6prm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Q6 Proxy Resource Manager
+
+maintainers:
+ - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+
+description: |
+ Proxy Resource Manager module is core module used to manage
+ core dsp resources like clocks
+
+properties:
+ compatible:
+ const: qcom,q6prm
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 2
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ gpr {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gprservice@2 {
+ compatible = "qcom,q6prm";
+ reg = <2>;
+ #clock-cells = <2>;
+ };
+ };
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [RFC PATCH 11/13] ASoC: qcom: audioreach: add q6prm support
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-07 15:28 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: plai, tiwai, robh, devicetree, perex, alsa-devel, linux-kernel,
lgirdwood, bgoswami, Srinivas Kandagatla
Add support to q6prm (Proxy Resource Manager) module used for clock resources
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
include/dt-bindings/sound/qcom,q6prm.h | 205 ++++++++++++
sound/soc/qcom/Kconfig | 4 +
sound/soc/qcom/audioreach/Makefile | 2 +
sound/soc/qcom/audioreach/q6prm.c | 412 +++++++++++++++++++++++++
4 files changed, 623 insertions(+)
create mode 100644 include/dt-bindings/sound/qcom,q6prm.h
create mode 100644 sound/soc/qcom/audioreach/q6prm.c
diff --git a/include/dt-bindings/sound/qcom,q6prm.h b/include/dt-bindings/sound/qcom,q6prm.h
new file mode 100644
index 000000000000..1c5f84fa573a
--- /dev/null
+++ b/include/dt-bindings/sound/qcom,q6prm.h
@@ -0,0 +1,205 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_Q6_PRM_H__
+#define __DT_BINDINGS_Q6_PRM_H__
+
+/* Audio Front End (PRM) virtual ports IDs */
+#define HDMI_RX 1
+#define SLIMBUS_0_RX 2
+#define SLIMBUS_0_TX 3
+#define SLIMBUS_1_RX 4
+#define SLIMBUS_1_TX 5
+#define SLIMBUS_2_RX 6
+#define SLIMBUS_2_TX 7
+#define SLIMBUS_3_RX 8
+#define SLIMBUS_3_TX 9
+#define SLIMBUS_4_RX 10
+#define SLIMBUS_4_TX 11
+#define SLIMBUS_5_RX 12
+#define SLIMBUS_5_TX 13
+#define SLIMBUS_6_RX 14
+#define SLIMBUS_6_TX 15
+#define PRIMARY_MI2S_RX 16
+#define PRIMARY_MI2S_TX 17
+#define SECONDARY_MI2S_RX 18
+#define SECONDARY_MI2S_TX 19
+#define TERTIARY_MI2S_RX 20
+#define TERTIARY_MI2S_TX 21
+#define QUATERNARY_MI2S_RX 22
+#define QUATERNARY_MI2S_TX 23
+#define PRIMARY_TDM_RX_0 24
+#define PRIMARY_TDM_TX_0 25
+#define PRIMARY_TDM_RX_1 26
+#define PRIMARY_TDM_TX_1 27
+#define PRIMARY_TDM_RX_2 28
+#define PRIMARY_TDM_TX_2 29
+#define PRIMARY_TDM_RX_3 30
+#define PRIMARY_TDM_TX_3 31
+#define PRIMARY_TDM_RX_4 32
+#define PRIMARY_TDM_TX_4 33
+#define PRIMARY_TDM_RX_5 34
+#define PRIMARY_TDM_TX_5 35
+#define PRIMARY_TDM_RX_6 36
+#define PRIMARY_TDM_TX_6 37
+#define PRIMARY_TDM_RX_7 38
+#define PRIMARY_TDM_TX_7 39
+#define SECONDARY_TDM_RX_0 40
+#define SECONDARY_TDM_TX_0 41
+#define SECONDARY_TDM_RX_1 42
+#define SECONDARY_TDM_TX_1 43
+#define SECONDARY_TDM_RX_2 44
+#define SECONDARY_TDM_TX_2 45
+#define SECONDARY_TDM_RX_3 46
+#define SECONDARY_TDM_TX_3 47
+#define SECONDARY_TDM_RX_4 48
+#define SECONDARY_TDM_TX_4 49
+#define SECONDARY_TDM_RX_5 50
+#define SECONDARY_TDM_TX_5 51
+#define SECONDARY_TDM_RX_6 52
+#define SECONDARY_TDM_TX_6 53
+#define SECONDARY_TDM_RX_7 54
+#define SECONDARY_TDM_TX_7 55
+#define TERTIARY_TDM_RX_0 56
+#define TERTIARY_TDM_TX_0 57
+#define TERTIARY_TDM_RX_1 58
+#define TERTIARY_TDM_TX_1 59
+#define TERTIARY_TDM_RX_2 60
+#define TERTIARY_TDM_TX_2 61
+#define TERTIARY_TDM_RX_3 62
+#define TERTIARY_TDM_TX_3 63
+#define TERTIARY_TDM_RX_4 64
+#define TERTIARY_TDM_TX_4 65
+#define TERTIARY_TDM_RX_5 66
+#define TERTIARY_TDM_TX_5 67
+#define TERTIARY_TDM_RX_6 68
+#define TERTIARY_TDM_TX_6 69
+#define TERTIARY_TDM_RX_7 70
+#define TERTIARY_TDM_TX_7 71
+#define QUATERNARY_TDM_RX_0 72
+#define QUATERNARY_TDM_TX_0 73
+#define QUATERNARY_TDM_RX_1 74
+#define QUATERNARY_TDM_TX_1 75
+#define QUATERNARY_TDM_RX_2 76
+#define QUATERNARY_TDM_TX_2 77
+#define QUATERNARY_TDM_RX_3 78
+#define QUATERNARY_TDM_TX_3 79
+#define QUATERNARY_TDM_RX_4 80
+#define QUATERNARY_TDM_TX_4 81
+#define QUATERNARY_TDM_RX_5 82
+#define QUATERNARY_TDM_TX_5 83
+#define QUATERNARY_TDM_RX_6 84
+#define QUATERNARY_TDM_TX_6 85
+#define QUATERNARY_TDM_RX_7 86
+#define QUATERNARY_TDM_TX_7 87
+#define QUINARY_TDM_RX_0 88
+#define QUINARY_TDM_TX_0 89
+#define QUINARY_TDM_RX_1 90
+#define QUINARY_TDM_TX_1 91
+#define QUINARY_TDM_RX_2 92
+#define QUINARY_TDM_TX_2 93
+#define QUINARY_TDM_RX_3 94
+#define QUINARY_TDM_TX_3 95
+#define QUINARY_TDM_RX_4 96
+#define QUINARY_TDM_TX_4 97
+#define QUINARY_TDM_RX_5 98
+#define QUINARY_TDM_TX_5 99
+#define QUINARY_TDM_RX_6 100
+#define QUINARY_TDM_TX_6 101
+#define QUINARY_TDM_RX_7 102
+#define QUINARY_TDM_TX_7 103
+#define DISPLAY_PORT_RX 104
+#define WSA_CODEC_DMA_RX_0 105
+#define WSA_CODEC_DMA_TX_0 106
+#define WSA_CODEC_DMA_RX_1 107
+#define WSA_CODEC_DMA_TX_1 108
+#define WSA_CODEC_DMA_TX_2 109
+#define VA_CODEC_DMA_TX_0 110
+#define VA_CODEC_DMA_TX_1 111
+#define VA_CODEC_DMA_TX_2 112
+#define RX_CODEC_DMA_RX_0 113
+#define TX_CODEC_DMA_TX_0 114
+#define RX_CODEC_DMA_RX_1 115
+#define TX_CODEC_DMA_TX_1 116
+#define RX_CODEC_DMA_RX_2 117
+#define TX_CODEC_DMA_TX_2 118
+#define RX_CODEC_DMA_RX_3 119
+#define TX_CODEC_DMA_TX_3 120
+#define RX_CODEC_DMA_RX_4 121
+#define TX_CODEC_DMA_TX_4 122
+#define RX_CODEC_DMA_RX_5 123
+#define TX_CODEC_DMA_TX_5 124
+#define RX_CODEC_DMA_RX_6 125
+#define RX_CODEC_DMA_RX_7 126
+
+#define LPASS_CLK_ID_PRI_MI2S_IBIT 1
+#define LPASS_CLK_ID_PRI_MI2S_EBIT 2
+#define LPASS_CLK_ID_SEC_MI2S_IBIT 3
+#define LPASS_CLK_ID_SEC_MI2S_EBIT 4
+#define LPASS_CLK_ID_TER_MI2S_IBIT 5
+#define LPASS_CLK_ID_TER_MI2S_EBIT 6
+#define LPASS_CLK_ID_QUAD_MI2S_IBIT 7
+#define LPASS_CLK_ID_QUAD_MI2S_EBIT 8
+#define LPASS_CLK_ID_SPEAKER_I2S_IBIT 9
+#define LPASS_CLK_ID_SPEAKER_I2S_EBIT 10
+#define LPASS_CLK_ID_SPEAKER_I2S_OSR 11
+#define LPASS_CLK_ID_QUI_MI2S_IBIT 12
+#define LPASS_CLK_ID_QUI_MI2S_EBIT 13
+#define LPASS_CLK_ID_SEN_MI2S_IBIT 14
+#define LPASS_CLK_ID_SEN_MI2S_EBIT 15
+#define LPASS_CLK_ID_INT0_MI2S_IBIT 16
+#define LPASS_CLK_ID_INT1_MI2S_IBIT 17
+#define LPASS_CLK_ID_INT2_MI2S_IBIT 18
+#define LPASS_CLK_ID_INT3_MI2S_IBIT 19
+#define LPASS_CLK_ID_INT4_MI2S_IBIT 20
+#define LPASS_CLK_ID_INT5_MI2S_IBIT 21
+#define LPASS_CLK_ID_INT6_MI2S_IBIT 22
+#define LPASS_CLK_ID_QUI_MI2S_OSR 23
+#define LPASS_CLK_ID_PRI_PCM_IBIT 24
+#define LPASS_CLK_ID_PRI_PCM_EBIT 25
+#define LPASS_CLK_ID_SEC_PCM_IBIT 26
+#define LPASS_CLK_ID_SEC_PCM_EBIT 27
+#define LPASS_CLK_ID_TER_PCM_IBIT 28
+#define LPASS_CLK_ID_TER_PCM_EBIT 29
+#define LPASS_CLK_ID_QUAD_PCM_IBIT 30
+#define LPASS_CLK_ID_QUAD_PCM_EBIT 31
+#define LPASS_CLK_ID_QUIN_PCM_IBIT 32
+#define LPASS_CLK_ID_QUIN_PCM_EBIT 33
+#define LPASS_CLK_ID_QUI_PCM_OSR 34
+#define LPASS_CLK_ID_PRI_TDM_IBIT 35
+#define LPASS_CLK_ID_PRI_TDM_EBIT 36
+#define LPASS_CLK_ID_SEC_TDM_IBIT 37
+#define LPASS_CLK_ID_SEC_TDM_EBIT 38
+#define LPASS_CLK_ID_TER_TDM_IBIT 39
+#define LPASS_CLK_ID_TER_TDM_EBIT 40
+#define LPASS_CLK_ID_QUAD_TDM_IBIT 41
+#define LPASS_CLK_ID_QUAD_TDM_EBIT 42
+#define LPASS_CLK_ID_QUIN_TDM_IBIT 43
+#define LPASS_CLK_ID_QUIN_TDM_EBIT 44
+#define LPASS_CLK_ID_QUIN_TDM_OSR 45
+#define LPASS_CLK_ID_MCLK_1 46
+#define LPASS_CLK_ID_MCLK_2 47
+#define LPASS_CLK_ID_MCLK_3 48
+#define LPASS_CLK_ID_MCLK_4 49
+#define LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE 50
+#define LPASS_CLK_ID_INT_MCLK_0 51
+#define LPASS_CLK_ID_INT_MCLK_1 52
+#define LPASS_CLK_ID_MCLK_5 53
+#define LPASS_CLK_ID_WSA_CORE_MCLK 54
+#define LPASS_CLK_ID_WSA_CORE_NPL_MCLK 55
+#define LPASS_CLK_ID_VA_CORE_MCLK 56
+#define LPASS_CLK_ID_TX_CORE_MCLK 57
+#define LPASS_CLK_ID_TX_CORE_NPL_MCLK 58
+#define LPASS_CLK_ID_RX_CORE_MCLK 59
+#define LPASS_CLK_ID_RX_CORE_NPL_MCLK 60
+#define LPASS_CLK_ID_VA_CORE_2X_MCLK 61
+
+#define LPASS_HW_MACRO_VOTE 102
+#define LPASS_HW_DCODEC_VOTE 103
+
+#define Q6PRM_MAX_CLK_ID 104
+
+#define LPASS_CLK_ATTRIBUTE_INVALID 0x0
+#define LPASS_CLK_ATTRIBUTE_COUPLE_NO 0x1
+#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND 0x2
+#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR 0x3
+
+#endif /* __DT_BINDINGS_Q6_PRM_H__ */
diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
index 4eb1b1a7c1f7..fa3ab78b125e 100644
--- a/sound/soc/qcom/Kconfig
+++ b/sound/soc/qcom/Kconfig
@@ -109,12 +109,16 @@ config SND_SOC_QCOM_APM_DAI
config SND_SOC_QCOM_APM_BEDAI
tristate
+config SND_SOC_QCOM_PRM
+ tristate
+
config SND_SOC_QCOM_AUDIOREACH
tristate "SoC ALSA audio drives for Qualcomm AUDIOREACH"
depends on QCOM_GPR
select SND_SOC_TOPOLOGY
select SND_SOC_QCOM_APM_DAI
select SND_SOC_QCOM_APM_BEDAI
+ select SND_SOC_QCOM_PRM
help
Support for AudioReach in QDSP
diff --git a/sound/soc/qcom/audioreach/Makefile b/sound/soc/qcom/audioreach/Makefile
index e8651455b206..d9904201ccf0 100644
--- a/sound/soc/qcom/audioreach/Makefile
+++ b/sound/soc/qcom/audioreach/Makefile
@@ -2,9 +2,11 @@
snd-ar-objs := audioreach.o q6apm.o topology.o
snd-apm-dai-objs := q6apm-dai.o
snd-apm-bedai-objs := q6apm-bedai.o
+snd-prm-objs := q6prm.o
obj-$(CONFIG_SND_SOC_QCOM_AUDIOREACH) += snd-ar.o
obj-$(CONFIG_SND_SOC_QCOM_APM_DAI) += snd-apm-dai.o
obj-$(CONFIG_SND_SOC_QCOM_APM_BEDAI) += snd-apm-bedai.o
+obj-$(CONFIG_SND_SOC_QCOM_PRM) += snd-prm.o
diff --git a/sound/soc/qcom/audioreach/q6prm.c b/sound/soc/qcom/audioreach/q6prm.c
new file mode 100644
index 000000000000..84a9ca3aa7fd
--- /dev/null
+++ b/sound/soc/qcom/audioreach/q6prm.c
@@ -0,0 +1,412 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2021, Linaro Limited
+
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/delay.h>
+#include <linux/of_platform.h>
+#include <linux/clk-provider.h>
+#include <linux/jiffies.h>
+#include <linux/soc/qcom/gpr.h>
+#include <dt-bindings/soc/qcom,gpr.h>
+#include <dt-bindings/sound/qcom,q6prm.h>
+#include "audioreach.h"
+
+#define Q6PRM_CLK(id) &(struct q6prm_clk) { \
+ .clk_id = id, \
+ .afe_clk_id = Q6PRM_##id, \
+ .name = #id, \
+ .attributes = LPASS_CLK_ATTRIBUTE_COUPLE_NO, \
+ .rate = 19200000, \
+ .hw.init = &(struct clk_init_data) { \
+ .ops = &clk_q6prm_ops, \
+ .name = #id, \
+ }, \
+ }
+
+#define Q6PRM_VOTE_CLK(id, blkid) &(struct q6prm_clk) { \
+ .clk_id = id, \
+ .afe_clk_id = blkid, \
+ .hw.init = &(struct clk_init_data) { \
+ .ops = &clk_vote_q6prm_ops, \
+ .name = #id, \
+ }, \
+ }
+
+struct q6prm_clk {
+ struct device *dev;
+ int clk_id;
+ int afe_clk_id;
+ char *name;
+ int attributes;
+ int rate;
+ uint32_t handle;
+ struct clk_hw hw;
+};
+#define to_q6prm_clk(_hw) container_of(_hw, struct q6prm_clk, hw)
+
+struct q6prm {
+ struct device *dev;
+ struct gpr_device *gdev;
+ wait_queue_head_t wait;
+ struct gpr_ibasic_rsp_result_t result;
+ struct mutex lock;
+ struct q6prm_clk **clks;
+ int num_clks;
+};
+
+#define PRM_CMD_REQUEST_HW_RSC 0x0100100F
+#define PRM_CMD_RSP_REQUEST_HW_RSC 0x02001002
+#define PRM_CMD_RELEASE_HW_RSC 0x01001010
+#define PRM_CMD_RSP_RELEASE_HW_RSC 0x02001003
+
+#define PARAM_ID_RSC_HW_CORE 0x08001032
+#define PARAM_ID_RSC_LPASS_CORE 0x0800102B
+#define PARAM_ID_RSC_AUDIO_HW_CLK 0x0800102C
+
+#define Q6PRM_LPASS_CLK_ID_WSA_CORE_MCLK 0x305
+#define Q6PRM_LPASS_CLK_ID_WSA_CORE_NPL_MCLK 0x306
+
+#define Q6PRM_LPASS_CLK_ID_VA_CORE_MCLK 0x307
+#define Q6PRM_LPASS_CLK_ID_VA_CORE_2X_MCLK 0x308
+
+#define Q6PRM_LPASS_CLK_ID_TX_CORE_MCLK 0x30c
+#define Q6PRM_LPASS_CLK_ID_TX_CORE_NPL_MCLK 0x30d
+
+#define Q6PRM_LPASS_CLK_ID_RX_CORE_MCLK 0x30e
+#define Q6PRM_LPASS_CLK_ID_RX_CORE_NPL_MCLK 0x30f
+
+#define Q6PRM_LPASS_CLK_SRC_INTERNAL 1
+#define Q6PRM_LPASS_CLK_ROOT_DEFAULT 0
+#define Q6PRM_HW_CORE_ID_LPASS 1
+#define Q6PRM_HW_CORE_ID_DCODEC 2
+
+struct prm_cmd_request_hw_core {
+ struct apm_module_param_data param_data;
+ uint32_t hw_clk_id;
+} __packed;
+
+struct prm_cmd_request_rsc {
+ struct apm_module_param_data param_data;
+ uint32_t num_clk_id;
+ struct audio_hw_clk_cfg clock_ids[1];
+} __packed;
+
+struct prm_cmd_release_rsc {
+ struct apm_module_param_data param_data;
+ uint32_t num_clk_id;
+ struct audio_hw_clk_cfg clock_ids[1];
+} __packed;
+
+static int q6prm_send_cmd_sync(struct q6prm *prm, struct gpr_pkt *pkt,
+ uint32_t rsp_opcode)
+{
+ struct gpr_device *gdev = prm->gdev;
+ struct gpr_hdr *hdr = &pkt->hdr;
+ int rc;
+
+ mutex_lock(&prm->lock);
+ prm->result.opcode = 0;
+ prm->result.status = 0;
+
+ rc = gpr_send_pkt(prm->gdev, pkt);
+ if (rc < 0)
+ goto err;
+
+ if (rsp_opcode)
+ rc = wait_event_timeout(prm->wait,
+ (prm->result.opcode == hdr->opcode) ||
+ (prm->result.opcode == rsp_opcode),
+ 5 * HZ);
+ else
+ rc = wait_event_timeout(prm->wait,
+ (prm->result.opcode == hdr->opcode),
+ 5 * HZ);
+
+ if (!rc) {
+ dev_err(&gdev->dev, "CMD timeout for [%x] opcode\n",
+ hdr->opcode);
+ rc = -ETIMEDOUT;
+ } else if (prm->result.status > 0) {
+ dev_err(&gdev->dev, "DSP returned error[%x] %x\n", hdr->opcode,
+ prm->result.status);
+ rc = -EINVAL;
+ } else {
+ dev_err(&gdev->dev, "DSP returned [%x]\n",
+ prm->result.status);
+ rc = 0;
+ }
+
+err:
+ mutex_unlock(&prm->lock);
+ return rc;
+}
+
+static int q6prm_set_hw_core_req(struct device *dev, uint32_t hw_block_id, bool enable)
+{
+ struct prm_cmd_request_hw_core *req;
+ struct apm_module_param_data *param_data;
+ struct gpr_pkt *pkt;
+ struct q6prm *prm = dev_get_drvdata(dev);
+ struct gpr_device *gdev = prm->gdev;
+ void *p;
+ int rc = 0;
+ uint32_t opcode, rsp_opcode;
+
+ if (enable) {
+ opcode = PRM_CMD_REQUEST_HW_RSC;
+ rsp_opcode = PRM_CMD_RSP_REQUEST_HW_RSC;
+ } else {
+ opcode = PRM_CMD_RELEASE_HW_RSC;
+ rsp_opcode = PRM_CMD_RSP_RELEASE_HW_RSC;
+ }
+
+ p = audioreach_alloc_cmd_pkt(sizeof(*req), opcode, 0, gdev->port.id,
+ GPR_PRM_MODULE_IID);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ req = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ param_data = &req->param_data;
+
+ param_data->module_instance_id = GPR_PRM_MODULE_IID;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_RSC_HW_CORE;
+ param_data->param_size = sizeof(*req) - APM_MODULE_PARAM_DATA_SIZE;
+
+ req->hw_clk_id = hw_block_id;
+
+ q6prm_send_cmd_sync(prm, pkt, rsp_opcode);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int q6prm_set_lpass_clock(struct device *dev, int clk_id, int clk_attr,
+ int clk_root, unsigned int freq)
+{
+ struct prm_cmd_request_rsc *req;
+ struct apm_module_param_data *param_data;
+ struct gpr_pkt *pkt;
+ struct q6prm *prm = dev_get_drvdata(dev);
+ struct gpr_device *gdev = prm->gdev;
+ void *p;
+ int rc = 0;
+
+ p = audioreach_alloc_cmd_pkt(sizeof(*req), PRM_CMD_REQUEST_HW_RSC,
+ 0, gdev->port.id, GPR_PRM_MODULE_IID);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ req = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ param_data = &req->param_data;
+
+ param_data->module_instance_id = GPR_PRM_MODULE_IID;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_RSC_AUDIO_HW_CLK;
+ param_data->param_size = sizeof(*req) - APM_MODULE_PARAM_DATA_SIZE;
+
+ req->num_clk_id = 1;
+ req->clock_ids[0].clock_id = clk_id;
+ req->clock_ids[0].clock_freq = freq;
+ req->clock_ids[0].clock_attri = clk_attr;
+ req->clock_ids[0].clock_root = clk_root;
+
+ q6prm_send_cmd_sync(prm, pkt, PRM_CMD_RSP_REQUEST_HW_RSC);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int prm_callback(struct gpr_resp_pkt *data, void *priv, int op)
+{
+ struct gpr_device *gdev = priv;
+ struct q6prm *prm = dev_get_drvdata(&gdev->dev);
+ struct gpr_ibasic_rsp_result_t *result;
+ struct gpr_hdr *hdr = &data->hdr;
+
+ result = data->payload;
+
+ switch (hdr->opcode) {
+ case PRM_CMD_RSP_REQUEST_HW_RSC:
+ case PRM_CMD_RSP_RELEASE_HW_RSC:
+ prm->result.opcode = hdr->opcode;
+ prm->result.status = result->status;
+ wake_up(&prm->wait);
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static int clk_q6prm_prepare(struct clk_hw *hw)
+{
+ struct q6prm_clk *clk = to_q6prm_clk(hw);
+
+ return q6prm_set_lpass_clock(clk->dev, clk->afe_clk_id, clk->attributes,
+ Q6PRM_LPASS_CLK_ROOT_DEFAULT, clk->rate);
+}
+
+static void clk_q6prm_unprepare(struct clk_hw *hw)
+{
+ struct q6prm_clk *clk = to_q6prm_clk(hw);
+
+ q6prm_set_lpass_clock(clk->dev, clk->afe_clk_id, clk->attributes,
+ Q6PRM_LPASS_CLK_ROOT_DEFAULT, 0);
+}
+
+static int clk_q6prm_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct q6prm_clk *clk = to_q6prm_clk(hw);
+
+ clk->rate = rate;
+
+ return 0;
+}
+
+static unsigned long clk_q6prm_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct q6prm_clk *clk = to_q6prm_clk(hw);
+
+ return clk->rate;
+}
+
+static long clk_q6prm_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ return rate;
+}
+
+static const struct clk_ops clk_q6prm_ops = {
+ .prepare = clk_q6prm_prepare,
+ .unprepare = clk_q6prm_unprepare,
+ .set_rate = clk_q6prm_set_rate,
+ .round_rate = clk_q6prm_round_rate,
+ .recalc_rate = clk_q6prm_recalc_rate,
+};
+
+static int clk_vote_q6prm_block(struct clk_hw *hw)
+{
+ struct q6prm_clk *clk = to_q6prm_clk(hw);
+
+ return q6prm_set_hw_core_req(clk->dev, clk->afe_clk_id, true);
+}
+
+static void clk_unvote_q6prm_block(struct clk_hw *hw)
+{
+ struct q6prm_clk *clk = to_q6prm_clk(hw);
+
+ q6prm_set_hw_core_req(clk->dev, clk->afe_clk_id, false);
+}
+
+static const struct clk_ops clk_vote_q6prm_ops = {
+ .prepare = clk_vote_q6prm_block,
+ .unprepare = clk_unvote_q6prm_block,
+};
+
+static struct q6prm_clk *q6prm_clks[Q6PRM_MAX_CLK_ID] = {
+ [LPASS_CLK_ID_WSA_CORE_MCLK] = Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_MCLK),
+ [LPASS_CLK_ID_WSA_CORE_NPL_MCLK] =
+ Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_NPL_MCLK),
+ [LPASS_CLK_ID_VA_CORE_MCLK] = Q6PRM_CLK(LPASS_CLK_ID_VA_CORE_MCLK),
+ [LPASS_CLK_ID_TX_CORE_MCLK] = Q6PRM_CLK(LPASS_CLK_ID_TX_CORE_MCLK),
+ [LPASS_CLK_ID_TX_CORE_NPL_MCLK] =
+ Q6PRM_CLK(LPASS_CLK_ID_TX_CORE_NPL_MCLK),
+ [LPASS_CLK_ID_RX_CORE_MCLK] = Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_MCLK),
+ [LPASS_CLK_ID_RX_CORE_NPL_MCLK] =
+ Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_NPL_MCLK),
+ [LPASS_CLK_ID_VA_CORE_2X_MCLK] =
+ Q6PRM_CLK(LPASS_CLK_ID_VA_CORE_2X_MCLK),
+ [LPASS_HW_MACRO_VOTE] = Q6PRM_VOTE_CLK(LPASS_HW_MACRO_VOTE,
+ Q6PRM_HW_CORE_ID_LPASS),
+ [LPASS_HW_DCODEC_VOTE] = Q6PRM_VOTE_CLK(LPASS_HW_DCODEC_VOTE,
+ Q6PRM_HW_CORE_ID_DCODEC),
+};
+
+static struct clk_hw *q6prm_of_clk_hw_get(struct of_phandle_args *clkspec,
+ void *data)
+{
+ struct q6prm *cc = data;
+ unsigned int idx = clkspec->args[0];
+ unsigned int attr = clkspec->args[1];
+
+ if (idx >= cc->num_clks || attr > LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR) {
+ dev_err(cc->dev, "Invalid clk specifier (%d, %d)\n", idx, attr);
+ return ERR_PTR(-EINVAL);
+ }
+
+ if (cc->clks[idx]) {
+ cc->clks[idx]->attributes = attr;
+ return &cc->clks[idx]->hw;
+ }
+
+ return ERR_PTR(-ENOENT);
+}
+
+static int prm_probe(struct gpr_device *gdev)
+{
+ struct device *dev = &gdev->dev;
+ struct q6prm *cc;
+ int i, ret;
+
+ cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
+ if (!cc)
+ return -ENOMEM;
+
+ cc->dev = dev;
+ cc->gdev = gdev;
+ mutex_init(&cc->lock);
+ init_waitqueue_head(&cc->wait);
+ cc->clks = &q6prm_clks[0];
+ cc->num_clks = ARRAY_SIZE(q6prm_clks);
+ for (i = 0; i < ARRAY_SIZE(q6prm_clks); i++) {
+ if (!q6prm_clks[i])
+ continue;
+
+ q6prm_clks[i]->dev = dev;
+
+ ret = devm_clk_hw_register(dev, &q6prm_clks[i]->hw);
+ if (ret)
+ return ret;
+ }
+
+ ret = of_clk_add_hw_provider(dev->of_node, q6prm_of_clk_hw_get, cc);
+ if (ret)
+ return ret;
+
+ dev_set_drvdata(dev, cc);
+
+ return 0;
+}
+
+static const struct of_device_id prm_device_id[] = {
+ { .compatible = "qcom,q6prm" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, prm_device_id);
+
+static struct gpr_driver prm_driver = {
+ .probe = prm_probe,
+ .callback = prm_callback,
+ .driver = {
+ .name = "qcom-prm",
+ .of_match_table = of_match_ptr(prm_device_id),
+ },
+};
+
+module_gpr_driver(prm_driver);
+MODULE_DESCRIPTION("Audio Process Manager");
+MODULE_LICENSE("GPL v2");
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* [RFC PATCH 11/13] ASoC: qcom: audioreach: add q6prm support
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
Add support to q6prm (Proxy Resource Manager) module used for clock resources
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
include/dt-bindings/sound/qcom,q6prm.h | 205 ++++++++++++
sound/soc/qcom/Kconfig | 4 +
sound/soc/qcom/audioreach/Makefile | 2 +
sound/soc/qcom/audioreach/q6prm.c | 412 +++++++++++++++++++++++++
4 files changed, 623 insertions(+)
create mode 100644 include/dt-bindings/sound/qcom,q6prm.h
create mode 100644 sound/soc/qcom/audioreach/q6prm.c
diff --git a/include/dt-bindings/sound/qcom,q6prm.h b/include/dt-bindings/sound/qcom,q6prm.h
new file mode 100644
index 000000000000..1c5f84fa573a
--- /dev/null
+++ b/include/dt-bindings/sound/qcom,q6prm.h
@@ -0,0 +1,205 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_Q6_PRM_H__
+#define __DT_BINDINGS_Q6_PRM_H__
+
+/* Audio Front End (PRM) virtual ports IDs */
+#define HDMI_RX 1
+#define SLIMBUS_0_RX 2
+#define SLIMBUS_0_TX 3
+#define SLIMBUS_1_RX 4
+#define SLIMBUS_1_TX 5
+#define SLIMBUS_2_RX 6
+#define SLIMBUS_2_TX 7
+#define SLIMBUS_3_RX 8
+#define SLIMBUS_3_TX 9
+#define SLIMBUS_4_RX 10
+#define SLIMBUS_4_TX 11
+#define SLIMBUS_5_RX 12
+#define SLIMBUS_5_TX 13
+#define SLIMBUS_6_RX 14
+#define SLIMBUS_6_TX 15
+#define PRIMARY_MI2S_RX 16
+#define PRIMARY_MI2S_TX 17
+#define SECONDARY_MI2S_RX 18
+#define SECONDARY_MI2S_TX 19
+#define TERTIARY_MI2S_RX 20
+#define TERTIARY_MI2S_TX 21
+#define QUATERNARY_MI2S_RX 22
+#define QUATERNARY_MI2S_TX 23
+#define PRIMARY_TDM_RX_0 24
+#define PRIMARY_TDM_TX_0 25
+#define PRIMARY_TDM_RX_1 26
+#define PRIMARY_TDM_TX_1 27
+#define PRIMARY_TDM_RX_2 28
+#define PRIMARY_TDM_TX_2 29
+#define PRIMARY_TDM_RX_3 30
+#define PRIMARY_TDM_TX_3 31
+#define PRIMARY_TDM_RX_4 32
+#define PRIMARY_TDM_TX_4 33
+#define PRIMARY_TDM_RX_5 34
+#define PRIMARY_TDM_TX_5 35
+#define PRIMARY_TDM_RX_6 36
+#define PRIMARY_TDM_TX_6 37
+#define PRIMARY_TDM_RX_7 38
+#define PRIMARY_TDM_TX_7 39
+#define SECONDARY_TDM_RX_0 40
+#define SECONDARY_TDM_TX_0 41
+#define SECONDARY_TDM_RX_1 42
+#define SECONDARY_TDM_TX_1 43
+#define SECONDARY_TDM_RX_2 44
+#define SECONDARY_TDM_TX_2 45
+#define SECONDARY_TDM_RX_3 46
+#define SECONDARY_TDM_TX_3 47
+#define SECONDARY_TDM_RX_4 48
+#define SECONDARY_TDM_TX_4 49
+#define SECONDARY_TDM_RX_5 50
+#define SECONDARY_TDM_TX_5 51
+#define SECONDARY_TDM_RX_6 52
+#define SECONDARY_TDM_TX_6 53
+#define SECONDARY_TDM_RX_7 54
+#define SECONDARY_TDM_TX_7 55
+#define TERTIARY_TDM_RX_0 56
+#define TERTIARY_TDM_TX_0 57
+#define TERTIARY_TDM_RX_1 58
+#define TERTIARY_TDM_TX_1 59
+#define TERTIARY_TDM_RX_2 60
+#define TERTIARY_TDM_TX_2 61
+#define TERTIARY_TDM_RX_3 62
+#define TERTIARY_TDM_TX_3 63
+#define TERTIARY_TDM_RX_4 64
+#define TERTIARY_TDM_TX_4 65
+#define TERTIARY_TDM_RX_5 66
+#define TERTIARY_TDM_TX_5 67
+#define TERTIARY_TDM_RX_6 68
+#define TERTIARY_TDM_TX_6 69
+#define TERTIARY_TDM_RX_7 70
+#define TERTIARY_TDM_TX_7 71
+#define QUATERNARY_TDM_RX_0 72
+#define QUATERNARY_TDM_TX_0 73
+#define QUATERNARY_TDM_RX_1 74
+#define QUATERNARY_TDM_TX_1 75
+#define QUATERNARY_TDM_RX_2 76
+#define QUATERNARY_TDM_TX_2 77
+#define QUATERNARY_TDM_RX_3 78
+#define QUATERNARY_TDM_TX_3 79
+#define QUATERNARY_TDM_RX_4 80
+#define QUATERNARY_TDM_TX_4 81
+#define QUATERNARY_TDM_RX_5 82
+#define QUATERNARY_TDM_TX_5 83
+#define QUATERNARY_TDM_RX_6 84
+#define QUATERNARY_TDM_TX_6 85
+#define QUATERNARY_TDM_RX_7 86
+#define QUATERNARY_TDM_TX_7 87
+#define QUINARY_TDM_RX_0 88
+#define QUINARY_TDM_TX_0 89
+#define QUINARY_TDM_RX_1 90
+#define QUINARY_TDM_TX_1 91
+#define QUINARY_TDM_RX_2 92
+#define QUINARY_TDM_TX_2 93
+#define QUINARY_TDM_RX_3 94
+#define QUINARY_TDM_TX_3 95
+#define QUINARY_TDM_RX_4 96
+#define QUINARY_TDM_TX_4 97
+#define QUINARY_TDM_RX_5 98
+#define QUINARY_TDM_TX_5 99
+#define QUINARY_TDM_RX_6 100
+#define QUINARY_TDM_TX_6 101
+#define QUINARY_TDM_RX_7 102
+#define QUINARY_TDM_TX_7 103
+#define DISPLAY_PORT_RX 104
+#define WSA_CODEC_DMA_RX_0 105
+#define WSA_CODEC_DMA_TX_0 106
+#define WSA_CODEC_DMA_RX_1 107
+#define WSA_CODEC_DMA_TX_1 108
+#define WSA_CODEC_DMA_TX_2 109
+#define VA_CODEC_DMA_TX_0 110
+#define VA_CODEC_DMA_TX_1 111
+#define VA_CODEC_DMA_TX_2 112
+#define RX_CODEC_DMA_RX_0 113
+#define TX_CODEC_DMA_TX_0 114
+#define RX_CODEC_DMA_RX_1 115
+#define TX_CODEC_DMA_TX_1 116
+#define RX_CODEC_DMA_RX_2 117
+#define TX_CODEC_DMA_TX_2 118
+#define RX_CODEC_DMA_RX_3 119
+#define TX_CODEC_DMA_TX_3 120
+#define RX_CODEC_DMA_RX_4 121
+#define TX_CODEC_DMA_TX_4 122
+#define RX_CODEC_DMA_RX_5 123
+#define TX_CODEC_DMA_TX_5 124
+#define RX_CODEC_DMA_RX_6 125
+#define RX_CODEC_DMA_RX_7 126
+
+#define LPASS_CLK_ID_PRI_MI2S_IBIT 1
+#define LPASS_CLK_ID_PRI_MI2S_EBIT 2
+#define LPASS_CLK_ID_SEC_MI2S_IBIT 3
+#define LPASS_CLK_ID_SEC_MI2S_EBIT 4
+#define LPASS_CLK_ID_TER_MI2S_IBIT 5
+#define LPASS_CLK_ID_TER_MI2S_EBIT 6
+#define LPASS_CLK_ID_QUAD_MI2S_IBIT 7
+#define LPASS_CLK_ID_QUAD_MI2S_EBIT 8
+#define LPASS_CLK_ID_SPEAKER_I2S_IBIT 9
+#define LPASS_CLK_ID_SPEAKER_I2S_EBIT 10
+#define LPASS_CLK_ID_SPEAKER_I2S_OSR 11
+#define LPASS_CLK_ID_QUI_MI2S_IBIT 12
+#define LPASS_CLK_ID_QUI_MI2S_EBIT 13
+#define LPASS_CLK_ID_SEN_MI2S_IBIT 14
+#define LPASS_CLK_ID_SEN_MI2S_EBIT 15
+#define LPASS_CLK_ID_INT0_MI2S_IBIT 16
+#define LPASS_CLK_ID_INT1_MI2S_IBIT 17
+#define LPASS_CLK_ID_INT2_MI2S_IBIT 18
+#define LPASS_CLK_ID_INT3_MI2S_IBIT 19
+#define LPASS_CLK_ID_INT4_MI2S_IBIT 20
+#define LPASS_CLK_ID_INT5_MI2S_IBIT 21
+#define LPASS_CLK_ID_INT6_MI2S_IBIT 22
+#define LPASS_CLK_ID_QUI_MI2S_OSR 23
+#define LPASS_CLK_ID_PRI_PCM_IBIT 24
+#define LPASS_CLK_ID_PRI_PCM_EBIT 25
+#define LPASS_CLK_ID_SEC_PCM_IBIT 26
+#define LPASS_CLK_ID_SEC_PCM_EBIT 27
+#define LPASS_CLK_ID_TER_PCM_IBIT 28
+#define LPASS_CLK_ID_TER_PCM_EBIT 29
+#define LPASS_CLK_ID_QUAD_PCM_IBIT 30
+#define LPASS_CLK_ID_QUAD_PCM_EBIT 31
+#define LPASS_CLK_ID_QUIN_PCM_IBIT 32
+#define LPASS_CLK_ID_QUIN_PCM_EBIT 33
+#define LPASS_CLK_ID_QUI_PCM_OSR 34
+#define LPASS_CLK_ID_PRI_TDM_IBIT 35
+#define LPASS_CLK_ID_PRI_TDM_EBIT 36
+#define LPASS_CLK_ID_SEC_TDM_IBIT 37
+#define LPASS_CLK_ID_SEC_TDM_EBIT 38
+#define LPASS_CLK_ID_TER_TDM_IBIT 39
+#define LPASS_CLK_ID_TER_TDM_EBIT 40
+#define LPASS_CLK_ID_QUAD_TDM_IBIT 41
+#define LPASS_CLK_ID_QUAD_TDM_EBIT 42
+#define LPASS_CLK_ID_QUIN_TDM_IBIT 43
+#define LPASS_CLK_ID_QUIN_TDM_EBIT 44
+#define LPASS_CLK_ID_QUIN_TDM_OSR 45
+#define LPASS_CLK_ID_MCLK_1 46
+#define LPASS_CLK_ID_MCLK_2 47
+#define LPASS_CLK_ID_MCLK_3 48
+#define LPASS_CLK_ID_MCLK_4 49
+#define LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE 50
+#define LPASS_CLK_ID_INT_MCLK_0 51
+#define LPASS_CLK_ID_INT_MCLK_1 52
+#define LPASS_CLK_ID_MCLK_5 53
+#define LPASS_CLK_ID_WSA_CORE_MCLK 54
+#define LPASS_CLK_ID_WSA_CORE_NPL_MCLK 55
+#define LPASS_CLK_ID_VA_CORE_MCLK 56
+#define LPASS_CLK_ID_TX_CORE_MCLK 57
+#define LPASS_CLK_ID_TX_CORE_NPL_MCLK 58
+#define LPASS_CLK_ID_RX_CORE_MCLK 59
+#define LPASS_CLK_ID_RX_CORE_NPL_MCLK 60
+#define LPASS_CLK_ID_VA_CORE_2X_MCLK 61
+
+#define LPASS_HW_MACRO_VOTE 102
+#define LPASS_HW_DCODEC_VOTE 103
+
+#define Q6PRM_MAX_CLK_ID 104
+
+#define LPASS_CLK_ATTRIBUTE_INVALID 0x0
+#define LPASS_CLK_ATTRIBUTE_COUPLE_NO 0x1
+#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND 0x2
+#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR 0x3
+
+#endif /* __DT_BINDINGS_Q6_PRM_H__ */
diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
index 4eb1b1a7c1f7..fa3ab78b125e 100644
--- a/sound/soc/qcom/Kconfig
+++ b/sound/soc/qcom/Kconfig
@@ -109,12 +109,16 @@ config SND_SOC_QCOM_APM_DAI
config SND_SOC_QCOM_APM_BEDAI
tristate
+config SND_SOC_QCOM_PRM
+ tristate
+
config SND_SOC_QCOM_AUDIOREACH
tristate "SoC ALSA audio drives for Qualcomm AUDIOREACH"
depends on QCOM_GPR
select SND_SOC_TOPOLOGY
select SND_SOC_QCOM_APM_DAI
select SND_SOC_QCOM_APM_BEDAI
+ select SND_SOC_QCOM_PRM
help
Support for AudioReach in QDSP
diff --git a/sound/soc/qcom/audioreach/Makefile b/sound/soc/qcom/audioreach/Makefile
index e8651455b206..d9904201ccf0 100644
--- a/sound/soc/qcom/audioreach/Makefile
+++ b/sound/soc/qcom/audioreach/Makefile
@@ -2,9 +2,11 @@
snd-ar-objs := audioreach.o q6apm.o topology.o
snd-apm-dai-objs := q6apm-dai.o
snd-apm-bedai-objs := q6apm-bedai.o
+snd-prm-objs := q6prm.o
obj-$(CONFIG_SND_SOC_QCOM_AUDIOREACH) += snd-ar.o
obj-$(CONFIG_SND_SOC_QCOM_APM_DAI) += snd-apm-dai.o
obj-$(CONFIG_SND_SOC_QCOM_APM_BEDAI) += snd-apm-bedai.o
+obj-$(CONFIG_SND_SOC_QCOM_PRM) += snd-prm.o
diff --git a/sound/soc/qcom/audioreach/q6prm.c b/sound/soc/qcom/audioreach/q6prm.c
new file mode 100644
index 000000000000..84a9ca3aa7fd
--- /dev/null
+++ b/sound/soc/qcom/audioreach/q6prm.c
@@ -0,0 +1,412 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2021, Linaro Limited
+
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/delay.h>
+#include <linux/of_platform.h>
+#include <linux/clk-provider.h>
+#include <linux/jiffies.h>
+#include <linux/soc/qcom/gpr.h>
+#include <dt-bindings/soc/qcom,gpr.h>
+#include <dt-bindings/sound/qcom,q6prm.h>
+#include "audioreach.h"
+
+#define Q6PRM_CLK(id) &(struct q6prm_clk) { \
+ .clk_id = id, \
+ .afe_clk_id = Q6PRM_##id, \
+ .name = #id, \
+ .attributes = LPASS_CLK_ATTRIBUTE_COUPLE_NO, \
+ .rate = 19200000, \
+ .hw.init = &(struct clk_init_data) { \
+ .ops = &clk_q6prm_ops, \
+ .name = #id, \
+ }, \
+ }
+
+#define Q6PRM_VOTE_CLK(id, blkid) &(struct q6prm_clk) { \
+ .clk_id = id, \
+ .afe_clk_id = blkid, \
+ .hw.init = &(struct clk_init_data) { \
+ .ops = &clk_vote_q6prm_ops, \
+ .name = #id, \
+ }, \
+ }
+
+struct q6prm_clk {
+ struct device *dev;
+ int clk_id;
+ int afe_clk_id;
+ char *name;
+ int attributes;
+ int rate;
+ uint32_t handle;
+ struct clk_hw hw;
+};
+#define to_q6prm_clk(_hw) container_of(_hw, struct q6prm_clk, hw)
+
+struct q6prm {
+ struct device *dev;
+ struct gpr_device *gdev;
+ wait_queue_head_t wait;
+ struct gpr_ibasic_rsp_result_t result;
+ struct mutex lock;
+ struct q6prm_clk **clks;
+ int num_clks;
+};
+
+#define PRM_CMD_REQUEST_HW_RSC 0x0100100F
+#define PRM_CMD_RSP_REQUEST_HW_RSC 0x02001002
+#define PRM_CMD_RELEASE_HW_RSC 0x01001010
+#define PRM_CMD_RSP_RELEASE_HW_RSC 0x02001003
+
+#define PARAM_ID_RSC_HW_CORE 0x08001032
+#define PARAM_ID_RSC_LPASS_CORE 0x0800102B
+#define PARAM_ID_RSC_AUDIO_HW_CLK 0x0800102C
+
+#define Q6PRM_LPASS_CLK_ID_WSA_CORE_MCLK 0x305
+#define Q6PRM_LPASS_CLK_ID_WSA_CORE_NPL_MCLK 0x306
+
+#define Q6PRM_LPASS_CLK_ID_VA_CORE_MCLK 0x307
+#define Q6PRM_LPASS_CLK_ID_VA_CORE_2X_MCLK 0x308
+
+#define Q6PRM_LPASS_CLK_ID_TX_CORE_MCLK 0x30c
+#define Q6PRM_LPASS_CLK_ID_TX_CORE_NPL_MCLK 0x30d
+
+#define Q6PRM_LPASS_CLK_ID_RX_CORE_MCLK 0x30e
+#define Q6PRM_LPASS_CLK_ID_RX_CORE_NPL_MCLK 0x30f
+
+#define Q6PRM_LPASS_CLK_SRC_INTERNAL 1
+#define Q6PRM_LPASS_CLK_ROOT_DEFAULT 0
+#define Q6PRM_HW_CORE_ID_LPASS 1
+#define Q6PRM_HW_CORE_ID_DCODEC 2
+
+struct prm_cmd_request_hw_core {
+ struct apm_module_param_data param_data;
+ uint32_t hw_clk_id;
+} __packed;
+
+struct prm_cmd_request_rsc {
+ struct apm_module_param_data param_data;
+ uint32_t num_clk_id;
+ struct audio_hw_clk_cfg clock_ids[1];
+} __packed;
+
+struct prm_cmd_release_rsc {
+ struct apm_module_param_data param_data;
+ uint32_t num_clk_id;
+ struct audio_hw_clk_cfg clock_ids[1];
+} __packed;
+
+static int q6prm_send_cmd_sync(struct q6prm *prm, struct gpr_pkt *pkt,
+ uint32_t rsp_opcode)
+{
+ struct gpr_device *gdev = prm->gdev;
+ struct gpr_hdr *hdr = &pkt->hdr;
+ int rc;
+
+ mutex_lock(&prm->lock);
+ prm->result.opcode = 0;
+ prm->result.status = 0;
+
+ rc = gpr_send_pkt(prm->gdev, pkt);
+ if (rc < 0)
+ goto err;
+
+ if (rsp_opcode)
+ rc = wait_event_timeout(prm->wait,
+ (prm->result.opcode == hdr->opcode) ||
+ (prm->result.opcode == rsp_opcode),
+ 5 * HZ);
+ else
+ rc = wait_event_timeout(prm->wait,
+ (prm->result.opcode == hdr->opcode),
+ 5 * HZ);
+
+ if (!rc) {
+ dev_err(&gdev->dev, "CMD timeout for [%x] opcode\n",
+ hdr->opcode);
+ rc = -ETIMEDOUT;
+ } else if (prm->result.status > 0) {
+ dev_err(&gdev->dev, "DSP returned error[%x] %x\n", hdr->opcode,
+ prm->result.status);
+ rc = -EINVAL;
+ } else {
+ dev_err(&gdev->dev, "DSP returned [%x]\n",
+ prm->result.status);
+ rc = 0;
+ }
+
+err:
+ mutex_unlock(&prm->lock);
+ return rc;
+}
+
+static int q6prm_set_hw_core_req(struct device *dev, uint32_t hw_block_id, bool enable)
+{
+ struct prm_cmd_request_hw_core *req;
+ struct apm_module_param_data *param_data;
+ struct gpr_pkt *pkt;
+ struct q6prm *prm = dev_get_drvdata(dev);
+ struct gpr_device *gdev = prm->gdev;
+ void *p;
+ int rc = 0;
+ uint32_t opcode, rsp_opcode;
+
+ if (enable) {
+ opcode = PRM_CMD_REQUEST_HW_RSC;
+ rsp_opcode = PRM_CMD_RSP_REQUEST_HW_RSC;
+ } else {
+ opcode = PRM_CMD_RELEASE_HW_RSC;
+ rsp_opcode = PRM_CMD_RSP_RELEASE_HW_RSC;
+ }
+
+ p = audioreach_alloc_cmd_pkt(sizeof(*req), opcode, 0, gdev->port.id,
+ GPR_PRM_MODULE_IID);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ req = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ param_data = &req->param_data;
+
+ param_data->module_instance_id = GPR_PRM_MODULE_IID;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_RSC_HW_CORE;
+ param_data->param_size = sizeof(*req) - APM_MODULE_PARAM_DATA_SIZE;
+
+ req->hw_clk_id = hw_block_id;
+
+ q6prm_send_cmd_sync(prm, pkt, rsp_opcode);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int q6prm_set_lpass_clock(struct device *dev, int clk_id, int clk_attr,
+ int clk_root, unsigned int freq)
+{
+ struct prm_cmd_request_rsc *req;
+ struct apm_module_param_data *param_data;
+ struct gpr_pkt *pkt;
+ struct q6prm *prm = dev_get_drvdata(dev);
+ struct gpr_device *gdev = prm->gdev;
+ void *p;
+ int rc = 0;
+
+ p = audioreach_alloc_cmd_pkt(sizeof(*req), PRM_CMD_REQUEST_HW_RSC,
+ 0, gdev->port.id, GPR_PRM_MODULE_IID);
+ if (IS_ERR(p))
+ return -ENOMEM;
+
+ pkt = p;
+ req = p + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+
+ param_data = &req->param_data;
+
+ param_data->module_instance_id = GPR_PRM_MODULE_IID;
+ param_data->error_code = 0;
+ param_data->param_id = PARAM_ID_RSC_AUDIO_HW_CLK;
+ param_data->param_size = sizeof(*req) - APM_MODULE_PARAM_DATA_SIZE;
+
+ req->num_clk_id = 1;
+ req->clock_ids[0].clock_id = clk_id;
+ req->clock_ids[0].clock_freq = freq;
+ req->clock_ids[0].clock_attri = clk_attr;
+ req->clock_ids[0].clock_root = clk_root;
+
+ q6prm_send_cmd_sync(prm, pkt, PRM_CMD_RSP_REQUEST_HW_RSC);
+
+ kfree(pkt);
+
+ return rc;
+}
+
+static int prm_callback(struct gpr_resp_pkt *data, void *priv, int op)
+{
+ struct gpr_device *gdev = priv;
+ struct q6prm *prm = dev_get_drvdata(&gdev->dev);
+ struct gpr_ibasic_rsp_result_t *result;
+ struct gpr_hdr *hdr = &data->hdr;
+
+ result = data->payload;
+
+ switch (hdr->opcode) {
+ case PRM_CMD_RSP_REQUEST_HW_RSC:
+ case PRM_CMD_RSP_RELEASE_HW_RSC:
+ prm->result.opcode = hdr->opcode;
+ prm->result.status = result->status;
+ wake_up(&prm->wait);
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static int clk_q6prm_prepare(struct clk_hw *hw)
+{
+ struct q6prm_clk *clk = to_q6prm_clk(hw);
+
+ return q6prm_set_lpass_clock(clk->dev, clk->afe_clk_id, clk->attributes,
+ Q6PRM_LPASS_CLK_ROOT_DEFAULT, clk->rate);
+}
+
+static void clk_q6prm_unprepare(struct clk_hw *hw)
+{
+ struct q6prm_clk *clk = to_q6prm_clk(hw);
+
+ q6prm_set_lpass_clock(clk->dev, clk->afe_clk_id, clk->attributes,
+ Q6PRM_LPASS_CLK_ROOT_DEFAULT, 0);
+}
+
+static int clk_q6prm_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct q6prm_clk *clk = to_q6prm_clk(hw);
+
+ clk->rate = rate;
+
+ return 0;
+}
+
+static unsigned long clk_q6prm_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct q6prm_clk *clk = to_q6prm_clk(hw);
+
+ return clk->rate;
+}
+
+static long clk_q6prm_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ return rate;
+}
+
+static const struct clk_ops clk_q6prm_ops = {
+ .prepare = clk_q6prm_prepare,
+ .unprepare = clk_q6prm_unprepare,
+ .set_rate = clk_q6prm_set_rate,
+ .round_rate = clk_q6prm_round_rate,
+ .recalc_rate = clk_q6prm_recalc_rate,
+};
+
+static int clk_vote_q6prm_block(struct clk_hw *hw)
+{
+ struct q6prm_clk *clk = to_q6prm_clk(hw);
+
+ return q6prm_set_hw_core_req(clk->dev, clk->afe_clk_id, true);
+}
+
+static void clk_unvote_q6prm_block(struct clk_hw *hw)
+{
+ struct q6prm_clk *clk = to_q6prm_clk(hw);
+
+ q6prm_set_hw_core_req(clk->dev, clk->afe_clk_id, false);
+}
+
+static const struct clk_ops clk_vote_q6prm_ops = {
+ .prepare = clk_vote_q6prm_block,
+ .unprepare = clk_unvote_q6prm_block,
+};
+
+static struct q6prm_clk *q6prm_clks[Q6PRM_MAX_CLK_ID] = {
+ [LPASS_CLK_ID_WSA_CORE_MCLK] = Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_MCLK),
+ [LPASS_CLK_ID_WSA_CORE_NPL_MCLK] =
+ Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_NPL_MCLK),
+ [LPASS_CLK_ID_VA_CORE_MCLK] = Q6PRM_CLK(LPASS_CLK_ID_VA_CORE_MCLK),
+ [LPASS_CLK_ID_TX_CORE_MCLK] = Q6PRM_CLK(LPASS_CLK_ID_TX_CORE_MCLK),
+ [LPASS_CLK_ID_TX_CORE_NPL_MCLK] =
+ Q6PRM_CLK(LPASS_CLK_ID_TX_CORE_NPL_MCLK),
+ [LPASS_CLK_ID_RX_CORE_MCLK] = Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_MCLK),
+ [LPASS_CLK_ID_RX_CORE_NPL_MCLK] =
+ Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_NPL_MCLK),
+ [LPASS_CLK_ID_VA_CORE_2X_MCLK] =
+ Q6PRM_CLK(LPASS_CLK_ID_VA_CORE_2X_MCLK),
+ [LPASS_HW_MACRO_VOTE] = Q6PRM_VOTE_CLK(LPASS_HW_MACRO_VOTE,
+ Q6PRM_HW_CORE_ID_LPASS),
+ [LPASS_HW_DCODEC_VOTE] = Q6PRM_VOTE_CLK(LPASS_HW_DCODEC_VOTE,
+ Q6PRM_HW_CORE_ID_DCODEC),
+};
+
+static struct clk_hw *q6prm_of_clk_hw_get(struct of_phandle_args *clkspec,
+ void *data)
+{
+ struct q6prm *cc = data;
+ unsigned int idx = clkspec->args[0];
+ unsigned int attr = clkspec->args[1];
+
+ if (idx >= cc->num_clks || attr > LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR) {
+ dev_err(cc->dev, "Invalid clk specifier (%d, %d)\n", idx, attr);
+ return ERR_PTR(-EINVAL);
+ }
+
+ if (cc->clks[idx]) {
+ cc->clks[idx]->attributes = attr;
+ return &cc->clks[idx]->hw;
+ }
+
+ return ERR_PTR(-ENOENT);
+}
+
+static int prm_probe(struct gpr_device *gdev)
+{
+ struct device *dev = &gdev->dev;
+ struct q6prm *cc;
+ int i, ret;
+
+ cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
+ if (!cc)
+ return -ENOMEM;
+
+ cc->dev = dev;
+ cc->gdev = gdev;
+ mutex_init(&cc->lock);
+ init_waitqueue_head(&cc->wait);
+ cc->clks = &q6prm_clks[0];
+ cc->num_clks = ARRAY_SIZE(q6prm_clks);
+ for (i = 0; i < ARRAY_SIZE(q6prm_clks); i++) {
+ if (!q6prm_clks[i])
+ continue;
+
+ q6prm_clks[i]->dev = dev;
+
+ ret = devm_clk_hw_register(dev, &q6prm_clks[i]->hw);
+ if (ret)
+ return ret;
+ }
+
+ ret = of_clk_add_hw_provider(dev->of_node, q6prm_of_clk_hw_get, cc);
+ if (ret)
+ return ret;
+
+ dev_set_drvdata(dev, cc);
+
+ return 0;
+}
+
+static const struct of_device_id prm_device_id[] = {
+ { .compatible = "qcom,q6prm" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, prm_device_id);
+
+static struct gpr_driver prm_driver = {
+ .probe = prm_probe,
+ .callback = prm_callback,
+ .driver = {
+ .name = "qcom-prm",
+ .of_match_table = of_match_ptr(prm_device_id),
+ },
+};
+
+module_gpr_driver(prm_driver);
+MODULE_DESCRIPTION("Audio Process Manager");
+MODULE_LICENSE("GPL v2");
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [RFC PATCH 12/13] ASoC: qcom: dt-bindings: add audioreach soundcard compatibles
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-07 15:28 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: plai, tiwai, robh, devicetree, perex, alsa-devel, linux-kernel,
lgirdwood, bgoswami, Srinivas Kandagatla
Add compatible strings for AudioReach DSP firmware based soundcards.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../bindings/sound/qcom,sm8250.yaml | 43 +++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
index 72ad9ab91832..551f4fe04749 100644
--- a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
@@ -18,6 +18,8 @@ properties:
oneOf:
- const: qcom,sm8250-sndcard
- const: qcom,qrb5165-rb5-sndcard
+ - const: qcom,sm8250-audioreach-sndcard
+ - const: qcom,qrb5165-rb5-audioreach-sndcard
audio-routing:
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
@@ -157,3 +159,44 @@ examples:
};
};
};
+#---------------------------
+# AudioReach based dai links
+#---------------------------
+ - |
+ #include <dt-bindings/sound/qcom,q6apm.h>
+ sound {
+ compatible = "qcom,qrb5165-rb5-audioreach-sndcard";
+ model = "Qualcomm-qrb5165-RB5-WSA8815-Speakers-DMIC0";
+ audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
+ "SpkrRight IN", "WSA_SPK2 OUT";
+
+ wsa-dai-link {
+ link-name = "WSA Playback";
+ cpu {
+ sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+
+ codec {
+ sound-dai = <&left_spkr>, <&right_spkr>, <&swr0 0>, <&wsamacro>;
+ };
+ };
+
+ va-dai-link {
+ link-name = "VA Capture";
+ cpu {
+ sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+
+ codec {
+ sound-dai = <&vamacro 0>;
+ };
+ };
+ }
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* [RFC PATCH 12/13] ASoC: qcom: dt-bindings: add audioreach soundcard compatibles
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
Add compatible strings for AudioReach DSP firmware based soundcards.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../bindings/sound/qcom,sm8250.yaml | 43 +++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
index 72ad9ab91832..551f4fe04749 100644
--- a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
@@ -18,6 +18,8 @@ properties:
oneOf:
- const: qcom,sm8250-sndcard
- const: qcom,qrb5165-rb5-sndcard
+ - const: qcom,sm8250-audioreach-sndcard
+ - const: qcom,qrb5165-rb5-audioreach-sndcard
audio-routing:
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
@@ -157,3 +159,44 @@ examples:
};
};
};
+#---------------------------
+# AudioReach based dai links
+#---------------------------
+ - |
+ #include <dt-bindings/sound/qcom,q6apm.h>
+ sound {
+ compatible = "qcom,qrb5165-rb5-audioreach-sndcard";
+ model = "Qualcomm-qrb5165-RB5-WSA8815-Speakers-DMIC0";
+ audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
+ "SpkrRight IN", "WSA_SPK2 OUT";
+
+ wsa-dai-link {
+ link-name = "WSA Playback";
+ cpu {
+ sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+
+ codec {
+ sound-dai = <&left_spkr>, <&right_spkr>, <&swr0 0>, <&wsamacro>;
+ };
+ };
+
+ va-dai-link {
+ link-name = "VA Capture";
+ cpu {
+ sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+
+ codec {
+ sound-dai = <&vamacro 0>;
+ };
+ };
+ }
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: [RFC PATCH 12/13] ASoC: qcom: dt-bindings: add audioreach soundcard compatibles
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-08 20:50 ` Rob Herring
-1 siblings, 0 replies; 42+ messages in thread
From: Rob Herring @ 2021-06-08 20:50 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: broonie, devicetree, bjorn.andersson, tiwai, lgirdwood,
alsa-devel, bgoswami, plai, linux-kernel, perex
On Mon, 07 Jun 2021 16:28:35 +0100, Srinivas Kandagatla wrote:
> Add compatible strings for AudioReach DSP firmware based soundcards.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> .../bindings/sound/qcom,sm8250.yaml | 43 +++++++++++++++++++
> 1 file changed, 43 insertions(+)
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:5: warning: "MSM_FRONTEND_DAI_MULTIMEDIA1" redefined
5 | #define MSM_FRONTEND_DAI_MULTIMEDIA1 1
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:5: note: this is the location of the previous definition
5 | #define MSM_FRONTEND_DAI_MULTIMEDIA1 0
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:6: warning: "MSM_FRONTEND_DAI_MULTIMEDIA2" redefined
6 | #define MSM_FRONTEND_DAI_MULTIMEDIA2 2
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:6: note: this is the location of the previous definition
6 | #define MSM_FRONTEND_DAI_MULTIMEDIA2 1
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:7: warning: "MSM_FRONTEND_DAI_MULTIMEDIA3" redefined
7 | #define MSM_FRONTEND_DAI_MULTIMEDIA3 3
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:7: note: this is the location of the previous definition
7 | #define MSM_FRONTEND_DAI_MULTIMEDIA3 2
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:8: warning: "MSM_FRONTEND_DAI_MULTIMEDIA4" redefined
8 | #define MSM_FRONTEND_DAI_MULTIMEDIA4 4
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:8: note: this is the location of the previous definition
8 | #define MSM_FRONTEND_DAI_MULTIMEDIA4 3
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:9: warning: "MSM_FRONTEND_DAI_MULTIMEDIA5" redefined
9 | #define MSM_FRONTEND_DAI_MULTIMEDIA5 5
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:9: note: this is the location of the previous definition
9 | #define MSM_FRONTEND_DAI_MULTIMEDIA5 4
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:10: warning: "MSM_FRONTEND_DAI_MULTIMEDIA6" redefined
10 | #define MSM_FRONTEND_DAI_MULTIMEDIA6 6
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:10: note: this is the location of the previous definition
10 | #define MSM_FRONTEND_DAI_MULTIMEDIA6 5
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:11: warning: "MSM_FRONTEND_DAI_MULTIMEDIA7" redefined
11 | #define MSM_FRONTEND_DAI_MULTIMEDIA7 7
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:11: note: this is the location of the previous definition
11 | #define MSM_FRONTEND_DAI_MULTIMEDIA7 6
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:12: warning: "MSM_FRONTEND_DAI_MULTIMEDIA8" redefined
12 | #define MSM_FRONTEND_DAI_MULTIMEDIA8 8
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:12: note: this is the location of the previous definition
12 | #define MSM_FRONTEND_DAI_MULTIMEDIA8 7
|
Error: Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:154.5-6 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:380: Documentation/devicetree/bindings/sound/qcom,sm8250.example.dt.yaml] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1416: dt_binding_check] Error 2
\ndoc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/1488759
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [RFC PATCH 12/13] ASoC: qcom: dt-bindings: add audioreach soundcard compatibles
@ 2021-06-08 20:50 ` Rob Herring
0 siblings, 0 replies; 42+ messages in thread
From: Rob Herring @ 2021-06-08 20:50 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: devicetree, alsa-devel, bgoswami, tiwai, linux-kernel, plai,
lgirdwood, bjorn.andersson, broonie
On Mon, 07 Jun 2021 16:28:35 +0100, Srinivas Kandagatla wrote:
> Add compatible strings for AudioReach DSP firmware based soundcards.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> .../bindings/sound/qcom,sm8250.yaml | 43 +++++++++++++++++++
> 1 file changed, 43 insertions(+)
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:5: warning: "MSM_FRONTEND_DAI_MULTIMEDIA1" redefined
5 | #define MSM_FRONTEND_DAI_MULTIMEDIA1 1
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:5: note: this is the location of the previous definition
5 | #define MSM_FRONTEND_DAI_MULTIMEDIA1 0
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:6: warning: "MSM_FRONTEND_DAI_MULTIMEDIA2" redefined
6 | #define MSM_FRONTEND_DAI_MULTIMEDIA2 2
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:6: note: this is the location of the previous definition
6 | #define MSM_FRONTEND_DAI_MULTIMEDIA2 1
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:7: warning: "MSM_FRONTEND_DAI_MULTIMEDIA3" redefined
7 | #define MSM_FRONTEND_DAI_MULTIMEDIA3 3
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:7: note: this is the location of the previous definition
7 | #define MSM_FRONTEND_DAI_MULTIMEDIA3 2
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:8: warning: "MSM_FRONTEND_DAI_MULTIMEDIA4" redefined
8 | #define MSM_FRONTEND_DAI_MULTIMEDIA4 4
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:8: note: this is the location of the previous definition
8 | #define MSM_FRONTEND_DAI_MULTIMEDIA4 3
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:9: warning: "MSM_FRONTEND_DAI_MULTIMEDIA5" redefined
9 | #define MSM_FRONTEND_DAI_MULTIMEDIA5 5
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:9: note: this is the location of the previous definition
9 | #define MSM_FRONTEND_DAI_MULTIMEDIA5 4
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:10: warning: "MSM_FRONTEND_DAI_MULTIMEDIA6" redefined
10 | #define MSM_FRONTEND_DAI_MULTIMEDIA6 6
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:10: note: this is the location of the previous definition
10 | #define MSM_FRONTEND_DAI_MULTIMEDIA6 5
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:11: warning: "MSM_FRONTEND_DAI_MULTIMEDIA7" redefined
11 | #define MSM_FRONTEND_DAI_MULTIMEDIA7 7
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:11: note: this is the location of the previous definition
11 | #define MSM_FRONTEND_DAI_MULTIMEDIA7 6
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:116:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6apm.h:12: warning: "MSM_FRONTEND_DAI_MULTIMEDIA8" redefined
12 | #define MSM_FRONTEND_DAI_MULTIMEDIA8 8
|
In file included from Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:20:
./scripts/dtc/include-prefixes/dt-bindings/sound/qcom,q6asm.h:12: note: this is the location of the previous definition
12 | #define MSM_FRONTEND_DAI_MULTIMEDIA8 7
|
Error: Documentation/devicetree/bindings/sound/qcom,sm8250.example.dts:154.5-6 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:380: Documentation/devicetree/bindings/sound/qcom,sm8250.example.dt.yaml] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1416: dt_binding_check] Error 2
\ndoc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/1488759
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 42+ messages in thread
* [RFC PATCH 13/13] ASoC: qcom: sm8250: Add audioreach support
2021-06-07 15:28 ` Srinivas Kandagatla
@ 2021-06-07 15:28 ` Srinivas Kandagatla
-1 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: plai, tiwai, robh, devicetree, perex, alsa-devel, linux-kernel,
lgirdwood, bgoswami, Srinivas Kandagatla
This patch adds support for parsing dt for AudioReach based soundcards
which only have backend DAI links in DT.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
sound/soc/qcom/sm8250.c | 144 +++++++++++++++++++++++++++++++++++++++-
1 file changed, 143 insertions(+), 1 deletion(-)
diff --git a/sound/soc/qcom/sm8250.c b/sound/soc/qcom/sm8250.c
index fe8fd7367e21..421f9d1d2bed 100644
--- a/sound/soc/qcom/sm8250.c
+++ b/sound/soc/qcom/sm8250.c
@@ -20,6 +20,141 @@ struct sm8250_snd_data {
struct sdw_stream_runtime *sruntime[AFE_PORT_MAX];
};
+static int qcom_audioreach_snd_parse_of(struct snd_soc_card *card)
+{
+ struct device_node *np;
+ struct device_node *codec = NULL;
+ struct device_node *platform = NULL;
+ struct device_node *cpu = NULL;
+ struct device *dev = card->dev;
+ struct snd_soc_dai_link *link;
+ struct of_phandle_args args;
+ struct snd_soc_dai_link_component *dlc;
+ int ret, num_links;
+
+ ret = snd_soc_of_parse_card_name(card, "model");
+ if (ret) {
+ dev_err(dev, "Error parsing card name: %d\n", ret);
+ return ret;
+ }
+
+ /* DAPM routes */
+ if (of_property_read_bool(dev->of_node, "audio-routing")) {
+ ret = snd_soc_of_parse_audio_routing(card, "audio-routing");
+ if (ret)
+ return ret;
+ }
+
+ /* Populate links */
+ num_links = of_get_child_count(dev->of_node);
+
+ /* Allocate the DAI link array */
+ card->dai_link = devm_kcalloc(dev, num_links, sizeof(*link), GFP_KERNEL);
+ if (!card->dai_link)
+ return -ENOMEM;
+
+ card->num_links = num_links;
+ link = card->dai_link;
+
+ for_each_child_of_node(dev->of_node, np) {
+
+ dlc = devm_kzalloc(dev, 2 * sizeof(*dlc), GFP_KERNEL);
+ if (!dlc) {
+ ret = -ENOMEM;
+ goto err_put_np;
+ }
+
+ link->cpus = &dlc[0];
+ link->platforms = &dlc[1];
+
+ link->num_cpus = 1;
+ link->num_platforms = 1;
+
+
+ ret = of_property_read_string(np, "link-name", &link->name);
+ if (ret) {
+ dev_err(card->dev, "error getting codec dai_link name\n");
+ goto err_put_np;
+ }
+
+ cpu = of_get_child_by_name(np, "cpu");
+ platform = of_get_child_by_name(np, "platform");
+ codec = of_get_child_by_name(np, "codec");
+ if (!cpu) {
+ dev_err(dev, "%s: Can't find cpu DT node\n", link->name);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ if (!platform) {
+ dev_err(dev, "%s: Can't find platform DT node\n", link->name);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ if (!codec) {
+ dev_err(dev, "%s: Can't find codec DT node\n", link->name);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ ret = of_parse_phandle_with_args(cpu, "sound-dai", "#sound-dai-cells", 0, &args);
+ if (ret) {
+ dev_err(card->dev, "%s: error getting cpu phandle\n", link->name);
+ goto err;
+ }
+
+ link->cpus->of_node = args.np;
+ link->id = args.args[0];
+
+ ret = snd_soc_of_get_dai_name(cpu, &link->cpus->dai_name);
+ if (ret) {
+ if (ret != -EPROBE_DEFER)
+ dev_err(card->dev, "%s: error getting cpu dai name: %d\n",
+ link->name, ret);
+ goto err;
+ }
+
+ link->platforms->of_node = of_parse_phandle(platform, "sound-dai", 0);
+ if (!link->platforms->of_node) {
+ dev_err(card->dev, "%s: platform dai not found\n", link->name);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ ret = snd_soc_of_get_dai_link_codecs(dev, codec, link);
+ if (ret < 0) {
+ if (ret != -EPROBE_DEFER)
+ dev_err(card->dev, "%s: codec dai not found: %d\n",
+ link->name, ret);
+ goto err;
+ }
+
+ /* DPCM backend */
+ link->no_pcm = 1;
+ link->ignore_pmdown_time = 1;
+ link->ignore_suspend = 1;
+
+ link->stream_name = link->name;
+ snd_soc_dai_link_set_capabilities(link);
+ link++;
+
+ of_node_put(cpu);
+ of_node_put(codec);
+ of_node_put(platform);
+
+ }
+
+ return 0;
+err:
+ of_node_put(cpu);
+ of_node_put(codec);
+ of_node_put(platform);
+err_put_np:
+ of_node_put(np);
+ return ret;
+}
+
static int sm8250_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
@@ -199,7 +334,12 @@ static int sm8250_platform_probe(struct platform_device *pdev)
card->dev = dev;
dev_set_drvdata(dev, card);
snd_soc_card_set_drvdata(card, data);
- ret = qcom_snd_parse_of(card);
+ if (of_device_is_compatible(dev->of_node, "qcom,sm8250-audioreach-sndcard") ||
+ of_device_is_compatible(dev->of_node, "qcom,qrb5165-rb5-audioreach-sndcard"))
+ ret = qcom_audioreach_snd_parse_of(card);
+ else
+ ret = qcom_snd_parse_of(card);
+
if (ret)
return ret;
@@ -211,6 +351,8 @@ static int sm8250_platform_probe(struct platform_device *pdev)
static const struct of_device_id snd_sm8250_dt_match[] = {
{.compatible = "qcom,sm8250-sndcard"},
{.compatible = "qcom,qrb5165-rb5-sndcard"},
+ {.compatible = "qcom,sm8250-audioreach-sndcard" },
+ {.compatible = "qcom,qrb5165-rb5-audioreach-sndcard" },
{}
};
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread* [RFC PATCH 13/13] ASoC: qcom: sm8250: Add audioreach support
@ 2021-06-07 15:28 ` Srinivas Kandagatla
0 siblings, 0 replies; 42+ messages in thread
From: Srinivas Kandagatla @ 2021-06-07 15:28 UTC (permalink / raw)
To: bjorn.andersson, broonie
Cc: robh, alsa-devel, bgoswami, devicetree, tiwai, lgirdwood, plai,
linux-kernel
This patch adds support for parsing dt for AudioReach based soundcards
which only have backend DAI links in DT.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
sound/soc/qcom/sm8250.c | 144 +++++++++++++++++++++++++++++++++++++++-
1 file changed, 143 insertions(+), 1 deletion(-)
diff --git a/sound/soc/qcom/sm8250.c b/sound/soc/qcom/sm8250.c
index fe8fd7367e21..421f9d1d2bed 100644
--- a/sound/soc/qcom/sm8250.c
+++ b/sound/soc/qcom/sm8250.c
@@ -20,6 +20,141 @@ struct sm8250_snd_data {
struct sdw_stream_runtime *sruntime[AFE_PORT_MAX];
};
+static int qcom_audioreach_snd_parse_of(struct snd_soc_card *card)
+{
+ struct device_node *np;
+ struct device_node *codec = NULL;
+ struct device_node *platform = NULL;
+ struct device_node *cpu = NULL;
+ struct device *dev = card->dev;
+ struct snd_soc_dai_link *link;
+ struct of_phandle_args args;
+ struct snd_soc_dai_link_component *dlc;
+ int ret, num_links;
+
+ ret = snd_soc_of_parse_card_name(card, "model");
+ if (ret) {
+ dev_err(dev, "Error parsing card name: %d\n", ret);
+ return ret;
+ }
+
+ /* DAPM routes */
+ if (of_property_read_bool(dev->of_node, "audio-routing")) {
+ ret = snd_soc_of_parse_audio_routing(card, "audio-routing");
+ if (ret)
+ return ret;
+ }
+
+ /* Populate links */
+ num_links = of_get_child_count(dev->of_node);
+
+ /* Allocate the DAI link array */
+ card->dai_link = devm_kcalloc(dev, num_links, sizeof(*link), GFP_KERNEL);
+ if (!card->dai_link)
+ return -ENOMEM;
+
+ card->num_links = num_links;
+ link = card->dai_link;
+
+ for_each_child_of_node(dev->of_node, np) {
+
+ dlc = devm_kzalloc(dev, 2 * sizeof(*dlc), GFP_KERNEL);
+ if (!dlc) {
+ ret = -ENOMEM;
+ goto err_put_np;
+ }
+
+ link->cpus = &dlc[0];
+ link->platforms = &dlc[1];
+
+ link->num_cpus = 1;
+ link->num_platforms = 1;
+
+
+ ret = of_property_read_string(np, "link-name", &link->name);
+ if (ret) {
+ dev_err(card->dev, "error getting codec dai_link name\n");
+ goto err_put_np;
+ }
+
+ cpu = of_get_child_by_name(np, "cpu");
+ platform = of_get_child_by_name(np, "platform");
+ codec = of_get_child_by_name(np, "codec");
+ if (!cpu) {
+ dev_err(dev, "%s: Can't find cpu DT node\n", link->name);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ if (!platform) {
+ dev_err(dev, "%s: Can't find platform DT node\n", link->name);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ if (!codec) {
+ dev_err(dev, "%s: Can't find codec DT node\n", link->name);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ ret = of_parse_phandle_with_args(cpu, "sound-dai", "#sound-dai-cells", 0, &args);
+ if (ret) {
+ dev_err(card->dev, "%s: error getting cpu phandle\n", link->name);
+ goto err;
+ }
+
+ link->cpus->of_node = args.np;
+ link->id = args.args[0];
+
+ ret = snd_soc_of_get_dai_name(cpu, &link->cpus->dai_name);
+ if (ret) {
+ if (ret != -EPROBE_DEFER)
+ dev_err(card->dev, "%s: error getting cpu dai name: %d\n",
+ link->name, ret);
+ goto err;
+ }
+
+ link->platforms->of_node = of_parse_phandle(platform, "sound-dai", 0);
+ if (!link->platforms->of_node) {
+ dev_err(card->dev, "%s: platform dai not found\n", link->name);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ ret = snd_soc_of_get_dai_link_codecs(dev, codec, link);
+ if (ret < 0) {
+ if (ret != -EPROBE_DEFER)
+ dev_err(card->dev, "%s: codec dai not found: %d\n",
+ link->name, ret);
+ goto err;
+ }
+
+ /* DPCM backend */
+ link->no_pcm = 1;
+ link->ignore_pmdown_time = 1;
+ link->ignore_suspend = 1;
+
+ link->stream_name = link->name;
+ snd_soc_dai_link_set_capabilities(link);
+ link++;
+
+ of_node_put(cpu);
+ of_node_put(codec);
+ of_node_put(platform);
+
+ }
+
+ return 0;
+err:
+ of_node_put(cpu);
+ of_node_put(codec);
+ of_node_put(platform);
+err_put_np:
+ of_node_put(np);
+ return ret;
+}
+
static int sm8250_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
@@ -199,7 +334,12 @@ static int sm8250_platform_probe(struct platform_device *pdev)
card->dev = dev;
dev_set_drvdata(dev, card);
snd_soc_card_set_drvdata(card, data);
- ret = qcom_snd_parse_of(card);
+ if (of_device_is_compatible(dev->of_node, "qcom,sm8250-audioreach-sndcard") ||
+ of_device_is_compatible(dev->of_node, "qcom,qrb5165-rb5-audioreach-sndcard"))
+ ret = qcom_audioreach_snd_parse_of(card);
+ else
+ ret = qcom_snd_parse_of(card);
+
if (ret)
return ret;
@@ -211,6 +351,8 @@ static int sm8250_platform_probe(struct platform_device *pdev)
static const struct of_device_id snd_sm8250_dt_match[] = {
{.compatible = "qcom,sm8250-sndcard"},
{.compatible = "qcom,qrb5165-rb5-sndcard"},
+ {.compatible = "qcom,sm8250-audioreach-sndcard" },
+ {.compatible = "qcom,qrb5165-rb5-audioreach-sndcard" },
{}
};
--
2.21.0
^ permalink raw reply related [flat|nested] 42+ messages in thread