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From: Nadav Amit <nadav.amit@gmail.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: Nadav Amit <namit@vmware.com>, Will Deacon <will@kernel.org>,
	Jiajun Cao <caojiajun@vmware.com>,
	Robin Murphy <robin.murphy@arm.com>,
	Lu Baolu <baolu.lu@linux.intel.com>,
	iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 1/6] iommu/amd: Selective flush on unmap
Date: Mon,  7 Jun 2021 11:25:36 -0700	[thread overview]
Message-ID: <20210607182541.119756-2-namit@vmware.com> (raw)
In-Reply-To: <20210607182541.119756-1-namit@vmware.com>

From: Nadav Amit <namit@vmware.com>

Recent patch attempted to enable selective page flushes on AMD IOMMU but
neglected to adapt amd_iommu_iotlb_sync() to use the selective flushes.

Adapt amd_iommu_iotlb_sync() to use selective flushes and change
amd_iommu_unmap() to collect the flushes. As a defensive measure, to
avoid potential issues as those that the Intel IOMMU driver encountered
recently, flush the page-walk caches by always setting the "pde"
parameter. This can be removed later.

Cc: Joerg Roedel <joro@8bytes.org>
Cc: Will Deacon <will@kernel.org>
Cc: Jiajun Cao <caojiajun@vmware.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Lu Baolu <baolu.lu@linux.intel.com>
Cc: iommu@lists.linux-foundation.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Nadav Amit <namit@vmware.com>
---
 drivers/iommu/amd/iommu.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 3ac42bbdefc6..3e40f6610b6a 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -2059,12 +2059,17 @@ static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova,
 {
 	struct protection_domain *domain = to_pdomain(dom);
 	struct io_pgtable_ops *ops = &domain->iop.iop.ops;
+	size_t r;
 
 	if ((amd_iommu_pgtable == AMD_IOMMU_V1) &&
 	    (domain->iop.mode == PAGE_MODE_NONE))
 		return 0;
 
-	return (ops->unmap) ? ops->unmap(ops, iova, page_size, gather) : 0;
+	r = (ops->unmap) ? ops->unmap(ops, iova, page_size, gather) : 0;
+
+	iommu_iotlb_gather_add_page(dom, gather, iova, page_size);
+
+	return r;
 }
 
 static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom,
@@ -2167,7 +2172,13 @@ static void amd_iommu_flush_iotlb_all(struct iommu_domain *domain)
 static void amd_iommu_iotlb_sync(struct iommu_domain *domain,
 				 struct iommu_iotlb_gather *gather)
 {
-	amd_iommu_flush_iotlb_all(domain);
+	struct protection_domain *dom = to_pdomain(domain);
+	unsigned long flags;
+
+	spin_lock_irqsave(&dom->lock, flags);
+	__domain_flush_pages(dom, gather->start, gather->end - gather->start, 1);
+	amd_iommu_domain_flush_complete(dom);
+	spin_unlock_irqrestore(&dom->lock, flags);
 }
 
 static int amd_iommu_def_domain_type(struct device *dev)
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Nadav Amit <nadav.amit@gmail.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: Robin Murphy <robin.murphy@arm.com>,
	linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org,
	Nadav Amit <namit@vmware.com>, Jiajun Cao <caojiajun@vmware.com>,
	Will Deacon <will@kernel.org>
Subject: [PATCH v3 1/6] iommu/amd: Selective flush on unmap
Date: Mon,  7 Jun 2021 11:25:36 -0700	[thread overview]
Message-ID: <20210607182541.119756-2-namit@vmware.com> (raw)
In-Reply-To: <20210607182541.119756-1-namit@vmware.com>

From: Nadav Amit <namit@vmware.com>

Recent patch attempted to enable selective page flushes on AMD IOMMU but
neglected to adapt amd_iommu_iotlb_sync() to use the selective flushes.

Adapt amd_iommu_iotlb_sync() to use selective flushes and change
amd_iommu_unmap() to collect the flushes. As a defensive measure, to
avoid potential issues as those that the Intel IOMMU driver encountered
recently, flush the page-walk caches by always setting the "pde"
parameter. This can be removed later.

Cc: Joerg Roedel <joro@8bytes.org>
Cc: Will Deacon <will@kernel.org>
Cc: Jiajun Cao <caojiajun@vmware.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Lu Baolu <baolu.lu@linux.intel.com>
Cc: iommu@lists.linux-foundation.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Nadav Amit <namit@vmware.com>
---
 drivers/iommu/amd/iommu.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 3ac42bbdefc6..3e40f6610b6a 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -2059,12 +2059,17 @@ static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova,
 {
 	struct protection_domain *domain = to_pdomain(dom);
 	struct io_pgtable_ops *ops = &domain->iop.iop.ops;
+	size_t r;
 
 	if ((amd_iommu_pgtable == AMD_IOMMU_V1) &&
 	    (domain->iop.mode == PAGE_MODE_NONE))
 		return 0;
 
-	return (ops->unmap) ? ops->unmap(ops, iova, page_size, gather) : 0;
+	r = (ops->unmap) ? ops->unmap(ops, iova, page_size, gather) : 0;
+
+	iommu_iotlb_gather_add_page(dom, gather, iova, page_size);
+
+	return r;
 }
 
 static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom,
@@ -2167,7 +2172,13 @@ static void amd_iommu_flush_iotlb_all(struct iommu_domain *domain)
 static void amd_iommu_iotlb_sync(struct iommu_domain *domain,
 				 struct iommu_iotlb_gather *gather)
 {
-	amd_iommu_flush_iotlb_all(domain);
+	struct protection_domain *dom = to_pdomain(domain);
+	unsigned long flags;
+
+	spin_lock_irqsave(&dom->lock, flags);
+	__domain_flush_pages(dom, gather->start, gather->end - gather->start, 1);
+	amd_iommu_domain_flush_complete(dom);
+	spin_unlock_irqrestore(&dom->lock, flags);
 }
 
 static int amd_iommu_def_domain_type(struct device *dev)
-- 
2.25.1

_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

  reply	other threads:[~2021-06-08  1:55 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-07 18:25 [PATCH v3 0/6] iommu/amd: Enable page-selective flushes Nadav Amit
2021-06-07 18:25 ` Nadav Amit
2021-06-07 18:25 ` Nadav Amit [this message]
2021-06-07 18:25   ` [PATCH v3 1/6] iommu/amd: Selective flush on unmap Nadav Amit
2021-06-07 18:25 ` [PATCH v3 2/6] iommu/amd: Do not use flush-queue when NpCache is on Nadav Amit
2021-06-07 18:25   ` Nadav Amit
2021-06-15 13:08   ` Robin Murphy
2021-06-15 13:08     ` Robin Murphy
2021-06-15 18:26     ` Nadav Amit
2021-06-15 18:26       ` Nadav Amit
2021-06-15 19:36       ` Robin Murphy
2021-06-15 19:36         ` Robin Murphy
2021-06-07 18:25 ` [PATCH v3 3/6] iommu: Improve iommu_iotlb_gather helpers Nadav Amit
2021-06-07 18:25   ` Nadav Amit
2021-06-11 13:50   ` Will Deacon
2021-06-11 13:50     ` Will Deacon
2021-06-15 10:42   ` Robin Murphy
2021-06-15 10:42     ` Robin Murphy
2021-06-15 19:05     ` Nadav Amit
2021-06-15 19:05       ` Nadav Amit
2021-06-15 19:07       ` Nadav Amit
2021-06-15 19:07         ` Nadav Amit
2021-06-15 12:29   ` Yong Wu
2021-06-15 12:29     ` Yong Wu
2021-06-15 12:41     ` Robin Murphy
2021-06-15 12:41       ` Robin Murphy
2021-06-07 18:25 ` [PATCH v3 4/6] iommu: Factor iommu_iotlb_gather_is_disjoint() out Nadav Amit
2021-06-07 18:25   ` Nadav Amit
2021-06-11 13:57   ` Will Deacon
2021-06-11 13:57     ` Will Deacon
2021-06-11 16:50     ` Nadav Amit
2021-06-11 16:50       ` Nadav Amit
2021-06-15 10:29       ` Will Deacon
2021-06-15 10:29         ` Will Deacon
2021-06-15 18:54         ` Nadav Amit
2021-06-15 18:54           ` Nadav Amit
2021-06-07 18:25 ` [PATCH v3 5/6] iommu/amd: Tailored gather logic for AMD Nadav Amit
2021-06-07 18:25   ` Nadav Amit
2021-06-15 12:55   ` Robin Murphy
2021-06-15 12:55     ` Robin Murphy
2021-06-15 18:14     ` Nadav Amit
2021-06-15 18:14       ` Nadav Amit
2021-06-15 19:20       ` Robin Murphy
2021-06-15 19:20         ` Robin Murphy
2021-06-15 19:46         ` Nadav Amit
2021-06-15 19:46           ` Nadav Amit
2021-06-07 18:25 ` [PATCH v3 6/6] iommu/amd: Sync once for scatter-gather operations Nadav Amit
2021-06-07 18:25   ` Nadav Amit
2021-06-15 11:25   ` Robin Murphy
2021-06-15 11:25     ` Robin Murphy
2021-06-15 18:51     ` Nadav Amit
2021-06-15 18:51       ` Nadav Amit

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