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From: Graham Sider <Graham.Sider@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Harish.Kasiviswanathan@amd.com,
	Graham Sider <Graham.Sider@amd.com>,
	Elena.Sakhnovitch@amd.com
Subject: [PATCH v6 2/9] drm/amd/pm: Add ASIC independent throttle bits
Date: Tue, 8 Jun 2021 11:08:03 -0400	[thread overview]
Message-ID: <20210608150810.9679-2-Graham.Sider@amd.com> (raw)
In-Reply-To: <20210608150810.9679-1-Graham.Sider@amd.com>

Add new defines for thermal throttle status bits which are ASIC
independent. This bit field will be visible to userspace via
gpu_metrics alongside the previous ASIC dependent bit fields. Seperated
into four types: power throttlers (16 bits), current throttlers (16
bits), temperature (24 bits), other (8 bits).

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
---
 drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 42 +++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
index 71adb9e76a95..4993daa60895 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
@@ -35,6 +35,48 @@
 
 #define SMU_DPM_USER_PROFILE_RESTORE (1 << 0)
 
+// Power Throttlers
+#define SMU_THROTTLER_PPT0_BIT			0
+#define SMU_THROTTLER_PPT1_BIT			1
+#define SMU_THROTTLER_PPT2_BIT			2
+#define SMU_THROTTLER_PPT3_BIT			3
+#define SMU_THROTTLER_SPL_BIT			4
+#define SMU_THROTTLER_FPPT_BIT			5
+#define SMU_THROTTLER_SPPT_BIT			6
+#define SMU_THROTTLER_SPPT_APU_BIT		7
+
+// Current Throttlers
+#define SMU_THROTTLER_TDC_GFX_BIT		16
+#define SMU_THROTTLER_TDC_SOC_BIT		17
+#define SMU_THROTTLER_TDC_MEM_BIT		18
+#define SMU_THROTTLER_TDC_VDD_BIT		19
+#define SMU_THROTTLER_TDC_CVIP_BIT		20
+#define SMU_THROTTLER_EDC_CPU_BIT		21
+#define SMU_THROTTLER_EDC_GFX_BIT		22
+#define SMU_THROTTLER_APCC_BIT			23
+
+// Temperature
+#define SMU_THROTTLER_TEMP_GPU_BIT		32
+#define SMU_THROTTLER_TEMP_CORE_BIT		33
+#define SMU_THROTTLER_TEMP_MEM_BIT		34
+#define SMU_THROTTLER_TEMP_EDGE_BIT		35
+#define SMU_THROTTLER_TEMP_HOTSPOT_BIT		36
+#define SMU_THROTTLER_TEMP_SOC_BIT		37
+#define SMU_THROTTLER_TEMP_VR_GFX_BIT		38
+#define SMU_THROTTLER_TEMP_VR_SOC_BIT		39
+#define SMU_THROTTLER_TEMP_VR_MEM0_BIT		40
+#define SMU_THROTTLER_TEMP_VR_MEM1_BIT		41
+#define SMU_THROTTLER_TEMP_LIQUID0_BIT		42
+#define SMU_THROTTLER_TEMP_LIQUID1_BIT		43
+#define SMU_THROTTLER_VRHOT0_BIT		44
+#define SMU_THROTTLER_VRHOT1_BIT		45
+#define SMU_THROTTLER_PROCHOT_CPU_BIT		46
+#define SMU_THROTTLER_PROCHOT_GFX_BIT		47
+
+// Other
+#define SMU_THROTTLER_PPM_BIT			56
+#define SMU_THROTTLER_FIT_BIT			57
+
 struct smu_hw_power_state {
 	unsigned int magic;
 };
-- 
2.17.1

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  reply	other threads:[~2021-06-08 15:08 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-08 15:08 [PATCH v6 1/9] drm/amd/pm: Add u64 throttler status field to gpu_metrics Graham Sider
2021-06-08 15:08 ` Graham Sider [this message]
2021-06-08 15:08 ` [PATCH v6 3/9] drm/amd/pm: Add common throttler translation func Graham Sider
2021-06-08 15:08 ` [PATCH v6 4/9] drm/amd/pm: Add arcturus throttler translation Graham Sider
2021-06-08 15:08 ` [PATCH v6 5/9] drm/amd/pm: Add navi1x " Graham Sider
2021-06-08 15:08 ` [PATCH v6 6/9] drm/amd/pm: Add sienna cichlid " Graham Sider
2021-06-08 15:08 ` [PATCH v6 7/9] drm/amd/pm: Add vangogh " Graham Sider
2021-06-08 15:08 ` [PATCH v6 8/9] drm/amd/pm: Add renoir " Graham Sider
2021-06-08 15:08 ` [PATCH v6 9/9] drm/amd/pm: Add aldebaran " Graham Sider
2021-06-09  4:13 ` [PATCH v6 1/9] drm/amd/pm: Add u64 throttler status field to gpu_metrics Lazar, Lijo

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