From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
Rob Herring <robh+dt@kernel.org>,
Magnus Damm <magnus.damm@gmail.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-renesas-soc@vger.kernel.org,
Prabhakar <prabhakar.csengg@gmail.com>,
Biju Das <biju.das.jz@bp.renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH v2 3/3] arm64: dts: renesas: r9a07g044: Add SYSC node to RZ/G2L SoC DTSI
Date: Wed, 9 Jun 2021 17:37:17 +0100 [thread overview]
Message-ID: <20210609163717.3083-4-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)
In-Reply-To: <20210609163717.3083-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
Add SYSC node to RZ/G2L (R9A07G044) SoC DTSI
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 6a103a62eccb..476ee9a69065 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -99,6 +99,18 @@
#power-domain-cells = <0>;
};
+ sysc: system-controller@11020000 {
+ compatible = "renesas,r9a07g044-sysc";
+ reg = <0 0x11020000 0 0x10000>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "sys_lpm_int", "sys_ca55stbydone_int",
+ "sys_cm33stbyr_int", "sys_ca55_deny";
+ status = "disabled";
+ };
+
gic: interrupt-controller@11900000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
--
2.17.1
prev parent reply other threads:[~2021-06-09 16:38 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-09 16:37 [PATCH v2 0/3] SoC identification support for RZ/G2L Lad Prabhakar
2021-06-09 16:37 ` [PATCH v2 1/3] dt-bindings: power: renesas,rzg2l-sysc: Add DT binding documentation for SYSC controller Lad Prabhakar
2021-06-10 12:22 ` Geert Uytterhoeven
2021-06-10 14:30 ` Lad, Prabhakar
2021-06-09 16:37 ` [PATCH v2 2/3] soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's Lad Prabhakar
2021-06-10 12:26 ` Geert Uytterhoeven
2021-06-09 16:37 ` Lad Prabhakar [this message]
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