Re: [Intel-gfx] [CI 3/4] drm/i915/adl_p: Pipe B DMC Support

[Lucas De Marchi <lucas.demarchi@intel.com>]

On Fri, Jun 04, 2021 at 12:01:27PM -0700, Anusha Srivatsa wrote:
>ADLP requires us to load both Pipe A and Pipe B.
>Plug Pipe B loading support.
>
>Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>---
> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 ++
> drivers/gpu/drm/i915/display/intel_dmc.h             | 1 +
> 2 files changed, 3 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>index 2a1c39a0e56e..db38891a9ef0 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>@@ -546,6 +546,8 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
> 	seq_printf(m, "path: %s\n", dmc->fw_path);
> 	seq_printf(m, "Pipe A fw support: %s\n", yesno(INTEL_GEN(dev_priv) >= 12));
> 	seq_printf(m, "Pipe A fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEA].payload));
>+	seq_printf(m, "Pipe B fw support: %s\n", yesno(IS_ALDERLAKE_P(dev_priv)));

this is smelling lots of updates down the road :(. Anyway,


Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

but this depends on the previous patch being changed.


Lucas De Marchi


>+	seq_printf(m, "Pipe B fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEB].payload));
>
> 	if (!intel_dmc_has_payload(dev_priv))
> 		goto out;
>diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h
>index 007a284b0ef0..c3c00ff03869 100644
>--- a/drivers/gpu/drm/i915/display/intel_dmc.h
>+++ b/drivers/gpu/drm/i915/display/intel_dmc.h
>@@ -19,6 +19,7 @@ struct drm_i915_private;
> enum {
> 	DMC_FW_MAIN = 0,
> 	DMC_FW_PIPEA,
>+	DMC_FW_PIPEB,
> 	DMC_FW_MAX
> };
>
>-- 
>2.25.0
>
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