All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ben Widawsky <ben.widawsky@intel.com>
To: linux-cxl@vger.kernel.org, Dan Williams <dan.j.williams@intel.com>
Cc: Ben Widawsky <ben.widawsky@intel.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Ira Weiny <ira.weiny@intel.com>
Subject: [PATCH] cxl/hdm: Fix decoder count calculation
Date: Thu, 10 Jun 2021 14:53:32 -0700	[thread overview]
Message-ID: <20210610215332.991905-1-ben.widawsky@intel.com> (raw)

The decoder count in the HDM decoder capability structure is an encoded
field. As defined in the spec:

Decoder Count: Reports the number of memory address decoders implemented
by the component.
0 – 1 Decoder
1 – 2 Decoders
2 – 4 Decoders
3 – 6 Decoders
4 – 8 Decoders
5 – 10 DecodersAll other values are reserved

Nothing is actually fixed by this as nothing actually used this mapping
yet.

Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
---
 drivers/cxl/core.c | 3 ++-
 drivers/cxl/cxl.h  | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/cxl/core.c b/drivers/cxl/core.c
index cda09a9cd98e..92db02fe7aa8 100644
--- a/drivers/cxl/core.c
+++ b/drivers/cxl/core.c
@@ -666,7 +666,8 @@ void cxl_probe_component_regs(struct device *dev, void __iomem *base,
 
 			hdr = readl(register_block);
 
-			decoder_cnt = FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, hdr);
+			decoder_cnt =
+				cxl_hdm_decoder_count(FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, hdr));
 			length = 0x20 * decoder_cnt + 0x10;
 
 			map->hdm_decoder.valid = true;
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 1ffc5e07e24d..f0dff7d96286 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -35,6 +35,7 @@
 /* HDM decoders CXL 2.0 8.2.5.12 CXL HDM Decoder Capability Structure */
 #define CXL_HDM_DECODER_CAP_OFFSET 0x0
 #define   CXL_HDM_DECODER_COUNT_MASK GENMASK(3, 0)
+#define	    cxl_hdm_decoder_count(bits) ((bits) == 0 ? 1 : (bits) * 2)
 #define   CXL_HDM_DECODER_TARGET_COUNT_MASK GENMASK(7, 4)
 #define CXL_HDM_DECODER0_BASE_LOW_OFFSET 0x10
 #define CXL_HDM_DECODER0_BASE_HIGH_OFFSET 0x14
-- 
2.32.0


             reply	other threads:[~2021-06-10 21:53 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-10 21:53 Ben Widawsky [this message]
2021-06-10 22:00 ` [PATCH] cxl/hdm: Fix decoder count calculation Dan Williams
2021-06-11 10:37 ` Jonathan Cameron
2021-06-11 19:01 ` [PATCH v2] " Ben Widawsky
2021-06-11 19:08   ` Dan Williams

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210610215332.991905-1-ben.widawsky@intel.com \
    --to=ben.widawsky@intel.com \
    --cc=Jonathan.Cameron@huawei.com \
    --cc=dan.j.williams@intel.com \
    --cc=ira.weiny@intel.com \
    --cc=linux-cxl@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.