From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAF11C48BDF for ; Sun, 13 Jun 2021 08:52:47 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4B80460FD8 for ; Sun, 13 Jun 2021 08:52:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4B80460FD8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D814A82985; Sun, 13 Jun 2021 10:51:16 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 5EAAD8293E; Sun, 13 Jun 2021 10:50:32 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 8D80282877 for ; Sun, 13 Jun 2021 10:49:43 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=elly.siew.chin.lim@intel.com IronPort-SDR: hhawVEeM2ujtHk78Dc+q5ylwTxIOesXiwGGtGqK65EaQxQx9GDIiHxh9dQx7wQyD5rn81KtrdB fCx/OXCAl75A== X-IronPort-AV: E=McAfee;i="6200,9189,10013"; a="185398475" X-IronPort-AV: E=Sophos;i="5.83,270,1616482800"; d="scan'208";a="185398475" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jun 2021 01:49:43 -0700 IronPort-SDR: vQVAIrtp4G6MOqT/aDJLCl3tuQ4oAGO5o8Dffpzo3LP1D9D6w2b088/ELOyS/LVVI6g/uFO2mw JKdu9PajMc9A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,270,1616482800"; d="scan'208";a="441941705" Received: from pg-iccf0307.altera.com ([10.104.1.103]) by orsmga007.jf.intel.com with ESMTP; 13 Jun 2021 01:49:40 -0700 From: Siew Chin Lim To: u-boot@lists.denx.de Cc: Marek Vasut , Ley Foon Tan , Simon Goldschmidt , Tien Fong Chee , Dalon Westergreen , Simon Glass , Yau Wai Gan , Siew Chin Lim Subject: [v3 17/17] arm: socfpga: Enable Intel N5X device build Date: Sun, 13 Jun 2021 16:48:52 +0800 Message-Id: <20210613084852.30868-18-elly.siew.chin.lim@intel.com> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20210613084852.30868-1-elly.siew.chin.lim@intel.com> References: <20210613084852.30868-1-elly.siew.chin.lim@intel.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Add defconfig for N5X to support legacy, ATF and VAB boot flow. Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/Kconfig | 21 +++++++++++++- arch/arm/mach-socfpga/Makefile | 28 +++++++++++++++---- ...ab_defconfig => socfpga_n5x_atf_defconfig} | 12 ++++---- ...agilex_defconfig => socfpga_n5x_defconfig} | 14 ++++------ ...ab_defconfig => socfpga_n5x_vab_defconfig} | 11 ++++---- 5 files changed, 61 insertions(+), 25 deletions(-) copy configs/{socfpga_agilex_vab_defconfig => socfpga_n5x_atf_defconfig} (87%) copy configs/{socfpga_agilex_defconfig => socfpga_n5x_defconfig} (82%) copy configs/{socfpga_agilex_vab_defconfig => socfpga_n5x_vab_defconfig} (87%) diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 0c35406232..a4d733c756 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -8,7 +8,7 @@ config NR_DRAM_BANKS config SOCFPGA_SECURE_VAB_AUTH bool "Enable boot image authentication with Secure Device Manager" - depends on TARGET_SOCFPGA_AGILEX + depends on TARGET_SOCFPGA_AGILEX || TARGET_SOCFPGA_N5X select FIT_IMAGE_POST_PROCESS select SHA384 select SHA512_ALGO @@ -91,6 +91,22 @@ config TARGET_SOCFPGA_GEN5 imply SPL_SYS_MALLOC_SIMPLE imply SPL_USE_TINY_PRINTF +config TARGET_SOCFPGA_N5X + bool + select ARMV8_MULTIENTRY + select ARMV8_SET_SMPEN + select BINMAN if SPL_ATF + select CLK + select FPGA_INTEL_SDM_MAILBOX + select NCORE_CACHE + select SPL_ALTERA_SDRAM + select SPL_CLK if SPL + select TARGET_SOCFPGA_SOC64 + +config TARGET_SOCFPGA_N5X_SOCDK + bool "Intel eASIC SoCDK (N5X)" + select TARGET_SOCFPGA_N5X + config TARGET_SOCFPGA_SOC64 bool @@ -183,6 +199,7 @@ config SYS_BOARD default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO + default "n5x-socdk" if TARGET_SOCFPGA_N5X_SOCDK default "is1" if TARGET_SOCFPGA_IS1 default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK default "secu1" if TARGET_SOCFPGA_ARRIA5_SECU1 @@ -194,6 +211,7 @@ config SYS_BOARD config SYS_VENDOR default "intel" if TARGET_SOCFPGA_AGILEX_SOCDK + default "intel" if TARGET_SOCFPGA_N5X_SOCDK default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK @@ -221,6 +239,7 @@ config SYS_CONFIG_NAME default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO + default "socfpga_n5x_socdk" if TARGET_SOCFPGA_N5X_SOCDK default "socfpga_is1" if TARGET_SOCFPGA_IS1 default "socfpga_mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index 58afde950f..ec38b64dd4 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -4,7 +4,7 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # Copyright (C) 2012-2017 Altera Corporation -# Copyright (C) 2017-2020 Intel Corporation +# Copyright (C) 2017-2021 Intel Corporation obj-y += board.o obj-y += clock_manager.o @@ -56,6 +56,21 @@ obj-y += wrap_handoff_soc64.o obj-y += wrap_pll_config_soc64.o endif +ifdef CONFIG_TARGET_SOCFPGA_N5X +obj-y += clock_manager_n5x.o +obj-y += lowlevel_init_soc64.o +obj-y += mailbox_s10.o +obj-y += misc_soc64.o +obj-y += mmu-arm64_s10.o +obj-y += reset_manager_s10.o +obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += secure_vab.o +obj-y += system_manager_soc64.o +obj-y += timer_s10.o +obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += vab.o +obj-y += wrap_handoff_soc64.o +obj-y += wrap_pll_config_soc64.o +endif + ifdef CONFIG_SPL_BUILD ifdef CONFIG_TARGET_SOCFPGA_GEN5 obj-y += spl_gen5.o @@ -64,18 +79,21 @@ obj-y += wrap_iocsr_config.o obj-y += wrap_pinmux_config.o obj-y += wrap_sdram_config.o endif +ifdef CONFIG_TARGET_SOCFPGA_SOC64 +obj-y += firewall.o +obj-y += spl_soc64.o +endif ifdef CONFIG_TARGET_SOCFPGA_ARRIA10 obj-y += spl_a10.o endif ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 -obj-y += firewall.o obj-y += spl_s10.o -obj-y += spl_soc64.o endif ifdef CONFIG_TARGET_SOCFPGA_AGILEX -obj-y += firewall.o obj-y += spl_agilex.o -obj-y += spl_soc64.o +endif +ifdef CONFIG_TARGET_SOCFPGA_N5X +obj-y += spl_n5x.o endif else obj-$(CONFIG_SPL_ATF) += secure_reg_helper.o diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_n5x_atf_defconfig similarity index 87% copy from configs/socfpga_agilex_vab_defconfig copy to configs/socfpga_n5x_atf_defconfig index af726bab69..b65ed00006 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -9,11 +9,10 @@ CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_DM_GPIO=y CONFIG_SPL_TEXT_BASE=0xFFE00000 -CONFIG_SOCFPGA_SECURE_VAB_AUTH=y -CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y -CONFIG_IDENT_STRING="socfpga_agilex" +CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y +CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" +CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk" CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y @@ -21,7 +20,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000 # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="earlycon" +CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_CRC32_SUPPORT=y @@ -30,7 +29,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -44,6 +43,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_WDT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_n5x_defconfig similarity index 82% copy from configs/socfpga_agilex_defconfig copy to configs/socfpga_n5x_defconfig index 0e5ef062a5..1f6e23e08d 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -3,27 +3,25 @@ CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x1000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x3fe00000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 CONFIG_DM_GPIO=y CONFIG_SPL_TEXT_BASE=0xFFE00000 -CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y -CONFIG_IDENT_STRING="socfpga_agilex" +CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y +CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" +CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk" CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="earlycon" +CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -37,10 +35,10 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_WDT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_SPL_ALTERA_SDRAM=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_n5x_vab_defconfig similarity index 87% copy from configs/socfpga_agilex_vab_defconfig copy to configs/socfpga_n5x_vab_defconfig index af726bab69..987d5ce58c 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -10,10 +10,10 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_DM_GPIO=y CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SOCFPGA_SECURE_VAB_AUTH=y -CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y -CONFIG_IDENT_STRING="socfpga_agilex" +CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y +CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" +CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk" CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y @@ -21,7 +21,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000 # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="earlycon" +CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_CRC32_SUPPORT=y @@ -30,7 +30,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -44,6 +44,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_WDT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y -- 2.19.0