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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
To: linux-staging@lists.linux.dev
Cc: gregkh@linuxfoundation.org, neil@brown.name,
	linux-mips@vger.kernel.org, tsbogend@alpha.franken.de,
	ilya.lipnitskiy@gmail.com, john@phrozen.org
Subject: [PATCH v2 1/3] MIPS: ralink: Define PCI_IOBASE
Date: Mon, 14 Jun 2021 12:06:15 +0200	[thread overview]
Message-ID: <20210614100617.28753-2-sergio.paracuellos@gmail.com> (raw)
In-Reply-To: <20210614100617.28753-1-sergio.paracuellos@gmail.com>

PCI_IOBASE is used to create VM maps for PCI I/O ports, it is
required by generic PCI drivers to make memory mapped I/O range
work. Hence define it for ralink architectures to be able to
avoid parsing manually IO ranges in PCI generic driver code.
Function 'plat_mem_setup' for ralink is using 'set_io_port_base'
call using '0xa0000000' as address, so use the same address in
the definition to align things.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 arch/mips/include/asm/mach-ralink/spaces.h | 10 ++++++++++
 1 file changed, 10 insertions(+)
 create mode 100644 arch/mips/include/asm/mach-ralink/spaces.h

diff --git a/arch/mips/include/asm/mach-ralink/spaces.h b/arch/mips/include/asm/mach-ralink/spaces.h
new file mode 100644
index 000000000000..87d085c9ad61
--- /dev/null
+++ b/arch/mips/include/asm/mach-ralink/spaces.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_MACH_RALINK_SPACES_H_
+#define __ASM_MACH_RALINK_SPACES_H_
+
+#define PCI_IOBASE	_AC(0xa0000000, UL)
+#define PCI_IOSIZE	SZ_16M
+#define IO_SPACE_LIMIT	(PCI_IOSIZE - 1)
+
+#include <asm/mach-generic/spaces.h>
+#endif
-- 
2.25.1


  reply	other threads:[~2021-06-14 10:06 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-14 10:06 [PATCH v2 0/3] staging: mt7621-pci: define ralink PCI_IOBASE to avoid manually ranges parsing Sergio Paracuellos
2021-06-14 10:06 ` Sergio Paracuellos [this message]
2021-06-15 11:51   ` [PATCH v2 1/3] MIPS: ralink: Define PCI_IOBASE Greg KH
2021-06-15 12:38     ` Sergio Paracuellos
2021-06-15 12:38       ` Sergio Paracuellos
2021-06-15 13:08   ` Thomas Bogendoerfer
2021-06-15 13:12     ` Sergio Paracuellos
2021-06-15 13:12       ` Sergio Paracuellos
2021-06-15 13:24       ` Greg KH
2021-07-29 10:01   ` Thomas Bogendoerfer
2021-07-29 11:21     ` Sergio Paracuellos
2021-07-29 11:21       ` Sergio Paracuellos
2021-07-30  8:30       ` Thomas Bogendoerfer
2021-07-30  9:41         ` Sergio Paracuellos
2021-07-30  9:41           ` Sergio Paracuellos
2021-07-30 10:22         ` Sergio Paracuellos
2021-07-30 10:22           ` Sergio Paracuellos
2021-07-30 11:15           ` Sergio Paracuellos
2021-07-30 11:15             ` Sergio Paracuellos
2021-07-30 12:39             ` Thomas Bogendoerfer
2021-07-30 15:51               ` Sergio Paracuellos
2021-07-30 15:51                 ` Sergio Paracuellos
2021-06-14 10:06 ` [PATCH v2 2/3] staging: mt7621-pci: remove 'mt7621_pci_parse_request_of_pci_ranges' Sergio Paracuellos
2021-06-14 10:06 ` [PATCH v2 3/3] staging: mt7621-dts: fix pci address for PCI memory range Sergio Paracuellos

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