From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C435C4743C for ; Mon, 14 Jun 2021 16:27:05 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F24F460234 for ; Mon, 14 Jun 2021 16:27:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F24F460234 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 147D089F24; Mon, 14 Jun 2021 16:26:57 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id E4EC689E01; Mon, 14 Jun 2021 16:26:49 +0000 (UTC) IronPort-SDR: dZflS3oK+h9JijFGCAd/LMjTSQa/3O53Z20W0KpUQWxVwexbmfxERec+QRsDELq0qPiwVAuT0u EZrdROqG324g== X-IronPort-AV: E=McAfee;i="6200,9189,10015"; a="205870605" X-IronPort-AV: E=Sophos;i="5.83,273,1616482800"; d="scan'208";a="205870605" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jun 2021 09:26:42 -0700 IronPort-SDR: IMvLFpidXN8UEWmM39+basU6rv1GWcUquoF6f3R0Tf169pLHwFT0YTYxNKsCOwt716GMblWfGJ S/FQfgWobRTQ== X-IronPort-AV: E=Sophos;i="5.83,273,1616482800"; d="scan'208";a="449946728" Received: from fnygreen-mobl1.ger.corp.intel.com (HELO thellst-mobl1.intel.com) ([10.249.254.50]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jun 2021 09:26:39 -0700 From: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH v3 09/12] drm/i915/gt: Setup a default migration context on the GT Date: Mon, 14 Jun 2021 18:26:09 +0200 Message-Id: <20210614162612.294869-10-thomas.hellstrom@linux.intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210614162612.294869-1-thomas.hellstrom@linux.intel.com> References: <20210614162612.294869-1-thomas.hellstrom@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , matthew.auld@intel.com, Chris Wilson Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Chris Wilson Set up a default migration context on the GT and use it from the selftests. Add a perf selftest and make sure we exercise LMEM if available. Signed-off-by: Chris Wilson Co-developed-by: Thomas Hellström Signed-off-by: Thomas Hellström Reviewed-by: Matthew Auld --- v3: - Skip checks for lmem presence before creating objects (Reported by Matthew Auld) --- drivers/gpu/drm/i915/gt/intel_gt.c | 4 + drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 + drivers/gpu/drm/i915/gt/intel_migrate.c | 2 + drivers/gpu/drm/i915/gt/selftest_migrate.c | 237 +++++++++++++++++- .../drm/i915/selftests/i915_perf_selftests.h | 1 + 5 files changed, 236 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c index 2161bf01ef8b..67ef057ae918 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -13,6 +13,7 @@ #include "intel_gt_clock_utils.h" #include "intel_gt_pm.h" #include "intel_gt_requests.h" +#include "intel_migrate.h" #include "intel_mocs.h" #include "intel_rc6.h" #include "intel_renderstate.h" @@ -626,6 +627,8 @@ int intel_gt_init(struct intel_gt *gt) if (err) goto err_gt; + intel_migrate_init(>->migrate, gt); + goto out_fw; err_gt: __intel_gt_disable(gt); @@ -649,6 +652,7 @@ void intel_gt_driver_remove(struct intel_gt *gt) { __intel_gt_disable(gt); + intel_migrate_fini(>->migrate); intel_uc_driver_remove(>->uc); intel_engines_release(gt); diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h index fecfacf551d5..7450935f2ca8 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h @@ -24,6 +24,7 @@ #include "intel_reset_types.h" #include "intel_rc6_types.h" #include "intel_rps_types.h" +#include "intel_migrate_types.h" #include "intel_wakeref.h" struct drm_i915_private; @@ -145,6 +146,8 @@ struct intel_gt { struct i915_vma *scratch; + struct intel_migrate migrate; + struct intel_gt_info { intel_engine_mask_t engine_mask; u8 num_engines; diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c index ba4009120b33..23c59ce66cee 100644 --- a/drivers/gpu/drm/i915/gt/intel_migrate.c +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c @@ -418,6 +418,7 @@ intel_context_migrate_copy(struct intel_context *ce, struct i915_request *rq; int err; + GEM_BUG_ON(ce->vm != ce->engine->gt->migrate.context->vm); *out = NULL; GEM_BUG_ON(ce->ring->size < SZ_64K); @@ -536,6 +537,7 @@ intel_context_migrate_clear(struct intel_context *ce, struct i915_request *rq; int err; + GEM_BUG_ON(ce->vm != ce->engine->gt->migrate.context->vm); *out = NULL; GEM_BUG_ON(ce->ring->size < SZ_64K); diff --git a/drivers/gpu/drm/i915/gt/selftest_migrate.c b/drivers/gpu/drm/i915/gt/selftest_migrate.c index 159c8656e1b0..12ef2837c89b 100644 --- a/drivers/gpu/drm/i915/gt/selftest_migrate.c +++ b/drivers/gpu/drm/i915/gt/selftest_migrate.c @@ -3,6 +3,8 @@ * Copyright © 2020 Intel Corporation */ +#include + #include "selftests/i915_random.h" static const unsigned int sizes[] = { @@ -18,13 +20,11 @@ static const unsigned int sizes[] = { static struct drm_i915_gem_object * create_lmem_or_internal(struct drm_i915_private *i915, size_t size) { - if (HAS_LMEM(i915)) { - struct drm_i915_gem_object *obj; + struct drm_i915_gem_object *obj; - obj = i915_gem_object_create_lmem(i915, size, 0); - if (!IS_ERR(obj)) - return obj; - } + obj = i915_gem_object_create_lmem(i915, size, 0); + if (!IS_ERR(obj)) + return obj; return i915_gem_object_create_internal(i915, size); } @@ -441,14 +441,229 @@ int intel_migrate_live_selftests(struct drm_i915_private *i915) SUBTEST(thread_global_copy), SUBTEST(thread_global_clear), }; - struct intel_migrate m; + struct intel_gt *gt = &i915->gt; + + if (!gt->migrate.context) + return 0; + + return i915_subtests(tests, >->migrate); +} + +static struct drm_i915_gem_object * +create_init_lmem_internal(struct intel_gt *gt, size_t sz, bool try_lmem) +{ + struct drm_i915_gem_object *obj = NULL; int err; - if (intel_migrate_init(&m, &i915->gt)) + if (try_lmem) + obj = i915_gem_object_create_lmem(gt->i915, sz, 0); + + if (IS_ERR_OR_NULL(obj)) { + obj = i915_gem_object_create_internal(gt->i915, sz); + if (IS_ERR(obj)) + return obj; + } + + i915_gem_object_trylock(obj); + err = i915_gem_object_pin_pages(obj); + if (err) { + i915_gem_object_unlock(obj); + i915_gem_object_put(obj); + return ERR_PTR(err); + } + + return obj; +} + +static int wrap_ktime_compare(const void *A, const void *B) +{ + const ktime_t *a = A, *b = B; + + return ktime_compare(*a, *b); +} + +static int __perf_clear_blt(struct intel_context *ce, + struct scatterlist *sg, + enum i915_cache_level cache_level, + bool is_lmem, + size_t sz) +{ + ktime_t t[5]; + int pass; + int err = 0; + + for (pass = 0; pass < ARRAY_SIZE(t); pass++) { + struct i915_request *rq; + ktime_t t0, t1; + + t0 = ktime_get(); + + err = intel_context_migrate_clear(ce, NULL, sg, cache_level, + is_lmem, 0, &rq); + if (rq) { + if (i915_request_wait(rq, 0, MAX_SCHEDULE_TIMEOUT) < 0) + err = -EIO; + i915_request_put(rq); + } + if (err) + break; + + t1 = ktime_get(); + t[pass] = ktime_sub(t1, t0); + } + if (err) + return err; + + sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL); + pr_info("%s: %zd KiB fill: %lld MiB/s\n", + ce->engine->name, sz >> 10, + div64_u64(mul_u32_u32(4 * sz, + 1000 * 1000 * 1000), + t[1] + 2 * t[2] + t[3]) >> 20); + return 0; +} + +static int perf_clear_blt(void *arg) +{ + struct intel_gt *gt = arg; + static const unsigned long sizes[] = { + SZ_4K, + SZ_64K, + SZ_2M, + SZ_64M + }; + int i; + + for (i = 0; i < ARRAY_SIZE(sizes); i++) { + struct drm_i915_gem_object *dst; + int err; + + dst = create_init_lmem_internal(gt, sizes[i], true); + if (IS_ERR(dst)) + return PTR_ERR(dst); + + err = __perf_clear_blt(gt->migrate.context, + dst->mm.pages->sgl, + I915_CACHE_NONE, + i915_gem_object_is_lmem(dst), + sizes[i]); + + i915_gem_object_unlock(dst); + i915_gem_object_put(dst); + if (err) + return err; + } + + return 0; +} + +static int __perf_copy_blt(struct intel_context *ce, + struct scatterlist *src, + enum i915_cache_level src_cache_level, + bool src_is_lmem, + struct scatterlist *dst, + enum i915_cache_level dst_cache_level, + bool dst_is_lmem, + size_t sz) +{ + ktime_t t[5]; + int pass; + int err = 0; + + for (pass = 0; pass < ARRAY_SIZE(t); pass++) { + struct i915_request *rq; + ktime_t t0, t1; + + t0 = ktime_get(); + + err = intel_context_migrate_copy(ce, NULL, + src, src_cache_level, + src_is_lmem, + dst, dst_cache_level, + dst_is_lmem, + &rq); + if (rq) { + if (i915_request_wait(rq, 0, MAX_SCHEDULE_TIMEOUT) < 0) + err = -EIO; + i915_request_put(rq); + } + if (err) + break; + + t1 = ktime_get(); + t[pass] = ktime_sub(t1, t0); + } + if (err) + return err; + + sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL); + pr_info("%s: %zd KiB copy: %lld MiB/s\n", + ce->engine->name, sz >> 10, + div64_u64(mul_u32_u32(4 * sz, + 1000 * 1000 * 1000), + t[1] + 2 * t[2] + t[3]) >> 20); + return 0; +} + +static int perf_copy_blt(void *arg) +{ + struct intel_gt *gt = arg; + static const unsigned long sizes[] = { + SZ_4K, + SZ_64K, + SZ_2M, + SZ_64M + }; + int i; + + for (i = 0; i < ARRAY_SIZE(sizes); i++) { + struct drm_i915_gem_object *src, *dst; + int err; + + src = create_init_lmem_internal(gt, sizes[i], true); + if (IS_ERR(src)) + return PTR_ERR(src); + + dst = create_init_lmem_internal(gt, sizes[i], false); + if (IS_ERR(dst)) { + err = PTR_ERR(dst); + goto err_src; + } + + err = __perf_copy_blt(gt->migrate.context, + src->mm.pages->sgl, + I915_CACHE_NONE, + i915_gem_object_is_lmem(src), + dst->mm.pages->sgl, + I915_CACHE_NONE, + i915_gem_object_is_lmem(dst), + sizes[i]); + + i915_gem_object_unlock(dst); + i915_gem_object_put(dst); +err_src: + i915_gem_object_unlock(src); + i915_gem_object_put(src); + if (err) + return err; + } + + return 0; +} + +int intel_migrate_perf_selftests(struct drm_i915_private *i915) +{ + static const struct i915_subtest tests[] = { + SUBTEST(perf_clear_blt), + SUBTEST(perf_copy_blt), + }; + struct intel_gt *gt = &i915->gt; + + if (intel_gt_is_wedged(gt)) return 0; - err = i915_subtests(tests, &m); - intel_migrate_fini(&m); + if (!gt->migrate.context) + return 0; - return err; + return intel_gt_live_subtests(tests, gt); } diff --git a/drivers/gpu/drm/i915/selftests/i915_perf_selftests.h b/drivers/gpu/drm/i915/selftests/i915_perf_selftests.h index c2389f8a257d..5077dc3c3b8c 100644 --- a/drivers/gpu/drm/i915/selftests/i915_perf_selftests.h +++ b/drivers/gpu/drm/i915/selftests/i915_perf_selftests.h @@ -17,5 +17,6 @@ */ selftest(engine_cs, intel_engine_cs_perf_selftests) selftest(request, i915_request_perf_selftests) +selftest(migrate, intel_migrate_perf_selftests) selftest(blt, i915_gem_object_blt_perf_selftests) selftest(region, intel_memory_region_perf_selftests) -- 2.31.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2C87C49EA4 for ; Mon, 14 Jun 2021 16:27:03 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A7E7A60234 for ; Mon, 14 Jun 2021 16:27:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A7E7A60234 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 42CD289F0B; Mon, 14 Jun 2021 16:26:52 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id E4EC689E01; Mon, 14 Jun 2021 16:26:49 +0000 (UTC) IronPort-SDR: dZflS3oK+h9JijFGCAd/LMjTSQa/3O53Z20W0KpUQWxVwexbmfxERec+QRsDELq0qPiwVAuT0u EZrdROqG324g== X-IronPort-AV: E=McAfee;i="6200,9189,10015"; a="205870605" X-IronPort-AV: E=Sophos;i="5.83,273,1616482800"; d="scan'208";a="205870605" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jun 2021 09:26:42 -0700 IronPort-SDR: IMvLFpidXN8UEWmM39+basU6rv1GWcUquoF6f3R0Tf169pLHwFT0YTYxNKsCOwt716GMblWfGJ S/FQfgWobRTQ== X-IronPort-AV: E=Sophos;i="5.83,273,1616482800"; d="scan'208";a="449946728" Received: from fnygreen-mobl1.ger.corp.intel.com (HELO thellst-mobl1.intel.com) ([10.249.254.50]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jun 2021 09:26:39 -0700 From: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Mon, 14 Jun 2021 18:26:09 +0200 Message-Id: <20210614162612.294869-10-thomas.hellstrom@linux.intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210614162612.294869-1-thomas.hellstrom@linux.intel.com> References: <20210614162612.294869-1-thomas.hellstrom@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v3 09/12] drm/i915/gt: Setup a default migration context on the GT X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , matthew.auld@intel.com, Chris Wilson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" RnJvbTogQ2hyaXMgV2lsc29uIDxjaHJpc0BjaHJpcy13aWxzb24uY28udWs+CgpTZXQgdXAgYSBk ZWZhdWx0IG1pZ3JhdGlvbiBjb250ZXh0IG9uIHRoZSBHVCBhbmQgdXNlIGl0IGZyb20gdGhlCnNl bGZ0ZXN0cy4KQWRkIGEgcGVyZiBzZWxmdGVzdCBhbmQgbWFrZSBzdXJlIHdlIGV4ZXJjaXNlIExN RU0gaWYgYXZhaWxhYmxlLgoKU2lnbmVkLW9mZi1ieTogQ2hyaXMgV2lsc29uIDxjaHJpc0BjaHJp cy13aWxzb24uY28udWs+CkNvLWRldmVsb3BlZC1ieTogVGhvbWFzIEhlbGxzdHLDtm0gPHRob21h cy5oZWxsc3Ryb21AbGludXguaW50ZWwuY29tPgpTaWduZWQtb2ZmLWJ5OiBUaG9tYXMgSGVsbHN0 csO2bSA8dGhvbWFzLmhlbGxzdHJvbUBsaW51eC5pbnRlbC5jb20+ClJldmlld2VkLWJ5OiBNYXR0 aGV3IEF1bGQgPG1hdHRoZXcuYXVsZEBpbnRlbC5jb20+Ci0tLQp2MzoKLSBTa2lwIGNoZWNrcyBm b3IgbG1lbSBwcmVzZW5jZSBiZWZvcmUgY3JlYXRpbmcgb2JqZWN0cwogIChSZXBvcnRlZCBieSBN YXR0aGV3IEF1bGQpCi0tLQogZHJpdmVycy9ncHUvZHJtL2k5MTUvZ3QvaW50ZWxfZ3QuYyAgICAg ICAgICAgIHwgICA0ICsKIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2d0L2ludGVsX2d0X3R5cGVzLmgg ICAgICB8ICAgMyArCiBkcml2ZXJzL2dwdS9kcm0vaTkxNS9ndC9pbnRlbF9taWdyYXRlLmMgICAg ICAgfCAgIDIgKwogZHJpdmVycy9ncHUvZHJtL2k5MTUvZ3Qvc2VsZnRlc3RfbWlncmF0ZS5jICAg IHwgMjM3ICsrKysrKysrKysrKysrKysrLQogLi4uL2RybS9pOTE1L3NlbGZ0ZXN0cy9pOTE1X3Bl cmZfc2VsZnRlc3RzLmggIHwgICAxICsKIDUgZmlsZXMgY2hhbmdlZCwgMjM2IGluc2VydGlvbnMo KyksIDExIGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2d0 L2ludGVsX2d0LmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9ndC9pbnRlbF9ndC5jCmluZGV4IDIx NjFiZjAxZWY4Yi4uNjdlZjA1N2FlOTE4IDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkx NS9ndC9pbnRlbF9ndC5jCisrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2d0L2ludGVsX2d0LmMK QEAgLTEzLDYgKzEzLDcgQEAKICNpbmNsdWRlICJpbnRlbF9ndF9jbG9ja191dGlscy5oIgogI2lu Y2x1ZGUgImludGVsX2d0X3BtLmgiCiAjaW5jbHVkZSAiaW50ZWxfZ3RfcmVxdWVzdHMuaCIKKyNp bmNsdWRlICJpbnRlbF9taWdyYXRlLmgiCiAjaW5jbHVkZSAiaW50ZWxfbW9jcy5oIgogI2luY2x1 ZGUgImludGVsX3JjNi5oIgogI2luY2x1ZGUgImludGVsX3JlbmRlcnN0YXRlLmgiCkBAIC02MjYs NiArNjI3LDggQEAgaW50IGludGVsX2d0X2luaXQoc3RydWN0IGludGVsX2d0ICpndCkKIAlpZiAo ZXJyKQogCQlnb3RvIGVycl9ndDsKIAorCWludGVsX21pZ3JhdGVfaW5pdCgmZ3QtPm1pZ3JhdGUs IGd0KTsKKwogCWdvdG8gb3V0X2Z3OwogZXJyX2d0OgogCV9faW50ZWxfZ3RfZGlzYWJsZShndCk7 CkBAIC02NDksNiArNjUyLDcgQEAgdm9pZCBpbnRlbF9ndF9kcml2ZXJfcmVtb3ZlKHN0cnVjdCBp bnRlbF9ndCAqZ3QpCiB7CiAJX19pbnRlbF9ndF9kaXNhYmxlKGd0KTsKIAorCWludGVsX21pZ3Jh dGVfZmluaSgmZ3QtPm1pZ3JhdGUpOwogCWludGVsX3VjX2RyaXZlcl9yZW1vdmUoJmd0LT51Yyk7 CiAKIAlpbnRlbF9lbmdpbmVzX3JlbGVhc2UoZ3QpOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUv ZHJtL2k5MTUvZ3QvaW50ZWxfZ3RfdHlwZXMuaCBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2d0L2lu dGVsX2d0X3R5cGVzLmgKaW5kZXggZmVjZmFjZjU1MWQ1Li43NDUwOTM1ZjJjYTggMTAwNjQ0Ci0t LSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2d0L2ludGVsX2d0X3R5cGVzLmgKKysrIGIvZHJpdmVy cy9ncHUvZHJtL2k5MTUvZ3QvaW50ZWxfZ3RfdHlwZXMuaApAQCAtMjQsNiArMjQsNyBAQAogI2lu Y2x1ZGUgImludGVsX3Jlc2V0X3R5cGVzLmgiCiAjaW5jbHVkZSAiaW50ZWxfcmM2X3R5cGVzLmgi CiAjaW5jbHVkZSAiaW50ZWxfcnBzX3R5cGVzLmgiCisjaW5jbHVkZSAiaW50ZWxfbWlncmF0ZV90 eXBlcy5oIgogI2luY2x1ZGUgImludGVsX3dha2VyZWYuaCIKIAogc3RydWN0IGRybV9pOTE1X3By aXZhdGU7CkBAIC0xNDUsNiArMTQ2LDggQEAgc3RydWN0IGludGVsX2d0IHsKIAogCXN0cnVjdCBp OTE1X3ZtYSAqc2NyYXRjaDsKIAorCXN0cnVjdCBpbnRlbF9taWdyYXRlIG1pZ3JhdGU7CisKIAlz dHJ1Y3QgaW50ZWxfZ3RfaW5mbyB7CiAJCWludGVsX2VuZ2luZV9tYXNrX3QgZW5naW5lX21hc2s7 CiAJCXU4IG51bV9lbmdpbmVzOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ3Qv aW50ZWxfbWlncmF0ZS5jIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ3QvaW50ZWxfbWlncmF0ZS5j CmluZGV4IGJhNDAwOTEyMGIzMy4uMjNjNTljZTY2Y2VlIDEwMDY0NAotLS0gYS9kcml2ZXJzL2dw dS9kcm0vaTkxNS9ndC9pbnRlbF9taWdyYXRlLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUv Z3QvaW50ZWxfbWlncmF0ZS5jCkBAIC00MTgsNiArNDE4LDcgQEAgaW50ZWxfY29udGV4dF9taWdy YXRlX2NvcHkoc3RydWN0IGludGVsX2NvbnRleHQgKmNlLAogCXN0cnVjdCBpOTE1X3JlcXVlc3Qg KnJxOwogCWludCBlcnI7CiAKKwlHRU1fQlVHX09OKGNlLT52bSAhPSBjZS0+ZW5naW5lLT5ndC0+ bWlncmF0ZS5jb250ZXh0LT52bSk7CiAJKm91dCA9IE5VTEw7CiAKIAlHRU1fQlVHX09OKGNlLT5y aW5nLT5zaXplIDwgU1pfNjRLKTsKQEAgLTUzNiw2ICs1MzcsNyBAQCBpbnRlbF9jb250ZXh0X21p Z3JhdGVfY2xlYXIoc3RydWN0IGludGVsX2NvbnRleHQgKmNlLAogCXN0cnVjdCBpOTE1X3JlcXVl c3QgKnJxOwogCWludCBlcnI7CiAKKwlHRU1fQlVHX09OKGNlLT52bSAhPSBjZS0+ZW5naW5lLT5n dC0+bWlncmF0ZS5jb250ZXh0LT52bSk7CiAJKm91dCA9IE5VTEw7CiAKIAlHRU1fQlVHX09OKGNl LT5yaW5nLT5zaXplIDwgU1pfNjRLKTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1 L2d0L3NlbGZ0ZXN0X21pZ3JhdGUuYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2d0L3NlbGZ0ZXN0 X21pZ3JhdGUuYwppbmRleCAxNTljODY1NmUxYjAuLjEyZWYyODM3Yzg5YiAxMDA2NDQKLS0tIGEv ZHJpdmVycy9ncHUvZHJtL2k5MTUvZ3Qvc2VsZnRlc3RfbWlncmF0ZS5jCisrKyBiL2RyaXZlcnMv Z3B1L2RybS9pOTE1L2d0L3NlbGZ0ZXN0X21pZ3JhdGUuYwpAQCAtMyw2ICszLDggQEAKICAqIENv cHlyaWdodCDCqSAyMDIwIEludGVsIENvcnBvcmF0aW9uCiAgKi8KIAorI2luY2x1ZGUgPGxpbnV4 L3NvcnQuaD4KKwogI2luY2x1ZGUgInNlbGZ0ZXN0cy9pOTE1X3JhbmRvbS5oIgogCiBzdGF0aWMg Y29uc3QgdW5zaWduZWQgaW50IHNpemVzW10gPSB7CkBAIC0xOCwxMyArMjAsMTEgQEAgc3RhdGlj IGNvbnN0IHVuc2lnbmVkIGludCBzaXplc1tdID0gewogc3RhdGljIHN0cnVjdCBkcm1faTkxNV9n ZW1fb2JqZWN0ICoKIGNyZWF0ZV9sbWVtX29yX2ludGVybmFsKHN0cnVjdCBkcm1faTkxNV9wcml2 YXRlICppOTE1LCBzaXplX3Qgc2l6ZSkKIHsKLQlpZiAoSEFTX0xNRU0oaTkxNSkpIHsKLQkJc3Ry dWN0IGRybV9pOTE1X2dlbV9vYmplY3QgKm9iajsKKwlzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVj dCAqb2JqOwogCi0JCW9iaiA9IGk5MTVfZ2VtX29iamVjdF9jcmVhdGVfbG1lbShpOTE1LCBzaXpl LCAwKTsKLQkJaWYgKCFJU19FUlIob2JqKSkKLQkJCXJldHVybiBvYmo7Ci0JfQorCW9iaiA9IGk5 MTVfZ2VtX29iamVjdF9jcmVhdGVfbG1lbShpOTE1LCBzaXplLCAwKTsKKwlpZiAoIUlTX0VSUihv YmopKQorCQlyZXR1cm4gb2JqOwogCiAJcmV0dXJuIGk5MTVfZ2VtX29iamVjdF9jcmVhdGVfaW50 ZXJuYWwoaTkxNSwgc2l6ZSk7CiB9CkBAIC00NDEsMTQgKzQ0MSwyMjkgQEAgaW50IGludGVsX21p Z3JhdGVfbGl2ZV9zZWxmdGVzdHMoc3RydWN0IGRybV9pOTE1X3ByaXZhdGUgKmk5MTUpCiAJCVNV QlRFU1QodGhyZWFkX2dsb2JhbF9jb3B5KSwKIAkJU1VCVEVTVCh0aHJlYWRfZ2xvYmFsX2NsZWFy KSwKIAl9OwotCXN0cnVjdCBpbnRlbF9taWdyYXRlIG07CisJc3RydWN0IGludGVsX2d0ICpndCA9 ICZpOTE1LT5ndDsKKworCWlmICghZ3QtPm1pZ3JhdGUuY29udGV4dCkKKwkJcmV0dXJuIDA7CisK KwlyZXR1cm4gaTkxNV9zdWJ0ZXN0cyh0ZXN0cywgJmd0LT5taWdyYXRlKTsKK30KKworc3RhdGlj IHN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICoKK2NyZWF0ZV9pbml0X2xtZW1faW50ZXJuYWwo c3RydWN0IGludGVsX2d0ICpndCwgc2l6ZV90IHN6LCBib29sIHRyeV9sbWVtKQoreworCXN0cnVj dCBkcm1faTkxNV9nZW1fb2JqZWN0ICpvYmogPSBOVUxMOwogCWludCBlcnI7CiAKLQlpZiAoaW50 ZWxfbWlncmF0ZV9pbml0KCZtLCAmaTkxNS0+Z3QpKQorCWlmICh0cnlfbG1lbSkKKwkJb2JqID0g aTkxNV9nZW1fb2JqZWN0X2NyZWF0ZV9sbWVtKGd0LT5pOTE1LCBzeiwgMCk7CisKKwlpZiAoSVNf RVJSX09SX05VTEwob2JqKSkgeworCQlvYmogPSBpOTE1X2dlbV9vYmplY3RfY3JlYXRlX2ludGVy bmFsKGd0LT5pOTE1LCBzeik7CisJCWlmIChJU19FUlIob2JqKSkKKwkJCXJldHVybiBvYmo7CisJ fQorCisJaTkxNV9nZW1fb2JqZWN0X3RyeWxvY2sob2JqKTsKKwllcnIgPSBpOTE1X2dlbV9vYmpl Y3RfcGluX3BhZ2VzKG9iaik7CisJaWYgKGVycikgeworCQlpOTE1X2dlbV9vYmplY3RfdW5sb2Nr KG9iaik7CisJCWk5MTVfZ2VtX29iamVjdF9wdXQob2JqKTsKKwkJcmV0dXJuIEVSUl9QVFIoZXJy KTsKKwl9CisKKwlyZXR1cm4gb2JqOworfQorCitzdGF0aWMgaW50IHdyYXBfa3RpbWVfY29tcGFy ZShjb25zdCB2b2lkICpBLCBjb25zdCB2b2lkICpCKQoreworCWNvbnN0IGt0aW1lX3QgKmEgPSBB LCAqYiA9IEI7CisKKwlyZXR1cm4ga3RpbWVfY29tcGFyZSgqYSwgKmIpOworfQorCitzdGF0aWMg aW50IF9fcGVyZl9jbGVhcl9ibHQoc3RydWN0IGludGVsX2NvbnRleHQgKmNlLAorCQkJICAgIHN0 cnVjdCBzY2F0dGVybGlzdCAqc2csCisJCQkgICAgZW51bSBpOTE1X2NhY2hlX2xldmVsIGNhY2hl X2xldmVsLAorCQkJICAgIGJvb2wgaXNfbG1lbSwKKwkJCSAgICBzaXplX3Qgc3opCit7CisJa3Rp bWVfdCB0WzVdOworCWludCBwYXNzOworCWludCBlcnIgPSAwOworCisJZm9yIChwYXNzID0gMDsg cGFzcyA8IEFSUkFZX1NJWkUodCk7IHBhc3MrKykgeworCQlzdHJ1Y3QgaTkxNV9yZXF1ZXN0ICpy cTsKKwkJa3RpbWVfdCB0MCwgdDE7CisKKwkJdDAgPSBrdGltZV9nZXQoKTsKKworCQllcnIgPSBp bnRlbF9jb250ZXh0X21pZ3JhdGVfY2xlYXIoY2UsIE5VTEwsIHNnLCBjYWNoZV9sZXZlbCwKKwkJ CQkJCSAgaXNfbG1lbSwgMCwgJnJxKTsKKwkJaWYgKHJxKSB7CisJCQlpZiAoaTkxNV9yZXF1ZXN0 X3dhaXQocnEsIDAsIE1BWF9TQ0hFRFVMRV9USU1FT1VUKSA8IDApCisJCQkJZXJyID0gLUVJTzsK KwkJCWk5MTVfcmVxdWVzdF9wdXQocnEpOworCQl9CisJCWlmIChlcnIpCisJCQlicmVhazsKKwor CQl0MSA9IGt0aW1lX2dldCgpOworCQl0W3Bhc3NdID0ga3RpbWVfc3ViKHQxLCB0MCk7CisJfQor CWlmIChlcnIpCisJCXJldHVybiBlcnI7CisKKwlzb3J0KHQsIEFSUkFZX1NJWkUodCksIHNpemVv ZigqdCksIHdyYXBfa3RpbWVfY29tcGFyZSwgTlVMTCk7CisJcHJfaW5mbygiJXM6ICV6ZCBLaUIg ZmlsbDogJWxsZCBNaUIvc1xuIiwKKwkJY2UtPmVuZ2luZS0+bmFtZSwgc3ogPj4gMTAsCisJCWRp djY0X3U2NChtdWxfdTMyX3UzMig0ICogc3osCisJCQkJICAgICAgMTAwMCAqIDEwMDAgKiAxMDAw KSwKKwkJCSAgdFsxXSArIDIgKiB0WzJdICsgdFszXSkgPj4gMjApOworCXJldHVybiAwOworfQor CitzdGF0aWMgaW50IHBlcmZfY2xlYXJfYmx0KHZvaWQgKmFyZykKK3sKKwlzdHJ1Y3QgaW50ZWxf Z3QgKmd0ID0gYXJnOworCXN0YXRpYyBjb25zdCB1bnNpZ25lZCBsb25nIHNpemVzW10gPSB7CisJ CVNaXzRLLAorCQlTWl82NEssCisJCVNaXzJNLAorCQlTWl82NE0KKwl9OworCWludCBpOworCisJ Zm9yIChpID0gMDsgaSA8IEFSUkFZX1NJWkUoc2l6ZXMpOyBpKyspIHsKKwkJc3RydWN0IGRybV9p OTE1X2dlbV9vYmplY3QgKmRzdDsKKwkJaW50IGVycjsKKworCQlkc3QgPSBjcmVhdGVfaW5pdF9s bWVtX2ludGVybmFsKGd0LCBzaXplc1tpXSwgdHJ1ZSk7CisJCWlmIChJU19FUlIoZHN0KSkKKwkJ CXJldHVybiBQVFJfRVJSKGRzdCk7CisKKwkJZXJyID0gX19wZXJmX2NsZWFyX2JsdChndC0+bWln cmF0ZS5jb250ZXh0LAorCQkJCSAgICAgICBkc3QtPm1tLnBhZ2VzLT5zZ2wsCisJCQkJICAgICAg IEk5MTVfQ0FDSEVfTk9ORSwKKwkJCQkgICAgICAgaTkxNV9nZW1fb2JqZWN0X2lzX2xtZW0oZHN0 KSwKKwkJCQkgICAgICAgc2l6ZXNbaV0pOworCisJCWk5MTVfZ2VtX29iamVjdF91bmxvY2soZHN0 KTsKKwkJaTkxNV9nZW1fb2JqZWN0X3B1dChkc3QpOworCQlpZiAoZXJyKQorCQkJcmV0dXJuIGVy cjsKKwl9CisKKwlyZXR1cm4gMDsKK30KKworc3RhdGljIGludCBfX3BlcmZfY29weV9ibHQoc3Ry dWN0IGludGVsX2NvbnRleHQgKmNlLAorCQkJICAgc3RydWN0IHNjYXR0ZXJsaXN0ICpzcmMsCisJ CQkgICBlbnVtIGk5MTVfY2FjaGVfbGV2ZWwgc3JjX2NhY2hlX2xldmVsLAorCQkJICAgYm9vbCBz cmNfaXNfbG1lbSwKKwkJCSAgIHN0cnVjdCBzY2F0dGVybGlzdCAqZHN0LAorCQkJICAgZW51bSBp OTE1X2NhY2hlX2xldmVsIGRzdF9jYWNoZV9sZXZlbCwKKwkJCSAgIGJvb2wgZHN0X2lzX2xtZW0s CisJCQkgICBzaXplX3Qgc3opCit7CisJa3RpbWVfdCB0WzVdOworCWludCBwYXNzOworCWludCBl cnIgPSAwOworCisJZm9yIChwYXNzID0gMDsgcGFzcyA8IEFSUkFZX1NJWkUodCk7IHBhc3MrKykg eworCQlzdHJ1Y3QgaTkxNV9yZXF1ZXN0ICpycTsKKwkJa3RpbWVfdCB0MCwgdDE7CisKKwkJdDAg PSBrdGltZV9nZXQoKTsKKworCQllcnIgPSBpbnRlbF9jb250ZXh0X21pZ3JhdGVfY29weShjZSwg TlVMTCwKKwkJCQkJCSBzcmMsIHNyY19jYWNoZV9sZXZlbCwKKwkJCQkJCSBzcmNfaXNfbG1lbSwK KwkJCQkJCSBkc3QsIGRzdF9jYWNoZV9sZXZlbCwKKwkJCQkJCSBkc3RfaXNfbG1lbSwKKwkJCQkJ CSAmcnEpOworCQlpZiAocnEpIHsKKwkJCWlmIChpOTE1X3JlcXVlc3Rfd2FpdChycSwgMCwgTUFY X1NDSEVEVUxFX1RJTUVPVVQpIDwgMCkKKwkJCQllcnIgPSAtRUlPOworCQkJaTkxNV9yZXF1ZXN0 X3B1dChycSk7CisJCX0KKwkJaWYgKGVycikKKwkJCWJyZWFrOworCisJCXQxID0ga3RpbWVfZ2V0 KCk7CisJCXRbcGFzc10gPSBrdGltZV9zdWIodDEsIHQwKTsKKwl9CisJaWYgKGVycikKKwkJcmV0 dXJuIGVycjsKKworCXNvcnQodCwgQVJSQVlfU0laRSh0KSwgc2l6ZW9mKCp0KSwgd3JhcF9rdGlt ZV9jb21wYXJlLCBOVUxMKTsKKwlwcl9pbmZvKCIlczogJXpkIEtpQiBjb3B5OiAlbGxkIE1pQi9z XG4iLAorCQljZS0+ZW5naW5lLT5uYW1lLCBzeiA+PiAxMCwKKwkJZGl2NjRfdTY0KG11bF91MzJf dTMyKDQgKiBzeiwKKwkJCQkgICAgICAxMDAwICogMTAwMCAqIDEwMDApLAorCQkJICB0WzFdICsg MiAqIHRbMl0gKyB0WzNdKSA+PiAyMCk7CisJcmV0dXJuIDA7Cit9CisKK3N0YXRpYyBpbnQgcGVy Zl9jb3B5X2JsdCh2b2lkICphcmcpCit7CisJc3RydWN0IGludGVsX2d0ICpndCA9IGFyZzsKKwlz dGF0aWMgY29uc3QgdW5zaWduZWQgbG9uZyBzaXplc1tdID0geworCQlTWl80SywKKwkJU1pfNjRL LAorCQlTWl8yTSwKKwkJU1pfNjRNCisJfTsKKwlpbnQgaTsKKworCWZvciAoaSA9IDA7IGkgPCBB UlJBWV9TSVpFKHNpemVzKTsgaSsrKSB7CisJCXN0cnVjdCBkcm1faTkxNV9nZW1fb2JqZWN0ICpz cmMsICpkc3Q7CisJCWludCBlcnI7CisKKwkJc3JjID0gY3JlYXRlX2luaXRfbG1lbV9pbnRlcm5h bChndCwgc2l6ZXNbaV0sIHRydWUpOworCQlpZiAoSVNfRVJSKHNyYykpCisJCQlyZXR1cm4gUFRS X0VSUihzcmMpOworCisJCWRzdCA9IGNyZWF0ZV9pbml0X2xtZW1faW50ZXJuYWwoZ3QsIHNpemVz W2ldLCBmYWxzZSk7CisJCWlmIChJU19FUlIoZHN0KSkgeworCQkJZXJyID0gUFRSX0VSUihkc3Qp OworCQkJZ290byBlcnJfc3JjOworCQl9CisKKwkJZXJyID0gX19wZXJmX2NvcHlfYmx0KGd0LT5t aWdyYXRlLmNvbnRleHQsCisJCQkJICAgICAgc3JjLT5tbS5wYWdlcy0+c2dsLAorCQkJCSAgICAg IEk5MTVfQ0FDSEVfTk9ORSwKKwkJCQkgICAgICBpOTE1X2dlbV9vYmplY3RfaXNfbG1lbShzcmMp LAorCQkJCSAgICAgIGRzdC0+bW0ucGFnZXMtPnNnbCwKKwkJCQkgICAgICBJOTE1X0NBQ0hFX05P TkUsCisJCQkJICAgICAgaTkxNV9nZW1fb2JqZWN0X2lzX2xtZW0oZHN0KSwKKwkJCQkgICAgICBz aXplc1tpXSk7CisKKwkJaTkxNV9nZW1fb2JqZWN0X3VubG9jayhkc3QpOworCQlpOTE1X2dlbV9v YmplY3RfcHV0KGRzdCk7CitlcnJfc3JjOgorCQlpOTE1X2dlbV9vYmplY3RfdW5sb2NrKHNyYyk7 CisJCWk5MTVfZ2VtX29iamVjdF9wdXQoc3JjKTsKKwkJaWYgKGVycikKKwkJCXJldHVybiBlcnI7 CisJfQorCisJcmV0dXJuIDA7Cit9CisKK2ludCBpbnRlbF9taWdyYXRlX3BlcmZfc2VsZnRlc3Rz KHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICppOTE1KQoreworCXN0YXRpYyBjb25zdCBzdHJ1Y3Qg aTkxNV9zdWJ0ZXN0IHRlc3RzW10gPSB7CisJCVNVQlRFU1QocGVyZl9jbGVhcl9ibHQpLAorCQlT VUJURVNUKHBlcmZfY29weV9ibHQpLAorCX07CisJc3RydWN0IGludGVsX2d0ICpndCA9ICZpOTE1 LT5ndDsKKworCWlmIChpbnRlbF9ndF9pc193ZWRnZWQoZ3QpKQogCQlyZXR1cm4gMDsKIAotCWVy ciA9IGk5MTVfc3VidGVzdHModGVzdHMsICZtKTsKLQlpbnRlbF9taWdyYXRlX2ZpbmkoJm0pOwor CWlmICghZ3QtPm1pZ3JhdGUuY29udGV4dCkKKwkJcmV0dXJuIDA7CiAKLQlyZXR1cm4gZXJyOwor CXJldHVybiBpbnRlbF9ndF9saXZlX3N1YnRlc3RzKHRlc3RzLCBndCk7CiB9CmRpZmYgLS1naXQg YS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9zZWxmdGVzdHMvaTkxNV9wZXJmX3NlbGZ0ZXN0cy5oIGIv ZHJpdmVycy9ncHUvZHJtL2k5MTUvc2VsZnRlc3RzL2k5MTVfcGVyZl9zZWxmdGVzdHMuaAppbmRl eCBjMjM4OWY4YTI1N2QuLjUwNzdkYzNjM2I4YyAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJt L2k5MTUvc2VsZnRlc3RzL2k5MTVfcGVyZl9zZWxmdGVzdHMuaAorKysgYi9kcml2ZXJzL2dwdS9k cm0vaTkxNS9zZWxmdGVzdHMvaTkxNV9wZXJmX3NlbGZ0ZXN0cy5oCkBAIC0xNyw1ICsxNyw2IEBA CiAgKi8KIHNlbGZ0ZXN0KGVuZ2luZV9jcywgaW50ZWxfZW5naW5lX2NzX3BlcmZfc2VsZnRlc3Rz KQogc2VsZnRlc3QocmVxdWVzdCwgaTkxNV9yZXF1ZXN0X3BlcmZfc2VsZnRlc3RzKQorc2VsZnRl c3QobWlncmF0ZSwgaW50ZWxfbWlncmF0ZV9wZXJmX3NlbGZ0ZXN0cykKIHNlbGZ0ZXN0KGJsdCwg aTkxNV9nZW1fb2JqZWN0X2JsdF9wZXJmX3NlbGZ0ZXN0cykKIHNlbGZ0ZXN0KHJlZ2lvbiwgaW50 ZWxfbWVtb3J5X3JlZ2lvbl9wZXJmX3NlbGZ0ZXN0cykKLS0gCjIuMzEuMQoKX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlz dApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0 b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==