From: Andre Przywara <andre.przywara@arm.com> To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@gmail.com> Cc: Rob Herring <robh@kernel.org>, Icenowy Zheng <icenowy@aosc.io>, Samuel Holland <samuel@sholland.org>, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Ondrej Jirman <megous@megous.com>, "David S . Miller" <davem@davemloft.net>, Jakub Kicinski <kuba@kernel.org>, netdev@vger.kernel.org, Giuseppe Cavallaro <peppe.cavallaro@st.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Jose Abreu <joabreu@synopsys.com> Subject: [PATCH v7 09/19] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register Date: Tue, 15 Jun 2021 12:06:26 +0100 [thread overview] Message-ID: <20210615110636.23403-10-andre.przywara@arm.com> (raw) In-Reply-To: <20210615110636.23403-1-andre.przywara@arm.com> The Allwinner H616 SoC has two EMAC controllers, with the second one being tied to the internal PHY, but also using a separate EMAC clock register. To tell the driver about which clock register to use, we add a parameter to our syscon phandle. The driver will use this value as an index into the regmap, so that we can address more than the first register, if needed. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c index 4422baeed3d8..5f3fefd9a74e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c @@ -1147,11 +1147,13 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) struct stmmac_resources stmmac_res; struct sunxi_priv_data *gmac; struct device *dev = &pdev->dev; + struct reg_field syscon_field; phy_interface_t interface; int ret; struct stmmac_priv *priv; struct net_device *ndev; struct regmap *regmap; + u32 syscon_idx = 0; ret = stmmac_get_platform_resources(pdev, &stmmac_res); if (ret) @@ -1209,8 +1211,12 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) return ret; } - gmac->regmap_field = devm_regmap_field_alloc(dev, regmap, - *gmac->variant->syscon_field); + syscon_field = *gmac->variant->syscon_field; + ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, + &syscon_idx); + if (!ret) + syscon_field.reg += syscon_idx * sizeof(u32); + gmac->regmap_field = devm_regmap_field_alloc(dev, regmap, syscon_field); if (IS_ERR(gmac->regmap_field)) { ret = PTR_ERR(gmac->regmap_field); dev_err(dev, "Unable to map syscon register: %d\n", ret); @@ -1330,6 +1336,8 @@ static const struct of_device_id sun8i_dwmac_match[] = { .data = &emac_variant_a64 }, { .compatible = "allwinner,sun50i-h6-emac", .data = &emac_variant_h6 }, + { .compatible = "allwinner,sun50i-h616-emac", + .data = &emac_variant_h6 }, { } }; MODULE_DEVICE_TABLE(of, sun8i_dwmac_match); -- 2.17.5
WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com> To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@gmail.com> Cc: Rob Herring <robh@kernel.org>, Icenowy Zheng <icenowy@aosc.io>, Samuel Holland <samuel@sholland.org>, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Ondrej Jirman <megous@megous.com>, "David S . Miller" <davem@davemloft.net>, Jakub Kicinski <kuba@kernel.org>, netdev@vger.kernel.org, Giuseppe Cavallaro <peppe.cavallaro@st.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Jose Abreu <joabreu@synopsys.com> Subject: [PATCH v7 09/19] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register Date: Tue, 15 Jun 2021 12:06:26 +0100 [thread overview] Message-ID: <20210615110636.23403-10-andre.przywara@arm.com> (raw) In-Reply-To: <20210615110636.23403-1-andre.przywara@arm.com> The Allwinner H616 SoC has two EMAC controllers, with the second one being tied to the internal PHY, but also using a separate EMAC clock register. To tell the driver about which clock register to use, we add a parameter to our syscon phandle. The driver will use this value as an index into the regmap, so that we can address more than the first register, if needed. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c index 4422baeed3d8..5f3fefd9a74e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c @@ -1147,11 +1147,13 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) struct stmmac_resources stmmac_res; struct sunxi_priv_data *gmac; struct device *dev = &pdev->dev; + struct reg_field syscon_field; phy_interface_t interface; int ret; struct stmmac_priv *priv; struct net_device *ndev; struct regmap *regmap; + u32 syscon_idx = 0; ret = stmmac_get_platform_resources(pdev, &stmmac_res); if (ret) @@ -1209,8 +1211,12 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) return ret; } - gmac->regmap_field = devm_regmap_field_alloc(dev, regmap, - *gmac->variant->syscon_field); + syscon_field = *gmac->variant->syscon_field; + ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, + &syscon_idx); + if (!ret) + syscon_field.reg += syscon_idx * sizeof(u32); + gmac->regmap_field = devm_regmap_field_alloc(dev, regmap, syscon_field); if (IS_ERR(gmac->regmap_field)) { ret = PTR_ERR(gmac->regmap_field); dev_err(dev, "Unable to map syscon register: %d\n", ret); @@ -1330,6 +1336,8 @@ static const struct of_device_id sun8i_dwmac_match[] = { .data = &emac_variant_a64 }, { .compatible = "allwinner,sun50i-h6-emac", .data = &emac_variant_h6 }, + { .compatible = "allwinner,sun50i-h616-emac", + .data = &emac_variant_h6 }, { } }; MODULE_DEVICE_TABLE(of, sun8i_dwmac_match); -- 2.17.5 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-15 11:07 UTC|newest] Thread overview: 105+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-15 11:06 [PATCH v7 00/19] arm64: sunxi: Initial Allwinner H616 SoC support Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:06 ` [PATCH v7 01/19] dt-bindings: mfd: axp20x: Add AXP305 compatible (plus optional IRQ) Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 23:33 ` Rob Herring 2021-06-15 23:33 ` Rob Herring 2021-06-16 14:57 ` Andre Przywara 2021-06-16 14:57 ` Andre Przywara 2021-06-15 11:06 ` [PATCH v7 02/19] mfd: axp20x: Allow AXP 806 chips without interrupt lines Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:06 ` [PATCH v7 03/19] dt-bindings: rtc: sun6i: Add H616 compatible string Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 23:35 ` Rob Herring 2021-06-15 23:35 ` Rob Herring 2021-06-16 14:59 ` Andre Przywara 2021-06-16 14:59 ` Andre Przywara 2021-06-15 11:06 ` [PATCH v7 04/19] rtc: sun6i: Add support for linear day storage Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-17 18:16 ` kernel test robot 2021-06-17 18:16 ` kernel test robot 2021-06-17 18:16 ` kernel test robot 2021-06-17 20:07 ` kernel test robot 2021-06-17 20:07 ` kernel test robot 2021-06-17 20:07 ` kernel test robot 2021-06-18 15:43 ` Andre Przywara 2021-06-18 15:43 ` Andre Przywara 2021-06-18 15:43 ` Andre Przywara 2021-06-15 11:06 ` [PATCH v7 05/19] rtc: sun6i: Add support for broken-down alarm registers Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-17 23:17 ` kernel test robot 2021-06-17 23:17 ` kernel test robot 2021-06-17 23:17 ` kernel test robot 2021-06-15 11:06 ` [PATCH v7 06/19] rtc: sun6i: Add support for RTCs without external LOSCs Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-16 9:14 ` Maxime Ripard 2021-06-16 9:14 ` Maxime Ripard 2021-06-16 10:14 ` Andre Przywara 2021-06-16 10:14 ` Andre Przywara 2021-06-16 13:47 ` Maxime Ripard 2021-06-16 13:47 ` Maxime Ripard 2021-07-22 23:17 ` Andre Przywara 2021-07-22 23:17 ` Andre Przywara 2021-07-26 14:59 ` Maxime Ripard 2021-07-26 14:59 ` Maxime Ripard 2021-07-29 8:04 ` Icenowy Zheng 2021-07-29 8:04 ` Icenowy Zheng 2021-07-29 8:04 ` Icenowy Zheng 2021-07-29 10:32 ` Maxime Ripard 2021-07-29 10:32 ` Maxime Ripard 2021-07-29 13:04 ` Icenowy Zheng 2021-07-29 13:04 ` Icenowy Zheng 2021-06-15 11:06 ` [PATCH v7 07/19] rtc: sun6i: Add Allwinner H616 support Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:06 ` [PATCH v7 08/19] dt-bindings: net: sun8i-emac: Add H616 compatible string Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:06 ` Andre Przywara [this message] 2021-06-15 11:06 ` [PATCH v7 09/19] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register Andre Przywara 2021-06-15 11:06 ` [PATCH v7 10/19] dt-bindings: usb: Add H616 compatible string Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:06 ` [PATCH v7 11/19] dt-bindings: usb: sunxi-musb: " Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:06 ` [PATCH v7 12/19] phy: sun4i-usb: Rework HCI PHY (aka. "pmu_unk1") handling Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:06 ` [PATCH v7 13/19] phy: sun4i-usb: Allow reset line to be shared Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:25 ` Philipp Zabel 2021-06-15 11:25 ` Philipp Zabel 2021-06-15 11:25 ` Philipp Zabel 2021-06-15 11:25 ` Philipp Zabel 2021-06-15 11:06 ` [PATCH v7 14/19] phy: sun4i-usb: Introduce port2 SIDDQ quirk Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-21 4:36 ` Vinod Koul 2021-06-21 4:36 ` Vinod Koul 2021-06-21 4:36 ` Vinod Koul 2021-06-21 9:14 ` Andre Przywara 2021-06-21 9:14 ` Andre Przywara 2021-06-21 9:14 ` Andre Przywara 2021-06-15 11:06 ` [PATCH v7 15/19] phy: sun4i-usb: Add support for the H616 USB PHY Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-07-12 16:50 ` Evgeny Boger 2021-07-12 16:50 ` Evgeny Boger 2021-07-12 16:50 ` Evgeny Boger 2021-06-15 11:06 ` [PATCH v7 16/19] arm64: dts: allwinner: Add Allwinner H616 .dtsi file Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-16 9:23 ` Maxime Ripard 2021-06-16 9:23 ` Maxime Ripard 2021-06-16 10:06 ` Andre Przywara 2021-06-16 10:06 ` Andre Przywara 2021-06-17 15:42 ` Maxime Ripard 2021-06-17 15:42 ` Maxime Ripard 2021-06-17 15:47 ` Jernej Škrabec 2021-06-17 15:47 ` Jernej Škrabec 2021-06-15 11:06 ` [PATCH v7 17/19] dt-bindings: arm: sunxi: Add two H616 board compatible strings Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-16 17:38 ` Rob Herring 2021-06-16 17:38 ` Rob Herring 2021-06-15 11:06 ` [PATCH v7 18/19] arm64: dts: allwinner: h616: Add OrangePi Zero 2 board support Andre Przywara 2021-06-15 11:06 ` Andre Przywara 2021-06-15 11:06 ` [PATCH v7 19/19] arm64: dts: allwinner: h616: Add X96 Mate TV box support Andre Przywara 2021-06-15 11:06 ` Andre Przywara
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