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Tsirkin" , Jason Wang , Vincent Guittot , Bill Mills , Alex =?utf-8?Q?Benn=C3=A9e?= , stratos-dev@op-lists.linaro.org, "open list:GPIO SUBSYSTEM" , linux-kernel , Stefan Hajnoczi , "Stefano Garzarella --cc virtualization @ lists . linux-foundation . org" , virtualization@lists.linux-foundation.org, Alistair Strachan , Wolfram Sang Subject: Re: [PATCH V3 1/3] gpio: Add virtio-gpio driver Message-ID: <20210615111551.7tcz7teqp4olhodf@vireshk-i7> References: <10442926ae8a65f716bfc23f32339a6b35e51d5a.1623326176.git.viresh.kumar@linaro.org> <20210611035623.z4f2ynumzozigqnv@vireshk-i7> <20210611080122.tlkidv6bowuka6fw@vireshk-i7> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20180716-391-311a52 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On 11-06-21, 10:22, Geert Uytterhoeven wrote: > The same reasoning can apply to your backend daemon, so when using > the GPIO aggregator, you can just control a full gpiochip, without > having to implement access control on individual GPIO lines. I tried to look at it and it surely looks very temping and may fit well and reduce size of my backend :) I am now wondering how interrupts can be made to work here. Do you have anything in mind for that ? GPIO sysfs already supports interrupts, just that you need to register irq for the specific GPIO pins inside the aggregator ? -- viresh From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.1 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4A65C48BDF for ; Tue, 15 Jun 2021 11:16:01 +0000 (UTC) Received: from smtp2.osuosl.org (smtp2.osuosl.org [140.211.166.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 574B761019 for ; Tue, 15 Jun 2021 11:16:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 574B761019 Authentication-Results: mail.kernel.org; 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Tue, 15 Jun 2021 04:15:54 -0700 (PDT) Received: from localhost ([136.185.134.182]) by smtp.gmail.com with ESMTPSA id g8sm15949343pgo.10.2021.06.15.04.15.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jun 2021 04:15:53 -0700 (PDT) Date: Tue, 15 Jun 2021 16:45:51 +0530 From: Viresh Kumar To: Geert Uytterhoeven Subject: Re: [PATCH V3 1/3] gpio: Add virtio-gpio driver Message-ID: <20210615111551.7tcz7teqp4olhodf@vireshk-i7> References: <10442926ae8a65f716bfc23f32339a6b35e51d5a.1623326176.git.viresh.kumar@linaro.org> <20210611035623.z4f2ynumzozigqnv@vireshk-i7> <20210611080122.tlkidv6bowuka6fw@vireshk-i7> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20180716-391-311a52 Cc: Alistair Strachan , Vincent Guittot , Stefan Hajnoczi , "Michael S. Tsirkin" , Viresh Kumar , Linus Walleij , virtualization@lists.linux-foundation.org, linux-kernel , Bjorn Andersson , Bartosz Golaszewski , "open list:GPIO SUBSYSTEM" , Wolfram Sang , stratos-dev@op-lists.linaro.org, "Enrico Weigelt, metux IT consult" , Bill Mills X-BeenThere: virtualization@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux virtualization List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: virtualization-bounces@lists.linux-foundation.org Sender: "Virtualization" On 11-06-21, 10:22, Geert Uytterhoeven wrote: > The same reasoning can apply to your backend daemon, so when using > the GPIO aggregator, you can just control a full gpiochip, without > having to implement access control on individual GPIO lines. I tried to look at it and it surely looks very temping and may fit well and reduce size of my backend :) I am now wondering how interrupts can be made to work here. Do you have anything in mind for that ? GPIO sysfs already supports interrupts, just that you need to register irq for the specific GPIO pins inside the aggregator ? -- viresh _______________________________________________ Virtualization mailing list Virtualization@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/virtualization