From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3EA9FC49361 for ; Wed, 16 Jun 2021 00:23:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 26C97613BF for ; Wed, 16 Jun 2021 00:23:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231634AbhFPAZe (ORCPT ); Tue, 15 Jun 2021 20:25:34 -0400 Received: from relay02.th.seeweb.it ([5.144.164.163]:59659 "EHLO relay02.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231186AbhFPAZd (ORCPT ); Tue, 15 Jun 2021 20:25:33 -0400 Received: from localhost.localdomain (83.6.168.161.neoplus.adsl.tpnet.pl [83.6.168.161]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 270E41F94D; Wed, 16 Jun 2021 02:23:27 +0200 (CEST) From: Konrad Dybcio To: ~postmarketos/upstreaming@lists.sr.ht Cc: martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, jamipkettunen@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/4] arm64: dts: qcom: sm8250: Add SDHCI2 sleep mode pinctrl Date: Wed, 16 Jun 2021 02:23:19 +0200 Message-Id: <20210616002321.74155-2-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210616002321.74155-1-konrad.dybcio@somainline.org> References: <20210616002321.74155-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add required pins for SDHCI2, so that the interface can work reliably. This commit adds sleep_state setup to the SoC DTSI, as it is common for all boards. Signed-off-by: Konrad Dybcio --- Changes since v2: - Only add sleep_state to the SoC DTSI arch/arm64/boot/dts/qcom/sm8250.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index fc1049c2bb11..0b99f1d03c4a 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3401,6 +3401,26 @@ ws { output-high; }; }; + + sdc2_sleep_state: sdc2-sleep { + clk { + pins = "sdc2_clk"; + drive-strength = <2>; + bias-disable; + }; + + cmd { + pins = "sdc2_cmd"; + drive-strength = <2>; + bias-pull-up; + }; + + data { + pins = "sdc2_data"; + drive-strength = <2>; + bias-pull-up; + }; + }; }; apps_smmu: iommu@15000000 { -- 2.32.0