All of lore.kernel.org
 help / color / mirror / Atom feed
* [PULL 00/25] target-arm queue
@ 2021-06-16 13:35 Peter Maydell
  2021-06-16 19:16 ` Peter Maydell
  0 siblings, 1 reply; 11+ messages in thread
From: Peter Maydell @ 2021-06-16 13:35 UTC (permalink / raw)
  To: qemu-devel

v2: dropped the hw/acpi/ghes-stub.c changes, which produce a
weird Meson error ("Tried to extract unknown source ghes-stub.c")
which didn't happen on my local builds; I'll investigate later...

-- PMM

The following changes since commit 1ea06abceec61b6f3ab33dadb0510b6e09fb61e2:

  Merge remote-tracking branch 'remotes/berrange-gitlab/tags/misc-fixes-pull-request' into staging (2021-06-14 15:59:13 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210616

for you to fetch changes up to 703235a303d6862a7e3f5c6aa9eff7471cb138b2:

  include/qemu/int128.h: Add function to create Int128 from int64_t (2021-06-16 14:33:52 +0100)

----------------------------------------------------------------
target-arm queue:
 * hw/intc/arm_gicv3_cpuif: Tolerate spurious EOIR writes
 * handle some UNALLOCATED decode cases correctly rather
   than asserting
 * hw: virt: consider hw_compat_6_0
 * hw/arm: add quanta-gbs-bmc machine
 * hw/intc/armv7m_nvic: Remove stale comment
 * target/arm: Fix mte page crossing test
 * hw/arm: quanta-q71l add pca954x muxes
 * target/arm: First few parts of MVE support

----------------------------------------------------------------
Heinrich Schuchardt (1):
      hw: virt: consider hw_compat_6_0

Jean-Philippe Brucker (1):
      hw/intc/arm_gicv3_cpuif: Tolerate spurious EOIR writes

Patrick Venture (5):
      hw/arm: add quanta-gbs-bmc machine
      hw/arm: quanta-gbs-bmc add i2c comments
      hw/arm: gsj add i2c comments
      hw/arm: gsj add pca9548
      hw/arm: quanta-q71l add pca954x muxes

Peter Maydell (14):
      hw/intc/armv7m_nvic: Remove stale comment
      target/arm: Provide and use H8 and H1_8 macros
      target/arm: Enable FPSCR.QC bit for MVE
      target/arm: Handle VPR semantics in existing code
      target/arm: Add handling for PSR.ECI/ICI
      target/arm: Let vfp_access_check() handle late NOCP checks
      target/arm: Implement MVE LCTP
      target/arm: Implement MVE WLSTP insn
      target/arm: Implement MVE DLSTP
      target/arm: Implement MVE LETP insn
      target/arm: Add framework for MVE decode
      target/arm: Move expand_pred_b() data to vec_helper.c
      bitops.h: Provide hswap32(), hswap64(), wswap64() swapping operations
      include/qemu/int128.h: Add function to create Int128 from int64_t

Richard Henderson (4):
      target/arm: Diagnose UNALLOCATED in disas_simd_two_reg_misc_fp16
      target/arm: Remove fprintf from disas_simd_mod_imm
      target/arm: Diagnose UNALLOCATED in disas_simd_three_reg_same_fp16
      target/arm: Fix mte page crossing test

 include/qemu/bitops.h             |  29 +++
 include/qemu/int128.h             |  10 +
 target/arm/translate-a32.h        |   2 +
 target/arm/translate.h            |   9 +
 target/arm/vec_internal.h         |   9 +
 target/arm/mve.decode             |  20 ++
 target/arm/t32.decode             |  15 +-
 hw/arm/aspeed.c                   |  11 +-
 hw/arm/npcm7xx_boards.c           | 107 ++++++++++-
 hw/arm/virt.c                     |   2 +
 hw/intc/arm_gicv3_cpuif.c         |   5 +-
 hw/intc/armv7m_nvic.c             |   6 -
 target/arm/m_helper.c             |  54 +++++-
 target/arm/mte_helper.c           |   2 +-
 target/arm/sve_helper.c           | 381 +++++++++++++-------------------------
 target/arm/translate-a64.c        |  87 +++++----
 target/arm/translate-m-nocp.c     |  16 +-
 target/arm/translate-mve.c        |  29 +++
 target/arm/translate-vfp.c        |  65 +++++--
 target/arm/translate.c            | 300 ++++++++++++++++++++++++++++--
 target/arm/vec_helper.c           | 116 +++++++++++-
 target/arm/vfp_helper.c           |   3 +-
 tests/tcg/aarch64/mte-7.c         |  31 ++++
 hw/arm/Kconfig                    |   2 +
 target/arm/meson.build            |   2 +
 tests/tcg/aarch64/Makefile.target |   2 +-
 26 files changed, 967 insertions(+), 348 deletions(-)
 create mode 100644 target/arm/mve.decode
 create mode 100644 target/arm/translate-mve.c
 create mode 100644 tests/tcg/aarch64/mte-7.c


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PULL 00/25] target-arm queue
  2021-06-16 13:35 [PULL 00/25] target-arm queue Peter Maydell
@ 2021-06-16 19:16 ` Peter Maydell
  0 siblings, 0 replies; 11+ messages in thread
From: Peter Maydell @ 2021-06-16 19:16 UTC (permalink / raw)
  To: QEMU Developers

On Wed, 16 Jun 2021 at 14:36, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> v2: dropped the hw/acpi/ghes-stub.c changes, which produce a
> weird Meson error ("Tried to extract unknown source ghes-stub.c")
> which didn't happen on my local builds; I'll investigate later...
>
> -- PMM
>
> The following changes since commit 1ea06abceec61b6f3ab33dadb0510b6e09fb61e2:
>
>   Merge remote-tracking branch 'remotes/berrange-gitlab/tags/misc-fixes-pull-request' into staging (2021-06-14 15:59:13 +0100)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210616
>
> for you to fetch changes up to 703235a303d6862a7e3f5c6aa9eff7471cb138b2:
>
>   include/qemu/int128.h: Add function to create Int128 from int64_t (2021-06-16 14:33:52 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * hw/intc/arm_gicv3_cpuif: Tolerate spurious EOIR writes
>  * handle some UNALLOCATED decode cases correctly rather
>    than asserting
>  * hw: virt: consider hw_compat_6_0
>  * hw/arm: add quanta-gbs-bmc machine
>  * hw/intc/armv7m_nvic: Remove stale comment
>  * target/arm: Fix mte page crossing test
>  * hw/arm: quanta-q71l add pca954x muxes
>  * target/arm: First few parts of MVE support
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/6.1
for any user-visible changes.

-- PMM


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PULL 00/25] target-arm queue
  2023-02-27 14:00 Peter Maydell
@ 2023-02-27 16:18 ` Peter Maydell
  0 siblings, 0 replies; 11+ messages in thread
From: Peter Maydell @ 2023-02-27 16:18 UTC (permalink / raw)
  To: qemu-devel

On Mon, 27 Feb 2023 at 14:01, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> The following changes since commit b11728dc3ae67ddedf34b7a4f318170e7092803c:
>
>   Merge tag 'pull-riscv-to-apply-20230224' of github.com:palmer-dabbelt/qemu into staging (2023-02-26 20:14:46 +0000)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git pull-target-arm-20230227
>
> for you to fetch changes up to e844f0c5d0bd2c4d8d3c1622eb2a88586c9c4677:
>
>   hw: Replace qemu_or_irq typedef by OrIRQState (2023-02-27 13:27:05 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * Various code cleanups
>  * More refactoring working towards allowing a build
>    without CONFIG_TCG
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/8.0
for any user-visible changes.

-- PMM


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PULL 00/25] target-arm queue
@ 2023-02-27 14:00 Peter Maydell
  2023-02-27 16:18 ` Peter Maydell
  0 siblings, 1 reply; 11+ messages in thread
From: Peter Maydell @ 2023-02-27 14:00 UTC (permalink / raw)
  To: qemu-devel

The following changes since commit b11728dc3ae67ddedf34b7a4f318170e7092803c:

  Merge tag 'pull-riscv-to-apply-20230224' of github.com:palmer-dabbelt/qemu into staging (2023-02-26 20:14:46 +0000)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git pull-target-arm-20230227

for you to fetch changes up to e844f0c5d0bd2c4d8d3c1622eb2a88586c9c4677:

  hw: Replace qemu_or_irq typedef by OrIRQState (2023-02-27 13:27:05 +0000)

----------------------------------------------------------------
target-arm queue:
 * Various code cleanups
 * More refactoring working towards allowing a build
   without CONFIG_TCG

----------------------------------------------------------------
Claudio Fontana (2):
      target/arm: move helpers to tcg/
      target/arm: Move psci.c into the tcg directory

Fabiano Rosas (9):
      target/arm: Wrap breakpoint/watchpoint updates with tcg_enabled
      target/arm: Wrap TCG-only code in debug_helper.c
      target/arm: move translate modules to tcg/
      target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled
      target/arm: Move hflags code into the tcg directory
      target/arm: Move regime_using_lpae_format into internal.h
      target/arm: Don't access TCG code when debugging with KVM
      cpu-defs.h: Expose CPUTLBEntryFull to non-TCG code
      tests/avocado: add machine:none tag to version.py

Philippe Mathieu-Daudé (13):
      hw/gpio/max7310: Simplify max7310_realize()
      hw/char/pl011: Un-inline pl011_create()
      hw/char/pl011: Open-code pl011_luminary_create()
      hw/char/xilinx_uartlite: Expose XILINX_UARTLITE QOM type
      hw/char/xilinx_uartlite: Open-code xilinx_uartlite_create()
      hw/char/cmsdk-apb-uart: Open-code cmsdk_apb_uart_create()
      hw/timer/cmsdk-apb-timer: Remove unused 'qdev-properties.h' header
      hw/intc/armv7m_nvic: Use QOM cast CPU() macro
      hw/arm/musicpal: Remove unused dummy MemoryRegion
      iothread: Remove unused IOThreadClass / IOTHREAD_CLASS
      hw/irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
      hw/or-irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
      hw: Replace qemu_or_irq typedef by OrIRQState

Thomas Huth (1):
      include/hw/arm/allwinner-a10.h: Remove superfluous includes from the header

 MAINTAINERS                              |   1 +
 include/exec/cpu-defs.h                  |   6 +
 include/hw/arm/allwinner-a10.h           |   2 -
 include/hw/arm/armsse.h                  |   6 +-
 include/hw/arm/bcm2835_peripherals.h     |   2 +-
 include/hw/arm/exynos4210.h              |   4 +-
 include/hw/arm/stm32f205_soc.h           |   2 +-
 include/hw/arm/stm32f405_soc.h           |   2 +-
 include/hw/arm/xlnx-versal.h             |   6 +-
 include/hw/arm/xlnx-zynqmp.h             |   2 +-
 include/hw/char/cmsdk-apb-uart.h         |  34 ---
 include/hw/char/pl011.h                  |  36 +--
 include/hw/char/xilinx_uartlite.h        |  22 +-
 include/hw/or-irq.h                      |   5 +-
 include/hw/timer/cmsdk-apb-timer.h       |   1 -
 target/arm/internals.h                   |  23 +-
 target/arm/{ => tcg}/translate-a64.h     |   0
 target/arm/{ => tcg}/translate.h         |   0
 target/arm/{ => tcg}/vec_internal.h      |   0
 target/arm/{ => tcg}/a32-uncond.decode   |   0
 target/arm/{ => tcg}/a32.decode          |   0
 target/arm/{ => tcg}/m-nocp.decode       |   0
 target/arm/{ => tcg}/mve.decode          |   0
 target/arm/{ => tcg}/neon-dp.decode      |   0
 target/arm/{ => tcg}/neon-ls.decode      |   0
 target/arm/{ => tcg}/neon-shared.decode  |   0
 target/arm/{ => tcg}/sme-fa64.decode     |   0
 target/arm/{ => tcg}/sme.decode          |   0
 target/arm/{ => tcg}/sve.decode          |   0
 target/arm/{ => tcg}/t16.decode          |   0
 target/arm/{ => tcg}/t32.decode          |   0
 target/arm/{ => tcg}/vfp-uncond.decode   |   0
 target/arm/{ => tcg}/vfp.decode          |   0
 hw/arm/allwinner-a10.c                   |   1 +
 hw/arm/boot.c                            |   6 +-
 hw/arm/exynos4210.c                      |   4 +-
 hw/arm/mps2-tz.c                         |   2 +-
 hw/arm/mps2.c                            |  41 ++-
 hw/arm/musicpal.c                        |   4 -
 hw/arm/stellaris.c                       |  11 +-
 hw/char/pl011.c                          |  17 ++
 hw/char/xilinx_uartlite.c                |   4 +-
 hw/core/irq.c                            |   9 +-
 hw/core/or-irq.c                         |  18 +-
 hw/gpio/max7310.c                        |   5 +-
 hw/intc/armv7m_nvic.c                    |  26 +-
 hw/microblaze/petalogix_s3adsp1800_mmu.c |   7 +-
 hw/pci-host/raven.c                      |   2 +-
 iothread.c                               |   4 -
 target/arm/arm-powerctl.c                |   7 +-
 target/arm/cpu.c                         |   9 +-
 target/arm/debug_helper.c                | 490 ++++++++++++++++---------------
 target/arm/helper.c                      | 411 +-------------------------
 target/arm/machine.c                     |  12 +-
 target/arm/ptw.c                         |   4 +
 target/arm/tcg-stubs.c                   |  27 ++
 target/arm/{ => tcg}/crypto_helper.c     |   0
 target/arm/{ => tcg}/helper-a64.c        |   0
 target/arm/tcg/hflags.c                  | 403 +++++++++++++++++++++++++
 target/arm/{ => tcg}/iwmmxt_helper.c     |   0
 target/arm/{ => tcg}/m_helper.c          |   0
 target/arm/{ => tcg}/mte_helper.c        |   0
 target/arm/{ => tcg}/mve_helper.c        |   0
 target/arm/{ => tcg}/neon_helper.c       |   0
 target/arm/{ => tcg}/op_helper.c         |   0
 target/arm/{ => tcg}/pauth_helper.c      |   0
 target/arm/{ => tcg}/psci.c              |   0
 target/arm/{ => tcg}/sme_helper.c        |   0
 target/arm/{ => tcg}/sve_helper.c        |   0
 target/arm/{ => tcg}/tlb_helper.c        |  18 --
 target/arm/{ => tcg}/translate-a64.c     |   0
 target/arm/{ => tcg}/translate-m-nocp.c  |   0
 target/arm/{ => tcg}/translate-mve.c     |   0
 target/arm/{ => tcg}/translate-neon.c    |   0
 target/arm/{ => tcg}/translate-sme.c     |   0
 target/arm/{ => tcg}/translate-sve.c     |   0
 target/arm/{ => tcg}/translate-vfp.c     |   0
 target/arm/{ => tcg}/translate.c         |   0
 target/arm/{ => tcg}/vec_helper.c        |   0
 target/arm/meson.build                   |  46 +--
 target/arm/tcg/meson.build               |  50 ++++
 tests/avocado/version.py                 |   1 +
 82 files changed, 918 insertions(+), 875 deletions(-)
 rename target/arm/{ => tcg}/translate-a64.h (100%)
 rename target/arm/{ => tcg}/translate.h (100%)
 rename target/arm/{ => tcg}/vec_internal.h (100%)
 rename target/arm/{ => tcg}/a32-uncond.decode (100%)
 rename target/arm/{ => tcg}/a32.decode (100%)
 rename target/arm/{ => tcg}/m-nocp.decode (100%)
 rename target/arm/{ => tcg}/mve.decode (100%)
 rename target/arm/{ => tcg}/neon-dp.decode (100%)
 rename target/arm/{ => tcg}/neon-ls.decode (100%)
 rename target/arm/{ => tcg}/neon-shared.decode (100%)
 rename target/arm/{ => tcg}/sme-fa64.decode (100%)
 rename target/arm/{ => tcg}/sme.decode (100%)
 rename target/arm/{ => tcg}/sve.decode (100%)
 rename target/arm/{ => tcg}/t16.decode (100%)
 rename target/arm/{ => tcg}/t32.decode (100%)
 rename target/arm/{ => tcg}/vfp-uncond.decode (100%)
 rename target/arm/{ => tcg}/vfp.decode (100%)
 create mode 100644 target/arm/tcg-stubs.c
 rename target/arm/{ => tcg}/crypto_helper.c (100%)
 rename target/arm/{ => tcg}/helper-a64.c (100%)
 create mode 100644 target/arm/tcg/hflags.c
 rename target/arm/{ => tcg}/iwmmxt_helper.c (100%)
 rename target/arm/{ => tcg}/m_helper.c (100%)
 rename target/arm/{ => tcg}/mte_helper.c (100%)
 rename target/arm/{ => tcg}/mve_helper.c (100%)
 rename target/arm/{ => tcg}/neon_helper.c (100%)
 rename target/arm/{ => tcg}/op_helper.c (100%)
 rename target/arm/{ => tcg}/pauth_helper.c (100%)
 rename target/arm/{ => tcg}/psci.c (100%)
 rename target/arm/{ => tcg}/sme_helper.c (100%)
 rename target/arm/{ => tcg}/sve_helper.c (100%)
 rename target/arm/{ => tcg}/tlb_helper.c (94%)
 rename target/arm/{ => tcg}/translate-a64.c (100%)
 rename target/arm/{ => tcg}/translate-m-nocp.c (100%)
 rename target/arm/{ => tcg}/translate-mve.c (100%)
 rename target/arm/{ => tcg}/translate-neon.c (100%)
 rename target/arm/{ => tcg}/translate-sme.c (100%)
 rename target/arm/{ => tcg}/translate-sve.c (100%)
 rename target/arm/{ => tcg}/translate-vfp.c (100%)
 rename target/arm/{ => tcg}/translate.c (100%)
 rename target/arm/{ => tcg}/vec_helper.c (100%)
 create mode 100644 target/arm/tcg/meson.build


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PULL 00/25] target-arm queue
  2022-06-27 10:22 Peter Maydell
@ 2022-06-27 22:55 ` Richard Henderson
  0 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2022-06-27 22:55 UTC (permalink / raw)
  To: Peter Maydell, qemu-devel

On 6/27/22 15:52, Peter Maydell wrote:
> target-arm queue, mostly SME preliminaries.
> 
> In the unlikely event we don't land the rest of SME before freeze
> for 7.1 we can revert the docs/property changes included here.
> 
> -- PMM
> 
> The following changes since commit 097ccbbbaf2681df1e65542e5b7d2b2d0c66e2bc:
> 
>    Merge tag 'qemu-sparc-20220626' of https://github.com/mcayland/qemu into staging (2022-06-27 05:21:05 +0530)
> 
> are available in the Git repository at:
> 
>    https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220627
> 
> for you to fetch changes up to 59e1b8a22ea9f947d038ccac784de1020f266e14:
> 
>    target/arm: Check V7VE as well as LPAE in arm_pamax (2022-06-27 11:18:17 +0100)
> 
> ----------------------------------------------------------------
> target-arm queue:
>   * sphinx: change default language to 'en'
>   * Diagnose attempts to emulate EL3 in hvf as well as kvm
>   * More SME groundwork patches
>   * virt: Fix calculation of physical address space size
>     for v7VE CPUs (eg cortex-a15)

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/7.1 as appropriate.


r~


> 
> ----------------------------------------------------------------
> Alexander Graf (2):
>        accel: Introduce current_accel_name()
>        target/arm: Catch invalid kvm state also for hvf
> 
> Martin Liška (1):
>        sphinx: change default language to 'en'
> 
> Richard Henderson (22):
>        target/arm: Implement TPIDR2_EL0
>        target/arm: Add SMEEXC_EL to TB flags
>        target/arm: Add syn_smetrap
>        target/arm: Add ARM_CP_SME
>        target/arm: Add SVCR
>        target/arm: Add SMCR_ELx
>        target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2
>        target/arm: Add PSTATE.{SM,ZA} to TB flags
>        target/arm: Add the SME ZA storage to CPUARMState
>        target/arm: Implement SMSTART, SMSTOP
>        target/arm: Move error for sve%d property to arm_cpu_sve_finalize
>        target/arm: Create ARMVQMap
>        target/arm: Generalize cpu_arm_{get,set}_vq
>        target/arm: Generalize cpu_arm_{get, set}_default_vec_len
>        target/arm: Move arm_cpu_*_finalize to internals.h
>        target/arm: Unexport aarch64_add_*_properties
>        target/arm: Add cpu properties for SME
>        target/arm: Introduce sve_vqm1_for_el_sm
>        target/arm: Add SVL to TB flags
>        target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h
>        target/arm: Extend arm_pamax to more than aarch64
>        target/arm: Check V7VE as well as LPAE in arm_pamax
> 
>   docs/conf.py                     |   2 +-
>   docs/system/arm/cpu-features.rst |  56 ++++++++++
>   include/qemu/accel.h             |   1 +
>   target/arm/cpregs.h              |   5 +
>   target/arm/cpu.h                 | 103 ++++++++++++++-----
>   target/arm/helper-sme.h          |  21 ++++
>   target/arm/helper.h              |   1 +
>   target/arm/internals.h           |   4 +
>   target/arm/syndrome.h            |  14 +++
>   target/arm/translate-a64.h       |  38 +++++++
>   target/arm/translate.h           |   6 ++
>   accel/accel-common.c             |   8 ++
>   hw/arm/virt.c                    |  10 +-
>   softmmu/vl.c                     |   3 +-
>   target/arm/cpu.c                 |  32 ++++--
>   target/arm/cpu64.c               | 205 ++++++++++++++++++++++++++++---------
>   target/arm/helper.c              | 213 +++++++++++++++++++++++++++++++++++++--
>   target/arm/kvm64.c               |   2 +-
>   target/arm/machine.c             |  34 +++++++
>   target/arm/ptw.c                 |  26 +++--
>   target/arm/sme_helper.c          |  61 +++++++++++
>   target/arm/translate-a64.c       |  46 +++++++++
>   target/arm/translate-sve.c       |  36 -------
>   target/arm/meson.build           |   1 +
>   24 files changed, 782 insertions(+), 146 deletions(-)
>   create mode 100644 target/arm/helper-sme.h
>   create mode 100644 target/arm/sme_helper.c
> 



^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PULL 00/25] target-arm queue
@ 2022-06-27 10:22 Peter Maydell
  2022-06-27 22:55 ` Richard Henderson
  0 siblings, 1 reply; 11+ messages in thread
From: Peter Maydell @ 2022-06-27 10:22 UTC (permalink / raw)
  To: qemu-devel

target-arm queue, mostly SME preliminaries.

In the unlikely event we don't land the rest of SME before freeze
for 7.1 we can revert the docs/property changes included here.

-- PMM

The following changes since commit 097ccbbbaf2681df1e65542e5b7d2b2d0c66e2bc:

  Merge tag 'qemu-sparc-20220626' of https://github.com/mcayland/qemu into staging (2022-06-27 05:21:05 +0530)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220627

for you to fetch changes up to 59e1b8a22ea9f947d038ccac784de1020f266e14:

  target/arm: Check V7VE as well as LPAE in arm_pamax (2022-06-27 11:18:17 +0100)

----------------------------------------------------------------
target-arm queue:
 * sphinx: change default language to 'en'
 * Diagnose attempts to emulate EL3 in hvf as well as kvm
 * More SME groundwork patches
 * virt: Fix calculation of physical address space size
   for v7VE CPUs (eg cortex-a15)

----------------------------------------------------------------
Alexander Graf (2):
      accel: Introduce current_accel_name()
      target/arm: Catch invalid kvm state also for hvf

Martin Liška (1):
      sphinx: change default language to 'en'

Richard Henderson (22):
      target/arm: Implement TPIDR2_EL0
      target/arm: Add SMEEXC_EL to TB flags
      target/arm: Add syn_smetrap
      target/arm: Add ARM_CP_SME
      target/arm: Add SVCR
      target/arm: Add SMCR_ELx
      target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2
      target/arm: Add PSTATE.{SM,ZA} to TB flags
      target/arm: Add the SME ZA storage to CPUARMState
      target/arm: Implement SMSTART, SMSTOP
      target/arm: Move error for sve%d property to arm_cpu_sve_finalize
      target/arm: Create ARMVQMap
      target/arm: Generalize cpu_arm_{get,set}_vq
      target/arm: Generalize cpu_arm_{get, set}_default_vec_len
      target/arm: Move arm_cpu_*_finalize to internals.h
      target/arm: Unexport aarch64_add_*_properties
      target/arm: Add cpu properties for SME
      target/arm: Introduce sve_vqm1_for_el_sm
      target/arm: Add SVL to TB flags
      target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h
      target/arm: Extend arm_pamax to more than aarch64
      target/arm: Check V7VE as well as LPAE in arm_pamax

 docs/conf.py                     |   2 +-
 docs/system/arm/cpu-features.rst |  56 ++++++++++
 include/qemu/accel.h             |   1 +
 target/arm/cpregs.h              |   5 +
 target/arm/cpu.h                 | 103 ++++++++++++++-----
 target/arm/helper-sme.h          |  21 ++++
 target/arm/helper.h              |   1 +
 target/arm/internals.h           |   4 +
 target/arm/syndrome.h            |  14 +++
 target/arm/translate-a64.h       |  38 +++++++
 target/arm/translate.h           |   6 ++
 accel/accel-common.c             |   8 ++
 hw/arm/virt.c                    |  10 +-
 softmmu/vl.c                     |   3 +-
 target/arm/cpu.c                 |  32 ++++--
 target/arm/cpu64.c               | 205 ++++++++++++++++++++++++++++---------
 target/arm/helper.c              | 213 +++++++++++++++++++++++++++++++++++++--
 target/arm/kvm64.c               |   2 +-
 target/arm/machine.c             |  34 +++++++
 target/arm/ptw.c                 |  26 +++--
 target/arm/sme_helper.c          |  61 +++++++++++
 target/arm/translate-a64.c       |  46 +++++++++
 target/arm/translate-sve.c       |  36 -------
 target/arm/meson.build           |   1 +
 24 files changed, 782 insertions(+), 146 deletions(-)
 create mode 100644 target/arm/helper-sme.h
 create mode 100644 target/arm/sme_helper.c


^ permalink raw reply	[flat|nested] 11+ messages in thread

* RE: [PULL 00/25] target-arm queue
  2020-07-14 14:55     ` Peter Maydell
@ 2020-07-14 15:03       ` Wu, Wentong
  0 siblings, 0 replies; 11+ messages in thread
From: Wu, Wentong @ 2020-07-14 15:03 UTC (permalink / raw)
  To: Peter Maydell; +Cc: QEMU Developers



> -----Original Message-----
> From: Peter Maydell <peter.maydell@linaro.org> 
> Sent: Tuesday, July 14, 2020 10:55 PM
> To: Wu, Wentong <wentong.wu@intel.com>
> Cc: QEMU Developers <qemu-devel@nongnu.org>
> Subject: Re: [PULL 00/25] target-arm queue
> 
> On Tue, 14 Jul 2020 at 15:52, Wu, Wentong <wentong.wu@intel.com> wrote:
> >
> > > On Mon, 13 Jul 2020 at 15:11, Peter Maydell <peter.maydell@linaro.org> wrote:
> > > > ----------------------------------------------------------------
> > > > target-arm queue:
> > > >  * hw/arm/bcm2836: Remove unused 'cpu_type' field
> > > >  * target/arm: Fix mtedesc for do_mem_zpz
> > > >  * Add the ability to change the FEC PHY MDIO device number on 
> > > > i.MX25/i.MX6/i.MX7
> > > >  * target/arm: Don't do raw writes for PMINTENCLR
> > > >  * virtio-iommu: Fix coverity issue in 
> > > > virtio_iommu_handle_command()
> > > >  * build: Fix various issues with building on Haiku
> > > >  * target/nios2: fix wrctl behaviour when using icount
> > > >  * hw/arm/tosa: Encapsulate misc GPIO handling in a device
> > > >  * hw/arm/palm.c: Encapsulate misc GPIO handling in a device
> > > >  * hw/arm/aspeed: Do not create and attach empty SD cards by 
> > > > default
> > >
> > >
> > > Applied, thanks.
> > >
> > > Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
> > > for any user-visible changes.
> >
> > Who will be responsible updating the changelog? Patch author or the 
> > person who has the special access for that wiki page?
> 
> Usually it's the person who sends the pullrequest (me in this case), unless they specifically ask a patch author to write some changelog text. In this case I didn't think anything in this set of patches needed a changelog entry except for the empty-SD-card change.

Thanks for the detail, I asked this because I don't want to break any working process in case patch author should do that. Now I understand it and no text worth adding, thanks again!

> If you think there's some text worth adding I can add it for you.
>
> The changelog wiki page, incidentally, can be edited by anybody with a wiki account. We don't have an automatic account-creation process because it was heavily hit by spammers, but anybody with an existing wiki account can create one for developers who want one.

> thanks
> -- PMM

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PULL 00/25] target-arm queue
  2020-07-14 14:52   ` Wu, Wentong
@ 2020-07-14 14:55     ` Peter Maydell
  2020-07-14 15:03       ` Wu, Wentong
  0 siblings, 1 reply; 11+ messages in thread
From: Peter Maydell @ 2020-07-14 14:55 UTC (permalink / raw)
  To: Wu, Wentong; +Cc: QEMU Developers

On Tue, 14 Jul 2020 at 15:52, Wu, Wentong <wentong.wu@intel.com> wrote:
>
> > On Mon, 13 Jul 2020 at 15:11, Peter Maydell <peter.maydell@linaro.org> wrote:
> > > ----------------------------------------------------------------
> > > target-arm queue:
> > >  * hw/arm/bcm2836: Remove unused 'cpu_type' field
> > >  * target/arm: Fix mtedesc for do_mem_zpz
> > >  * Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7
> > >  * target/arm: Don't do raw writes for PMINTENCLR
> > >  * virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
> > >  * build: Fix various issues with building on Haiku
> > >  * target/nios2: fix wrctl behaviour when using icount
> > >  * hw/arm/tosa: Encapsulate misc GPIO handling in a device
> > >  * hw/arm/palm.c: Encapsulate misc GPIO handling in a device
> > >  * hw/arm/aspeed: Do not create and attach empty SD cards by default
> >
> >
> > Applied, thanks.
> >
> > Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
> > for any user-visible changes.
>
> Who will be responsible updating the changelog? Patch author or
> the person who has the special access for that wiki page?

Usually it's the person who sends the pullrequest (me in this case),
unless they specifically ask a patch author to write some changelog
text. In this case I didn't think anything in this set of patches
needed a changelog entry except for the empty-SD-card change.
If you think there's some text worth adding I can add it for you.

The changelog wiki page, incidentally, can be edited by anybody
with a wiki account. We don't have an automatic account-creation
process because it was heavily hit by spammers, but anybody with
an existing wiki account can create one for developers who want one.

thanks
-- PMM


^ permalink raw reply	[flat|nested] 11+ messages in thread

* RE: [PULL 00/25] target-arm queue
  2020-07-13 15:58 ` Peter Maydell
@ 2020-07-14 14:52   ` Wu, Wentong
  2020-07-14 14:55     ` Peter Maydell
  0 siblings, 1 reply; 11+ messages in thread
From: Wu, Wentong @ 2020-07-14 14:52 UTC (permalink / raw)
  To: Peter Maydell, QEMU Developers



> -----Original Message-----
> From: Qemu-devel <qemu-devel-bounces+wentong.wu=intel.com@nongnu.org> On Behalf Of Peter Maydell
> Sent: Monday, July 13, 2020 11:59 PM
> To: QEMU Developers <qemu-devel@nongnu.org>
> Subject: Re: [PULL 00/25] target-arm queue
> 
> On Mon, 13 Jul 2020 at 15:11, Peter Maydell <peter.maydell@linaro.org> wrote:
> >
> > Last lot of target-arm changes to squeeze in before rc1:
> >  * various minor Arm bug fixes
> >  * David Carlier's Haiku build portability fixes
> >  * Wentong Wu's fixes for icount handling in the nios2 target
> >
> > The following changes since commit 00ce6c36b35e0eb8cc5d68a28f288a6335848813:
> >
> >   Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-07-13' into staging (2020-07-13 13:01:30 +0100)
> >
> > are available in the Git repository at:
> >
> >   https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200713
> >
> > for you to fetch changes up to 756f739b1682bf131994ec96dad7fbdf8b54493a:
> >
> >   hw/arm/aspeed: Do not create and attach empty SD cards by default (2020-07-13 14:36:12 +0100)
> >
> > ----------------------------------------------------------------
> > target-arm queue:
> >  * hw/arm/bcm2836: Remove unused 'cpu_type' field
> >  * target/arm: Fix mtedesc for do_mem_zpz
> >  * Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7
> >  * target/arm: Don't do raw writes for PMINTENCLR
> >  * virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
> >  * build: Fix various issues with building on Haiku
> >  * target/nios2: fix wrctl behaviour when using icount
> >  * hw/arm/tosa: Encapsulate misc GPIO handling in a device
> >  * hw/arm/palm.c: Encapsulate misc GPIO handling in a device
> >  * hw/arm/aspeed: Do not create and attach empty SD cards by default
>
>
> Applied, thanks.
> 
> Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
> for any user-visible changes.

Who will be responsible updating the changelog? Patch author or the person who has the special access for that wiki page?

Thanks

> -- PMM


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PULL 00/25] target-arm queue
  2020-07-13 14:10 Peter Maydell
@ 2020-07-13 15:58 ` Peter Maydell
  2020-07-14 14:52   ` Wu, Wentong
  0 siblings, 1 reply; 11+ messages in thread
From: Peter Maydell @ 2020-07-13 15:58 UTC (permalink / raw)
  To: QEMU Developers

On Mon, 13 Jul 2020 at 15:11, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> Last lot of target-arm changes to squeeze in before rc1:
>  * various minor Arm bug fixes
>  * David Carlier's Haiku build portability fixes
>  * Wentong Wu's fixes for icount handling in the nios2 target
>
> The following changes since commit 00ce6c36b35e0eb8cc5d68a28f288a6335848813:
>
>   Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-07-13' into staging (2020-07-13 13:01:30 +0100)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200713
>
> for you to fetch changes up to 756f739b1682bf131994ec96dad7fbdf8b54493a:
>
>   hw/arm/aspeed: Do not create and attach empty SD cards by default (2020-07-13 14:36:12 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * hw/arm/bcm2836: Remove unused 'cpu_type' field
>  * target/arm: Fix mtedesc for do_mem_zpz
>  * Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7
>  * target/arm: Don't do raw writes for PMINTENCLR
>  * virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
>  * build: Fix various issues with building on Haiku
>  * target/nios2: fix wrctl behaviour when using icount
>  * hw/arm/tosa: Encapsulate misc GPIO handling in a device
>  * hw/arm/palm.c: Encapsulate misc GPIO handling in a device
>  * hw/arm/aspeed: Do not create and attach empty SD cards by default


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
for any user-visible changes.

-- PMM


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PULL 00/25] target-arm queue
@ 2020-07-13 14:10 Peter Maydell
  2020-07-13 15:58 ` Peter Maydell
  0 siblings, 1 reply; 11+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
  To: qemu-devel

Last lot of target-arm changes to squeeze in before rc1:
 * various minor Arm bug fixes
 * David Carlier's Haiku build portability fixes
 * Wentong Wu's fixes for icount handling in the nios2 target

The following changes since commit 00ce6c36b35e0eb8cc5d68a28f288a6335848813:

  Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-07-13' into staging (2020-07-13 13:01:30 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200713

for you to fetch changes up to 756f739b1682bf131994ec96dad7fbdf8b54493a:

  hw/arm/aspeed: Do not create and attach empty SD cards by default (2020-07-13 14:36:12 +0100)

----------------------------------------------------------------
target-arm queue:
 * hw/arm/bcm2836: Remove unused 'cpu_type' field
 * target/arm: Fix mtedesc for do_mem_zpz
 * Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7
 * target/arm: Don't do raw writes for PMINTENCLR
 * virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
 * build: Fix various issues with building on Haiku
 * target/nios2: fix wrctl behaviour when using icount
 * hw/arm/tosa: Encapsulate misc GPIO handling in a device
 * hw/arm/palm.c: Encapsulate misc GPIO handling in a device
 * hw/arm/aspeed: Do not create and attach empty SD cards by default

----------------------------------------------------------------
Aaron Lindsay (1):
      target/arm: Don't do raw writes for PMINTENCLR

David CARLIER (8):
      build: Enable BSD symbols for Haiku
      util/qemu-openpty.c: Don't assume pty.h is glibc-only
      build: Check that mlockall() exists
      osdep.h: Always include <sys/signal.h> if it exists
      osdep.h: For Haiku, define SIGIO as equivalent to SIGPOLL
      bswap.h: Include <endian.h> on Haiku for bswap operations
      util/compatfd.c: Only include <sys/syscall.h> if CONFIG_SIGNALFD
      util/oslib-posix.c: Implement qemu_init_exec_dir() for Haiku

Eric Auger (1):
      virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()

Gerd Hoffmann (1):
      util/drm: make portable by avoiding struct dirent d_type

Jean-Christophe Dubois (3):
      Add the ability to change the FEC PHY MDIO device number on i.MX25 processor
      Add the ability to change the FEC PHY MDIO device number on i.MX6 processor
      Add the ability to change the FEC PHY MDIO devices numbers on i.MX7 processor

Peter Maydell (4):
      hw/arm/tosa.c: Detabify
      hw/arm/tosa: Encapsulate misc GPIO handling in a device
      hw/arm/palm.c: Detabify
      hw/arm/palm.c: Encapsulate misc GPIO handling in a device

Philippe Mathieu-Daudé (2):
      hw/arm/bcm2836: Remove unused 'cpu_type' field
      hw/arm/aspeed: Do not create and attach empty SD cards by default

Richard Henderson (1):
      target/arm: Fix mtedesc for do_mem_zpz

Wentong Wu (4):
      target/nios2: add DISAS_NORETURN case for nothing more to generate
      target/nios2: in line the semantics of DISAS_UPDATE with other targets
      target/nios2: Use gen_io_start around wrctl instruction
      hw/nios2: exit to main CPU loop only when unmasking interrupts

 configure                   |  38 ++++++++++++-
 include/hw/arm/bcm2836.h    |   1 -
 include/hw/arm/fsl-imx25.h  |   1 +
 include/hw/arm/fsl-imx6.h   |   1 +
 include/hw/arm/fsl-imx7.h   |   1 +
 include/qemu/bswap.h        |   2 +
 include/qemu/osdep.h        |   6 +-
 hw/arm/aspeed.c             |   9 +--
 hw/arm/fsl-imx25.c          |   7 +++
 hw/arm/fsl-imx6.c           |   7 +++
 hw/arm/fsl-imx7.c           |   9 +++
 hw/arm/palm.c               | 111 +++++++++++++++++++++++++------------
 hw/arm/tosa.c               | 132 +++++++++++++++++++++++++++++---------------
 hw/nios2/cpu_pic.c          |   3 +-
 hw/virtio/virtio-iommu.c    |   1 +
 hw/xen/xen-legacy-backend.c |   1 -
 os-posix.c                  |   4 ++
 target/arm/helper.c         |   4 +-
 target/arm/translate-sve.c  |   2 +-
 target/nios2/translate.c    |  12 +++-
 util/compatfd.c             |   2 +
 util/drm.c                  |  19 +++++--
 util/oslib-posix.c          |  20 ++++++-
 util/qemu-openpty.c         |   2 +-
 24 files changed, 292 insertions(+), 103 deletions(-)


^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2023-02-27 16:19 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-16 13:35 [PULL 00/25] target-arm queue Peter Maydell
2021-06-16 19:16 ` Peter Maydell
  -- strict thread matches above, loose matches on Subject: below --
2023-02-27 14:00 Peter Maydell
2023-02-27 16:18 ` Peter Maydell
2022-06-27 10:22 Peter Maydell
2022-06-27 22:55 ` Richard Henderson
2020-07-13 14:10 Peter Maydell
2020-07-13 15:58 ` Peter Maydell
2020-07-14 14:52   ` Wu, Wentong
2020-07-14 14:55     ` Peter Maydell
2020-07-14 15:03       ` Wu, Wentong

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.