From: Dan Carpenter <dan.carpenter@oracle.com>
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc: "linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>
Subject: Re: [bug report] clk: renesas: Add CPG core wrapper for RZ/G2L SoC
Date: Thu, 17 Jun 2021 17:43:12 +0300 [thread overview]
Message-ID: <20210617144312.GQ1901@kadam> (raw)
In-Reply-To: <OSZPR01MB7019B7DD71AB6E3FE04AE51CAA0E9@OSZPR01MB7019.jpnprd01.prod.outlook.com>
On Thu, Jun 17, 2021 at 02:14:06PM +0000, Prabhakar Mahadev Lad wrote:
> > 223 dev_err(dev, "Invalid %s clock index %u\n", type, clkidx);
> > 224 return ERR_PTR(-EINVAL);
> > 225 }
> > 226 clk = priv->clks[clkidx];
> > 227 break;
> > 228
> > 229 case CPG_MOD:
> > 230 type = "module";
> > 231 if (clkidx > priv->num_mod_clks) {
> > ^^^^^^^^^^^^^^^^^^^^^^^^^^^
> >
> > Smatch did not catch it, but this condition is definitely off by one. ;)
> >
> Good catch this definitely needs to be if (clkidx > (priv->num_mod_clks - 1)
The size - 1 format is riskier because there is a potential for
underflow.
Imagine that in the future priv->num_mod_clks is zero.
"priv->num_mod_clks - 1" is now UINT_MAX and any value of "clkidx" is
accepted. In this case, you know that the value of num_mod_clks if 57
but it took me some time to figure that out and ensure that it couldn't
be zero.
regards,
dan carpenter
next prev parent reply other threads:[~2021-06-17 14:43 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-17 13:37 [bug report] clk: renesas: Add CPG core wrapper for RZ/G2L SoC Dan Carpenter
2021-06-17 14:14 ` Prabhakar Mahadev Lad
2021-06-17 14:43 ` Dan Carpenter [this message]
2021-06-17 14:55 ` Prabhakar Mahadev Lad
-- strict thread matches above, loose matches on Subject: below --
2021-06-17 12:02 Dan Carpenter
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