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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH 7/9] target/mips: Remove microMIPS BPOSGE32 / BPOSGE64 unuseful cases
Date: Thu, 17 Jun 2021 19:43:21 +0200	[thread overview]
Message-ID: <20210617174323.2900831-8-f4bug@amsat.org> (raw)
In-Reply-To: <20210617174323.2900831-1-f4bug@amsat.org>

These switch cases for the microMIPS BPOSGE32 / BPOSGE64 opcodes have
been added commit 3c824109da0 ("target-mips: microMIPS ASE support").
More than 11 years later it is safe to assume there won't be added
soon. The cases fall back to the default which generates a RESERVED
INSTRUCTION, so it is safe to remove them.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/tcg/translate.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 47c7705f051..5d571d83c54 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -14077,8 +14077,6 @@ enum {
     BGEZALS = 0x13,
     BC2F = 0x14,
     BC2T = 0x15,
-    BPOSGE64 = 0x1a,
-    BPOSGE32 = 0x1b,
     /* These overlap and are distinguished by bit16 of the instruction */
     BC1F = 0x1c,
     BC1T = 0x1d,
@@ -16122,10 +16120,6 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx)
                 generate_exception_err(ctx, EXCP_CpU, 1);
             }
             break;
-        case BPOSGE64:
-        case BPOSGE32:
-            /* MIPS DSP: not implemented */
-            /* Fall through */
         default:
             MIPS_INVAL("pool32i");
             gen_reserved_instruction(ctx);
-- 
2.31.1



  parent reply	other threads:[~2021-06-17 17:48 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-17 17:43 [PATCH 0/9] target/mips: Various fixes & cleanups Philippe Mathieu-Daudé
2021-06-17 17:43 ` [PATCH 1/9] target/mips: Do not abort on invalid instruction Philippe Mathieu-Daudé
2021-06-18 22:30   ` Richard Henderson
2021-06-17 17:43 ` [PATCH 2/9] target/mips: Fix more TCG temporary leaks in gen_pool32a5_nanomips_insn Philippe Mathieu-Daudé
2021-06-18 22:32   ` Richard Henderson
2021-06-17 17:43 ` [PATCH 3/9] target/mips: Move TCG trace events to tcg/ sub directory Philippe Mathieu-Daudé
2021-06-18 22:32   ` Richard Henderson
2021-06-17 17:43 ` [PATCH 4/9] target/mips: Move translate.h " Philippe Mathieu-Daudé
2021-06-18 22:34   ` Richard Henderson
2021-06-17 17:43 ` [PATCH 5/9] target/mips: Restrict some system specific declarations to sysemu Philippe Mathieu-Daudé
2021-06-18 22:38   ` Richard Henderson
2021-06-19 14:44     ` Philippe Mathieu-Daudé
2021-06-17 17:43 ` [PATCH 6/9] target/mips: Remove SmartMIPS / MDMX unuseful comments Philippe Mathieu-Daudé
2021-06-18 22:39   ` Richard Henderson
2021-06-17 17:43 ` Philippe Mathieu-Daudé [this message]
2021-06-18  9:44   ` [PATCH 7/9] target/mips: Remove microMIPS BPOSGE32 / BPOSGE64 unuseful cases Philippe Mathieu-Daudé
2021-06-18 22:40   ` Richard Henderson
2021-06-17 17:43 ` [PATCH 8/9] target/mips: Constify host_to_mips_errno[] Philippe Mathieu-Daudé
2021-06-18 22:40   ` Richard Henderson
2021-06-17 17:43 ` [PATCH 9/9] target/mips: Optimize regnames[] arrays Philippe Mathieu-Daudé
2021-06-18 22:42   ` Richard Henderson
2021-06-19 18:05 ` [PATCH 0/9] target/mips: Various fixes & cleanups Philippe Mathieu-Daudé

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