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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 1/7] target/arm/translate-vfp.c: Whitespace fixes
Date: Fri, 18 Jun 2021 15:10:13 +0100	[thread overview]
Message-ID: <20210618141019.10671-2-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210618141019.10671-1-peter.maydell@linaro.org>

In the code for handling VFP system register accesses there is some
stray whitespace after a unary '-' operator, and also some incorrect
indent in a couple of function prototypes.  We're about to move this
code to another file, so fix the code style issues first so
checkpatch doesn't complain about the code-movement patch.

Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/translate-vfp.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/target/arm/translate-vfp.c b/target/arm/translate-vfp.c
index 01e26a246d6..5a4a13ec1e1 100644
--- a/target/arm/translate-vfp.c
+++ b/target/arm/translate-vfp.c
@@ -771,9 +771,8 @@ static void gen_branch_fpInactive(DisasContext *s, TCGCond cond,
 }
 
 static bool gen_M_fp_sysreg_write(DisasContext *s, int regno,
-
                                   fp_sysreg_loadfn *loadfn,
-                                 void *opaque)
+                                  void *opaque)
 {
     /* Do a write to an M-profile floating point system register */
     TCGv_i32 tmp;
@@ -874,8 +873,8 @@ static bool gen_M_fp_sysreg_write(DisasContext *s, int regno,
 }
 
 static bool gen_M_fp_sysreg_read(DisasContext *s, int regno,
-                                fp_sysreg_storefn *storefn,
-                                void *opaque)
+                                 fp_sysreg_storefn *storefn,
+                                 void *opaque)
 {
     /* Do a read from an M-profile floating point system register */
     TCGv_i32 tmp;
@@ -1207,7 +1206,7 @@ static void fp_sysreg_to_memory(DisasContext *s, void *opaque, TCGv_i32 value)
     TCGv_i32 addr;
 
     if (!a->a) {
-        offset = - offset;
+        offset = -offset;
     }
 
     addr = load_reg(s, a->rn);
@@ -1242,7 +1241,7 @@ static TCGv_i32 memory_to_fp_sysreg(DisasContext *s, void *opaque)
     TCGv_i32 value = tcg_temp_new_i32();
 
     if (!a->a) {
-        offset = - offset;
+        offset = -offset;
     }
 
     addr = load_reg(s, a->rn);
-- 
2.20.1



  reply	other threads:[~2021-06-18 14:18 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-18 14:10 [PATCH 0/7] target/arm: Fix FPCXT_NS accesses when FPU disabled Peter Maydell
2021-06-18 14:10 ` Peter Maydell [this message]
2021-06-18 15:07   ` [PATCH 1/7] target/arm/translate-vfp.c: Whitespace fixes Richard Henderson
2021-06-18 14:10 ` [PATCH 2/7] target/arm: Handle FPU being disabled in FPCXT_NS accesses Peter Maydell
2021-06-18 15:10   ` Richard Henderson
2021-06-18 14:10 ` [PATCH 3/7] target/arm: Don't NOCP fault for " Peter Maydell
2021-06-18 15:29   ` Richard Henderson
2021-06-18 14:10 ` [PATCH 4/7] target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access Peter Maydell
2021-06-18 16:15   ` Richard Henderson
2021-06-18 16:54     ` Peter Maydell
2021-06-18 14:10 ` [PATCH 5/7] target/arm: Factor FP context update code out into helper function Peter Maydell
2021-06-18 16:20   ` Richard Henderson
2021-06-18 14:10 ` [PATCH 6/7] target/arm: Split vfp_access_check() into A and M versions Peter Maydell
2021-06-18 16:23   ` Richard Henderson
2021-06-18 14:10 ` [PATCH 7/7] target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m() Peter Maydell
2021-06-18 16:25   ` Richard Henderson

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