* [PATCH 09/12] drm/amd/display: Revert "Guard ASSR with internal display flag"
@ 2021-06-18 18:37 Bindu Ramamurthy
2021-06-18 18:37 ` [PATCH 10/12] drm/amd/display: do not compare integers of different widths Bindu Ramamurthy
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Bindu Ramamurthy @ 2021-06-18 18:37 UTC (permalink / raw)
To: amd-gfx
Cc: Stylon Wang, Wesley Chalmers, Eryk.Brol, Sunpeng.Li,
Harry.Wentland, Qingqing.Zhuo, Rodrigo.Siqueira, Anson.Jacob,
Aurabindo.Pillai, Bhawanpreet.Lakha, bindu.r
From: Stylon Wang <stylon.wang@amd.com>
[Why]
1. Previous patch regresses on some embedded panels.
2. Project coreboot doesn't support passing of internal display flag.
[How]
This reverts "Guard ASSR with internal display flag" commit.
Signed-off-by: Stylon Wang <stylon.wang@amd.com>
Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
---
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 58 ++++++-------------
1 file changed, 17 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 4326ac577756..10b749ef7fbb 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1760,42 +1760,6 @@ enum link_training_result dc_link_dp_perform_link_training(
return status;
}
-static enum dp_panel_mode try_enable_assr(struct dc_stream_state *stream)
-{
- struct dc_link *link = stream->link;
- enum dp_panel_mode panel_mode = dp_get_panel_mode(link);
-#ifdef CONFIG_DRM_AMD_DC_HDCP
- struct cp_psp *cp_psp = &stream->ctx->cp_psp;
-#endif
-
- /* ASSR must be supported on the panel */
- if (panel_mode == DP_PANEL_MODE_DEFAULT)
- return panel_mode;
-
- /* eDP or internal DP only */
- if (link->connector_signal != SIGNAL_TYPE_EDP &&
- !(link->connector_signal == SIGNAL_TYPE_DISPLAY_PORT &&
- link->is_internal_display))
- return DP_PANEL_MODE_DEFAULT;
-
-#ifdef CONFIG_DRM_AMD_DC_HDCP
- if (cp_psp && cp_psp->funcs.enable_assr) {
- if (!cp_psp->funcs.enable_assr(cp_psp->handle, link)) {
- /* since eDP implies ASSR on, change panel
- * mode to disable ASSR
- */
- panel_mode = DP_PANEL_MODE_DEFAULT;
- }
- } else
- panel_mode = DP_PANEL_MODE_DEFAULT;
-
-#else
- /* turn off ASSR if the implementation is not compiled in */
- panel_mode = DP_PANEL_MODE_DEFAULT;
-#endif
- return panel_mode;
-}
-
bool perform_link_training_with_retries(
const struct dc_link_settings *link_setting,
bool skip_video_pattern,
@@ -1808,7 +1772,7 @@ bool perform_link_training_with_retries(
uint8_t delay_between_attempts = LINK_TRAINING_RETRY_DELAY;
struct dc_stream_state *stream = pipe_ctx->stream;
struct dc_link *link = stream->link;
- enum dp_panel_mode panel_mode;
+ enum dp_panel_mode panel_mode = dp_get_panel_mode(link);
struct link_encoder *link_enc;
enum link_training_result status = LINK_TRAINING_CR_FAIL_LANE0;
struct dc_link_settings current_setting = *link_setting;
@@ -1845,11 +1809,23 @@ bool perform_link_training_with_retries(
msleep(delay_dp_power_up_in_ms);
}
- panel_mode = try_enable_assr(stream);
+#ifdef CONFIG_DRM_AMD_DC_HDCP
+ if (panel_mode == DP_PANEL_MODE_EDP) {
+ struct cp_psp *cp_psp = &stream->ctx->cp_psp;
+
+ if (cp_psp && cp_psp->funcs.enable_assr) {
+ if (!cp_psp->funcs.enable_assr(cp_psp->handle, link)) {
+ /* since eDP implies ASSR on, change panel
+ * mode to disable ASSR
+ */
+ panel_mode = DP_PANEL_MODE_DEFAULT;
+ }
+ } else
+ panel_mode = DP_PANEL_MODE_DEFAULT;
+ }
+#endif
+
dp_set_panel_mode(link, panel_mode);
- DC_LOG_DETECTION_DP_CAPS("Link: %d ASSR enabled: %d\n",
- link->link_index,
- panel_mode != DP_PANEL_MODE_DEFAULT);
if (link->aux_access_disabled) {
dc_link_dp_perform_link_training_skip_aux(link, ¤t_setting);
--
2.25.1
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 10/12] drm/amd/display: do not compare integers of different widths
2021-06-18 18:37 [PATCH 09/12] drm/amd/display: Revert "Guard ASSR with internal display flag" Bindu Ramamurthy
@ 2021-06-18 18:37 ` Bindu Ramamurthy
2021-06-18 18:37 ` [PATCH 11/12] drm/amd/display: [FW Promotion] Release 0.0.71 Bindu Ramamurthy
2021-06-18 18:37 ` [PATCH 12/12] drm/amd/display: 3.2.141 Bindu Ramamurthy
2 siblings, 0 replies; 4+ messages in thread
From: Bindu Ramamurthy @ 2021-06-18 18:37 UTC (permalink / raw)
To: amd-gfx
Cc: Josip Pavic, Eryk.Brol, Sunpeng.Li, Harry.Wentland,
Qingqing.Zhuo, Rodrigo.Siqueira, Aric Cyr, Anson.Jacob,
Aurabindo.Pillai, Bhawanpreet.Lakha, bindu.r
From: Josip Pavic <Josip.Pavic@amd.com>
[Why & How]
Increase width of some variables to avoid comparing integers of
different widths
Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +-
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 9058e45add92..a033bec2cc4c 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -821,7 +821,7 @@ static bool dc_link_detect_helper(struct dc_link *link,
{
struct dc_sink_init_data sink_init_data = { 0 };
struct display_sink_capability sink_caps = { 0 };
- uint8_t i;
+ uint32_t i;
bool converter_disable_audio = false;
struct audio_support *aud_support = &link->dc->res_pool->audio_support;
bool same_edid = false;
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 10b749ef7fbb..6af6247ae055 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1768,7 +1768,7 @@ bool perform_link_training_with_retries(
enum signal_type signal,
bool do_fallback)
{
- uint8_t j;
+ int j;
uint8_t delay_between_attempts = LINK_TRAINING_RETRY_DELAY;
struct dc_stream_state *stream = pipe_ctx->stream;
struct dc_link *link = stream->link;
@@ -2307,7 +2307,7 @@ bool dp_verify_link_cap_with_retries(
struct dc_link_settings *known_limit_link_setting,
int attempts)
{
- uint8_t i = 0;
+ int i = 0;
bool success = false;
for (i = 0; i < attempts; i++) {
--
2.25.1
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 11/12] drm/amd/display: [FW Promotion] Release 0.0.71
2021-06-18 18:37 [PATCH 09/12] drm/amd/display: Revert "Guard ASSR with internal display flag" Bindu Ramamurthy
2021-06-18 18:37 ` [PATCH 10/12] drm/amd/display: do not compare integers of different widths Bindu Ramamurthy
@ 2021-06-18 18:37 ` Bindu Ramamurthy
2021-06-18 18:37 ` [PATCH 12/12] drm/amd/display: 3.2.141 Bindu Ramamurthy
2 siblings, 0 replies; 4+ messages in thread
From: Bindu Ramamurthy @ 2021-06-18 18:37 UTC (permalink / raw)
To: amd-gfx
Cc: Anthony Koo, Eryk.Brol, Sunpeng.Li, Harry.Wentland,
Qingqing.Zhuo, Rodrigo.Siqueira, Anson.Jacob, Aurabindo.Pillai,
Bhawanpreet.Lakha, bindu.r
From: Anthony Koo <Anthony.Koo@amd.com>
- Introduce CMD for EDID CEA block parsing
- Add SCR5 definition for reporting eDP power sequencer status
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 90 ++++++++++++++++++-
1 file changed, 88 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 18d2f51eb50d..707c7d0e370a 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -47,10 +47,10 @@
/* Firmware versioning. */
#ifdef DMUB_EXPOSE_VERSION
-#define DMUB_FW_VERSION_GIT_HASH 0x5cac099d3
+#define DMUB_FW_VERSION_GIT_HASH 0xf3da2b656
#define DMUB_FW_VERSION_MAJOR 0
#define DMUB_FW_VERSION_MINOR 0
-#define DMUB_FW_VERSION_REVISION 70
+#define DMUB_FW_VERSION_REVISION 71
#define DMUB_FW_VERSION_TEST 0
#define DMUB_FW_VERSION_VBIOS 0
#define DMUB_FW_VERSION_HOTFIX 0
@@ -309,6 +309,7 @@ struct dmcub_trace_buf_entry {
* Current scratch register usage is as follows:
*
* SCRATCH0: FW Boot Status register
+ * SCRATCH5: LVTMA Status Register
* SCRATCH15: FW Boot Options register
*/
@@ -335,6 +336,21 @@ enum dmub_fw_boot_status_bit {
DMUB_FW_BOOT_STATUS_BIT_RESTORE_REQUIRED = (1 << 3), /**< 1 if driver should call restore */
};
+/* Register bit definition for SCRATCH5 */
+union dmub_lvtma_status {
+ struct {
+ uint32_t psp_ok : 1;
+ uint32_t edp_on : 1;
+ uint32_t reserved : 30;
+ } bits;
+ uint32_t all;
+};
+
+enum dmub_lvtma_status_bit {
+ DMUB_LVTMA_STATUS_BIT_PSP_OK = (1 << 0),
+ DMUB_LVTMA_STATUS_BIT_EDP_ON = (1 << 1),
+};
+
/**
* union dmub_fw_boot_options - Boot option definitions for SCRATCH15
*/
@@ -629,6 +645,10 @@ enum dmub_cmd_type {
*/
DMUB_CMD__PANEL_CNTL = 74,
#endif
+ /**
+ * Command type used for EDID CEA parsing
+ */
+ DMUB_CMD__EDID_CEA = 79,
/**
* Command type used for all VBIOS interface commands.
*/
@@ -2152,6 +2172,68 @@ struct dmub_rb_cmd_lvtma_control {
struct dmub_cmd_lvtma_control_data data;
};
+/**
+ * Maximum number of bytes a chunk sent to DMUB for parsing
+ */
+#define DMUB_EDID_CEA_DATA_CHUNK_BYTES 8
+
+/**
+ * Represent a chunk of CEA blocks sent to DMUB for parsing
+ */
+struct dmub_cmd_send_edid_cea {
+ uint16_t offset; /**< offset into the CEA block */
+ uint8_t length; /**< number of bytes in payload to copy as part of CEA block */
+ uint16_t total_length; /**< total length of the CEA block */
+ uint8_t payload[DMUB_EDID_CEA_DATA_CHUNK_BYTES]; /**< data chunk of the CEA block */
+ uint8_t pad[3]; /**< padding and for future expansion */
+};
+
+/**
+ * Result of VSDB parsing from CEA block
+ */
+struct dmub_cmd_edid_cea_amd_vsdb {
+ uint8_t vsdb_found; /**< 1 if parsing has found valid AMD VSDB */
+ uint8_t freesync_supported; /**< 1 if Freesync is supported */
+ uint16_t amd_vsdb_version; /**< AMD VSDB version */
+ uint16_t min_frame_rate; /**< Maximum frame rate */
+ uint16_t max_frame_rate; /**< Minimum frame rate */
+};
+
+/**
+ * Result of sending a CEA chunk
+ */
+struct dmub_cmd_edid_cea_ack {
+ uint16_t offset; /**< offset of the chunk into the CEA block */
+ uint8_t success; /**< 1 if this sending of chunk succeeded */
+ uint8_t pad; /**< padding and for future expansion */
+};
+
+/**
+ * Specify whether the result is an ACK/NACK or the parsing has finished
+ */
+enum dmub_cmd_edid_cea_reply_type {
+ DMUB_CMD__EDID_CEA_AMD_VSDB = 1, /**< VSDB parsing has finished */
+ DMUB_CMD__EDID_CEA_ACK = 2, /**< acknowledges the CEA sending is OK or failing */
+};
+
+/**
+ * Definition of a DMUB_CMD__EDID_CEA command.
+ */
+struct dmub_rb_cmd_edid_cea {
+ struct dmub_cmd_header header; /**< Command header */
+ union dmub_cmd_edid_cea_data {
+ struct dmub_cmd_send_edid_cea input; /**< input to send CEA chunks */
+ struct dmub_cmd_edid_cea_output { /**< output with results */
+ uint8_t type; /**< dmub_cmd_edid_cea_reply_type */
+ union {
+ struct dmub_cmd_edid_cea_amd_vsdb amd_vsdb;
+ struct dmub_cmd_edid_cea_ack ack;
+ };
+ } output; /**< output to retrieve ACK/NACK or VSDB parsing results */
+ } data; /**< Command data */
+
+};
+
/**
* union dmub_rb_cmd - DMUB inbox command.
*/
@@ -2290,6 +2372,10 @@ union dmub_rb_cmd {
* Definition of a DMUB_CMD__VBIOS_LVTMA_CONTROL command.
*/
struct dmub_rb_cmd_lvtma_control lvtma_control;
+ /**
+ * Definition of a DMUB_CMD__EDID_CEA command.
+ */
+ struct dmub_rb_cmd_edid_cea edid_cea;
};
/**
--
2.25.1
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 12/12] drm/amd/display: 3.2.141
2021-06-18 18:37 [PATCH 09/12] drm/amd/display: Revert "Guard ASSR with internal display flag" Bindu Ramamurthy
2021-06-18 18:37 ` [PATCH 10/12] drm/amd/display: do not compare integers of different widths Bindu Ramamurthy
2021-06-18 18:37 ` [PATCH 11/12] drm/amd/display: [FW Promotion] Release 0.0.71 Bindu Ramamurthy
@ 2021-06-18 18:37 ` Bindu Ramamurthy
2 siblings, 0 replies; 4+ messages in thread
From: Bindu Ramamurthy @ 2021-06-18 18:37 UTC (permalink / raw)
To: amd-gfx
Cc: Aric Cyr, Eryk.Brol, Sunpeng.Li, Harry.Wentland, Qingqing.Zhuo,
Rodrigo.Siqueira, Anson.Jacob, Aurabindo.Pillai,
Bhawanpreet.Lakha, bindu.r
From: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 9d924e8496f9..7674535654ec 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -45,7 +45,7 @@
/* forward declaration */
struct aux_payload;
-#define DC_VER "3.2.140"
+#define DC_VER "3.2.141"
#define MAX_SURFACES 3
#define MAX_PLANES 6
--
2.25.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-06-18 18:38 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-18 18:37 [PATCH 09/12] drm/amd/display: Revert "Guard ASSR with internal display flag" Bindu Ramamurthy
2021-06-18 18:37 ` [PATCH 10/12] drm/amd/display: do not compare integers of different widths Bindu Ramamurthy
2021-06-18 18:37 ` [PATCH 11/12] drm/amd/display: [FW Promotion] Release 0.0.71 Bindu Ramamurthy
2021-06-18 18:37 ` [PATCH 12/12] drm/amd/display: 3.2.141 Bindu Ramamurthy
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