From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F03E1C49EA5 for ; Mon, 21 Jun 2021 14:24:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DB7D760FF2 for ; Mon, 21 Jun 2021 14:24:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230239AbhFUO0f (ORCPT ); Mon, 21 Jun 2021 10:26:35 -0400 Received: from foss.arm.com ([217.140.110.172]:35400 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229747AbhFUO0c (ORCPT ); Mon, 21 Jun 2021 10:26:32 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DE8FBD6E; Mon, 21 Jun 2021 07:24:17 -0700 (PDT) Received: from lpieralisi (e121166-lin.cambridge.arm.com [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8C9C93F694; Mon, 21 Jun 2021 07:24:16 -0700 (PDT) Date: Mon, 21 Jun 2021 15:24:14 +0100 From: Lorenzo Pieralisi To: Richard Zhu Cc: l.stach@pengutronix.de, kw@linux.com, bhelgaas@google.com, stefan@agner.ch, linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Subject: Re: [PATCH v2] PCI: imx6: Limit DBI register length for imx6qp PCIe Message-ID: <20210621142414.GB27516@lpieralisi> References: <1613789388-2495-1-git-send-email-hongxing.zhu@nxp.com> <1613789388-2495-2-git-send-email-hongxing.zhu@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1613789388-2495-2-git-send-email-hongxing.zhu@nxp.com> User-Agent: Mutt/1.9.4 (2018-02-28) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Feb 20, 2021 at 10:49:48AM +0800, Richard Zhu wrote: > Define the length of the DBI registers and limit config space to its > length. This makes sure that the kernel does not access registers beyond > that point that otherwise would lead to an abort on the i.MX 6QuadPlus. > > See commit 075af61c19cd ("PCI: imx6: Limit DBI register length") that > resolves a similar issue on the i.MX 6Quad PCIe. > > Signed-off-by: Richard Zhu > Reviewed-by: Lucas Stach > Reviewed-by: Krzysztof Wilczyński > --- > drivers/pci/controller/dwc/pci-imx6.c | 1 + > 1 file changed, 1 insertion(+) I'd like to merge this patch since I believe it is still required, please let me know if that's not the case. Lorenzo > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 0cf1333c0440..853ea8e82952 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -1175,6 +1175,7 @@ static const struct imx6_pcie_drvdata drvdata[] = { > .variant = IMX6QP, > .flags = IMX6_PCIE_FLAG_IMX6_PHY | > IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE, > + .dbi_length = 0x200, > }, > [IMX7D] = { > .variant = IMX7D, > -- > 2.17.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.6 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD8C3C4743C for ; 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Mon, 21 Jun 2021 07:24:16 -0700 (PDT) Date: Mon, 21 Jun 2021 15:24:14 +0100 From: Lorenzo Pieralisi To: Richard Zhu Cc: l.stach@pengutronix.de, kw@linux.com, bhelgaas@google.com, stefan@agner.ch, linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Subject: Re: [PATCH v2] PCI: imx6: Limit DBI register length for imx6qp PCIe Message-ID: <20210621142414.GB27516@lpieralisi> References: <1613789388-2495-1-git-send-email-hongxing.zhu@nxp.com> <1613789388-2495-2-git-send-email-hongxing.zhu@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1613789388-2495-2-git-send-email-hongxing.zhu@nxp.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210621_072420_623376_9B4246F9 X-CRM114-Status: GOOD ( 17.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gU2F0LCBGZWIgMjAsIDIwMjEgYXQgMTA6NDk6NDhBTSArMDgwMCwgUmljaGFyZCBaaHUgd3Jv dGU6Cj4gRGVmaW5lIHRoZSBsZW5ndGggb2YgdGhlIERCSSByZWdpc3RlcnMgYW5kIGxpbWl0IGNv bmZpZyBzcGFjZSB0byBpdHMKPiBsZW5ndGguIFRoaXMgbWFrZXMgc3VyZSB0aGF0IHRoZSBrZXJu ZWwgZG9lcyBub3QgYWNjZXNzIHJlZ2lzdGVycyBiZXlvbmQKPiB0aGF0IHBvaW50IHRoYXQgb3Ro ZXJ3aXNlIHdvdWxkIGxlYWQgdG8gYW4gYWJvcnQgb24gdGhlIGkuTVggNlF1YWRQbHVzLgo+IAo+ IFNlZSBjb21taXQgMDc1YWY2MWMxOWNkICgiUENJOiBpbXg2OiBMaW1pdCBEQkkgcmVnaXN0ZXIg bGVuZ3RoIikgdGhhdAo+IHJlc29sdmVzIGEgc2ltaWxhciBpc3N1ZSBvbiB0aGUgaS5NWCA2UXVh ZCBQQ0llLgo+IAo+IFNpZ25lZC1vZmYtYnk6IFJpY2hhcmQgWmh1IDxob25neGluZy56aHVAbnhw LmNvbT4KPiBSZXZpZXdlZC1ieTogTHVjYXMgU3RhY2ggPGwuc3RhY2hAcGVuZ3V0cm9uaXguZGU+ Cj4gUmV2aWV3ZWQtYnk6IEtyenlzenRvZiBXaWxjennFhHNraSA8a3dAbGludXguY29tPgo+IC0t LQo+ICBkcml2ZXJzL3BjaS9jb250cm9sbGVyL2R3Yy9wY2ktaW14Ni5jIHwgMSArCj4gIDEgZmls ZSBjaGFuZ2VkLCAxIGluc2VydGlvbigrKQoKSSdkIGxpa2UgdG8gbWVyZ2UgdGhpcyBwYXRjaCBz aW5jZSBJIGJlbGlldmUgaXQgaXMgc3RpbGwgcmVxdWlyZWQsCnBsZWFzZSBsZXQgbWUga25vdyBp ZiB0aGF0J3Mgbm90IHRoZSBjYXNlLgoKTG9yZW56bwoKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9w Y2kvY29udHJvbGxlci9kd2MvcGNpLWlteDYuYyBiL2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvZHdj L3BjaS1pbXg2LmMKPiBpbmRleCAwY2YxMzMzYzA0NDAuLjg1M2VhOGU4Mjk1MiAxMDA2NDQKPiAt LS0gYS9kcml2ZXJzL3BjaS9jb250cm9sbGVyL2R3Yy9wY2ktaW14Ni5jCj4gKysrIGIvZHJpdmVy cy9wY2kvY29udHJvbGxlci9kd2MvcGNpLWlteDYuYwo+IEBAIC0xMTc1LDYgKzExNzUsNyBAQCBz dGF0aWMgY29uc3Qgc3RydWN0IGlteDZfcGNpZV9kcnZkYXRhIGRydmRhdGFbXSA9IHsKPiAgCQku dmFyaWFudCA9IElNWDZRUCwKPiAgCQkuZmxhZ3MgPSBJTVg2X1BDSUVfRkxBR19JTVg2X1BIWSB8 Cj4gIAkJCSBJTVg2X1BDSUVfRkxBR19JTVg2X1NQRUVEX0NIQU5HRSwKPiArCQkuZGJpX2xlbmd0 aCA9IDB4MjAwLAo+ICAJfSwKPiAgCVtJTVg3RF0gPSB7Cj4gIAkJLnZhcmlhbnQgPSBJTVg3RCwK PiAtLSAKPiAyLjE3LjEKPiAKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxA bGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xp c3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK