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From: Anusha Srivatsa <anusha.srivatsa@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [CI 4/4] drm/i915/adl_p: Load DMC
Date: Mon, 21 Jun 2021 12:14:15 -0700	[thread overview]
Message-ID: <20210621191415.29823-5-anusha.srivatsa@intel.com> (raw)
In-Reply-To: <20210621191415.29823-1-anusha.srivatsa@intel.com>

Load DMC v2.10 on ADLP. The release notes mention that
this version enables few power savings features.

v2: Add DMC_PATH() for ADLP (Lucas)

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dmc.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 18e0d225a478..f8789d4543bf 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -45,6 +45,10 @@
 
 #define GEN12_DMC_MAX_FW_SIZE		ICL_DMC_MAX_FW_SIZE
 
+#define ADLP_DMC_PATH			DMC_PATH(adlp, 2, 10)
+#define ADLP_DMC_VERSION_REQUIRED	DMC_VERSION(2, 10)
+MODULE_FIRMWARE(ADLP_DMC_PATH);
+
 #define ADLS_DMC_PATH			DMC_PATH(adls, 2, 01)
 #define ADLS_DMC_VERSION_REQUIRED	DMC_VERSION(2, 1)
 MODULE_FIRMWARE(ADLS_DMC_PATH);
@@ -724,7 +728,11 @@ void intel_dmc_ucode_init(struct drm_i915_private *dev_priv)
 	 */
 	intel_dmc_runtime_pm_get(dev_priv);
 
-	if (IS_ALDERLAKE_S(dev_priv)) {
+	if (IS_ALDERLAKE_P(dev_priv)) {
+		dmc->fw_path = ADLP_DMC_PATH;
+		dmc->required_version = ADLP_DMC_VERSION_REQUIRED;
+		dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE;
+	} else if (IS_ALDERLAKE_S(dev_priv)) {
 		dmc->fw_path = ADLS_DMC_PATH;
 		dmc->required_version = ADLS_DMC_VERSION_REQUIRED;
 		dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE;
-- 
2.32.0

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  parent reply	other threads:[~2021-06-21 19:14 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-21 19:14 [Intel-gfx] [CI 0/4] Pipe DMC bits Anusha Srivatsa
2021-06-21 19:14 ` [Intel-gfx] [CI 1/4] drm/i915/dmc: Introduce DMC_FW_MAIN Anusha Srivatsa
2021-06-21 19:14 ` [Intel-gfx] [CI 2/4] drm/i915/xelpd: Pipe A DMC plugging Anusha Srivatsa
2021-06-21 19:14 ` [Intel-gfx] [CI 3/4] drm/i915/adl_p: Pipe B DMC Support Anusha Srivatsa
2021-06-21 19:14 ` Anusha Srivatsa [this message]
2021-06-21 19:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Pipe DMC bits Patchwork
2021-06-21 19:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-06-21 19:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-21 21:30 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-06-21 23:32   ` Srivatsa, Anusha
  -- strict thread matches above, loose matches on Subject: below --
2021-06-13 16:13 [Intel-gfx] [CI 0/4] Pipe DMC Support Anusha Srivatsa
2021-06-13 16:14 ` [Intel-gfx] [CI 4/4] drm/i915/adl_p: Load DMC Anusha Srivatsa
2021-06-11 19:43 [Intel-gfx] [CI 0/4] Pipe DMC Support Anusha Srivatsa
2021-06-11 19:43 ` [Intel-gfx] [CI 4/4] drm/i915/adl_p: Load DMC Anusha Srivatsa
2021-06-12  4:40   ` Lucas De Marchi
2021-06-10 19:13 [Intel-gfx] [CI 0/4] Pipe DMC Support Anusha Srivatsa
2021-06-10 19:13 ` [Intel-gfx] [CI 4/4] drm/i915/adl_p: Load DMC Anusha Srivatsa
2021-06-04 19:01 [Intel-gfx] [CI 0/4] Pipe DMC Support Anusha Srivatsa
2021-06-04 19:01 ` [Intel-gfx] [CI 4/4] drm/i915/adl_p: Load DMC Anusha Srivatsa
2021-06-10  6:25   ` Lucas De Marchi
2021-06-04 18:58 [Intel-gfx] [CI 0/4] Pipe DMC Support Anusha Srivatsa
2021-06-04 18:59 ` [Intel-gfx] [CI 4/4] drm/i915/adl_p: Load DMC Anusha Srivatsa

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