* [PATCH] drm/i915/ttm: consider all placements for the page alignment
@ 2021-06-22 9:58 ` Matthew Auld
0 siblings, 0 replies; 12+ messages in thread
From: Matthew Auld @ 2021-06-22 9:58 UTC (permalink / raw)
To: intel-gfx; +Cc: Thomas Hellström, dri-devel
Just checking the current region is not enough, if we later migrate the
object somewhere else. For example if the placements are {SMEM, LMEM},
then we might get this wrong. Another idea might be to make the
page_alignment part of the ttm_place, instead of the BO.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index c5deb8b7227c..5d894bba6430 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -753,6 +753,25 @@ void i915_ttm_bo_destroy(struct ttm_buffer_object *bo)
call_rcu(&obj->rcu, __i915_gem_free_object_rcu);
}
+static u64 i915_gem_object_page_size(struct drm_i915_gem_object *obj)
+{
+ u64 page_size;
+ int i;
+
+ if (!obj->mm.n_placements)
+ return obj->mm.region->min_page_size;
+
+ page_size = 0;
+ for (i = 0; i < obj->mm.n_placements; i++) {
+ struct intel_memory_region *mr = obj->mm.placements[i];
+
+ page_size = max_t(u64, mr->min_page_size, page_size);
+ }
+
+ GEM_BUG_ON(!page_size);
+ return page_size;
+}
+
/**
* __i915_gem_ttm_object_init - Initialize a ttm-backed i915 gem object
* @mem: The initial memory region for the object.
@@ -793,7 +812,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
obj->base.vma_node.driver_private = i915_gem_to_ttm(obj);
ret = ttm_bo_init(&i915->bdev, i915_gem_to_ttm(obj), size,
bo_type, &i915_sys_placement,
- mem->min_page_size >> PAGE_SHIFT,
+ i915_gem_object_page_size(obj) >> PAGE_SHIFT,
true, NULL, NULL, i915_ttm_bo_destroy);
if (!ret)
obj->ttm.created = true;
--
2.26.3
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/ttm: consider all placements for the page alignment
@ 2021-06-22 9:58 ` Matthew Auld
0 siblings, 0 replies; 12+ messages in thread
From: Matthew Auld @ 2021-06-22 9:58 UTC (permalink / raw)
To: intel-gfx; +Cc: Thomas Hellström, dri-devel
Just checking the current region is not enough, if we later migrate the
object somewhere else. For example if the placements are {SMEM, LMEM},
then we might get this wrong. Another idea might be to make the
page_alignment part of the ttm_place, instead of the BO.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index c5deb8b7227c..5d894bba6430 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -753,6 +753,25 @@ void i915_ttm_bo_destroy(struct ttm_buffer_object *bo)
call_rcu(&obj->rcu, __i915_gem_free_object_rcu);
}
+static u64 i915_gem_object_page_size(struct drm_i915_gem_object *obj)
+{
+ u64 page_size;
+ int i;
+
+ if (!obj->mm.n_placements)
+ return obj->mm.region->min_page_size;
+
+ page_size = 0;
+ for (i = 0; i < obj->mm.n_placements; i++) {
+ struct intel_memory_region *mr = obj->mm.placements[i];
+
+ page_size = max_t(u64, mr->min_page_size, page_size);
+ }
+
+ GEM_BUG_ON(!page_size);
+ return page_size;
+}
+
/**
* __i915_gem_ttm_object_init - Initialize a ttm-backed i915 gem object
* @mem: The initial memory region for the object.
@@ -793,7 +812,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
obj->base.vma_node.driver_private = i915_gem_to_ttm(obj);
ret = ttm_bo_init(&i915->bdev, i915_gem_to_ttm(obj), size,
bo_type, &i915_sys_placement,
- mem->min_page_size >> PAGE_SHIFT,
+ i915_gem_object_page_size(obj) >> PAGE_SHIFT,
true, NULL, NULL, i915_ttm_bo_destroy);
if (!ret)
obj->ttm.created = true;
--
2.26.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH] drm/i915/ttm: consider all placements for the page alignment
2021-06-22 9:58 ` [Intel-gfx] " Matthew Auld
@ 2021-06-22 10:11 ` Thomas Hellström
-1 siblings, 0 replies; 12+ messages in thread
From: Thomas Hellström @ 2021-06-22 10:11 UTC (permalink / raw)
To: Matthew Auld, intel-gfx; +Cc: dri-devel
On 6/22/21 11:58 AM, Matthew Auld wrote:
> Just checking the current region is not enough, if we later migrate the
> object somewhere else. For example if the placements are {SMEM, LMEM},
> then we might get this wrong. Another idea might be to make the
> page_alignment part of the ttm_place, instead of the BO.
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 21 ++++++++++++++++++++-
> 1 file changed, 20 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> index c5deb8b7227c..5d894bba6430 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> @@ -753,6 +753,25 @@ void i915_ttm_bo_destroy(struct ttm_buffer_object *bo)
> call_rcu(&obj->rcu, __i915_gem_free_object_rcu);
> }
>
> +static u64 i915_gem_object_page_size(struct drm_i915_gem_object *obj)
> +{
> + u64 page_size;
> + int i;
> +
> + if (!obj->mm.n_placements)
> + return obj->mm.region->min_page_size;
> +
> + page_size = 0;
> + for (i = 0; i < obj->mm.n_placements; i++) {
> + struct intel_memory_region *mr = obj->mm.placements[i];
> +
> + page_size = max_t(u64, mr->min_page_size, page_size);
> + }
> +
> + GEM_BUG_ON(!page_size);
> + return page_size;
> +}
> +
> /**
> * __i915_gem_ttm_object_init - Initialize a ttm-backed i915 gem object
> * @mem: The initial memory region for the object.
> @@ -793,7 +812,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
> obj->base.vma_node.driver_private = i915_gem_to_ttm(obj);
> ret = ttm_bo_init(&i915->bdev, i915_gem_to_ttm(obj), size,
> bo_type, &i915_sys_placement,
> - mem->min_page_size >> PAGE_SHIFT,
> + i915_gem_object_page_size(obj) >> PAGE_SHIFT,
Hmm, can't we just have the buddy manager silently enforce its
min_page_size?
/Thomas
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/ttm: consider all placements for the page alignment
@ 2021-06-22 10:11 ` Thomas Hellström
0 siblings, 0 replies; 12+ messages in thread
From: Thomas Hellström @ 2021-06-22 10:11 UTC (permalink / raw)
To: Matthew Auld, intel-gfx; +Cc: dri-devel
On 6/22/21 11:58 AM, Matthew Auld wrote:
> Just checking the current region is not enough, if we later migrate the
> object somewhere else. For example if the placements are {SMEM, LMEM},
> then we might get this wrong. Another idea might be to make the
> page_alignment part of the ttm_place, instead of the BO.
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 21 ++++++++++++++++++++-
> 1 file changed, 20 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> index c5deb8b7227c..5d894bba6430 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> @@ -753,6 +753,25 @@ void i915_ttm_bo_destroy(struct ttm_buffer_object *bo)
> call_rcu(&obj->rcu, __i915_gem_free_object_rcu);
> }
>
> +static u64 i915_gem_object_page_size(struct drm_i915_gem_object *obj)
> +{
> + u64 page_size;
> + int i;
> +
> + if (!obj->mm.n_placements)
> + return obj->mm.region->min_page_size;
> +
> + page_size = 0;
> + for (i = 0; i < obj->mm.n_placements; i++) {
> + struct intel_memory_region *mr = obj->mm.placements[i];
> +
> + page_size = max_t(u64, mr->min_page_size, page_size);
> + }
> +
> + GEM_BUG_ON(!page_size);
> + return page_size;
> +}
> +
> /**
> * __i915_gem_ttm_object_init - Initialize a ttm-backed i915 gem object
> * @mem: The initial memory region for the object.
> @@ -793,7 +812,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
> obj->base.vma_node.driver_private = i915_gem_to_ttm(obj);
> ret = ttm_bo_init(&i915->bdev, i915_gem_to_ttm(obj), size,
> bo_type, &i915_sys_placement,
> - mem->min_page_size >> PAGE_SHIFT,
> + i915_gem_object_page_size(obj) >> PAGE_SHIFT,
Hmm, can't we just have the buddy manager silently enforce its
min_page_size?
/Thomas
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/ttm: consider all placements for the page alignment
2021-06-22 10:11 ` [Intel-gfx] " Thomas Hellström
@ 2021-06-22 12:15 ` Matthew Auld
-1 siblings, 0 replies; 12+ messages in thread
From: Matthew Auld @ 2021-06-22 12:15 UTC (permalink / raw)
To: Thomas Hellström
Cc: Intel Graphics Development, Matthew Auld, ML dri-devel
On Tue, 22 Jun 2021 at 11:11, Thomas Hellström
<thomas.hellstrom@linux.intel.com> wrote:
>
>
> On 6/22/21 11:58 AM, Matthew Auld wrote:
> > Just checking the current region is not enough, if we later migrate the
> > object somewhere else. For example if the placements are {SMEM, LMEM},
> > then we might get this wrong. Another idea might be to make the
> > page_alignment part of the ttm_place, instead of the BO.
> >
> > Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> > Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 21 ++++++++++++++++++++-
> > 1 file changed, 20 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > index c5deb8b7227c..5d894bba6430 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > @@ -753,6 +753,25 @@ void i915_ttm_bo_destroy(struct ttm_buffer_object *bo)
> > call_rcu(&obj->rcu, __i915_gem_free_object_rcu);
> > }
> >
> > +static u64 i915_gem_object_page_size(struct drm_i915_gem_object *obj)
> > +{
> > + u64 page_size;
> > + int i;
> > +
> > + if (!obj->mm.n_placements)
> > + return obj->mm.region->min_page_size;
> > +
> > + page_size = 0;
> > + for (i = 0; i < obj->mm.n_placements; i++) {
> > + struct intel_memory_region *mr = obj->mm.placements[i];
> > +
> > + page_size = max_t(u64, mr->min_page_size, page_size);
> > + }
> > +
> > + GEM_BUG_ON(!page_size);
> > + return page_size;
> > +}
> > +
> > /**
> > * __i915_gem_ttm_object_init - Initialize a ttm-backed i915 gem object
> > * @mem: The initial memory region for the object.
> > @@ -793,7 +812,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
> > obj->base.vma_node.driver_private = i915_gem_to_ttm(obj);
> > ret = ttm_bo_init(&i915->bdev, i915_gem_to_ttm(obj), size,
> > bo_type, &i915_sys_placement,
> > - mem->min_page_size >> PAGE_SHIFT,
> > + i915_gem_object_page_size(obj) >> PAGE_SHIFT,
>
> Hmm, can't we just have the buddy manager silently enforce its
> min_page_size?
Maybe, but we need some way of overriding it for all of our page-table
allocations(and some other stuff also), so being able to control the
page_alignment at the object level here seems reasonable? Could maybe
pass it through with create_lmem_with_page_size(..., page_size)? Ok,
it might be best to first type it and then see how it will all fit
together.
>
> /Thomas
>
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/ttm: consider all placements for the page alignment
@ 2021-06-22 12:15 ` Matthew Auld
0 siblings, 0 replies; 12+ messages in thread
From: Matthew Auld @ 2021-06-22 12:15 UTC (permalink / raw)
To: Thomas Hellström
Cc: Intel Graphics Development, Matthew Auld, ML dri-devel
On Tue, 22 Jun 2021 at 11:11, Thomas Hellström
<thomas.hellstrom@linux.intel.com> wrote:
>
>
> On 6/22/21 11:58 AM, Matthew Auld wrote:
> > Just checking the current region is not enough, if we later migrate the
> > object somewhere else. For example if the placements are {SMEM, LMEM},
> > then we might get this wrong. Another idea might be to make the
> > page_alignment part of the ttm_place, instead of the BO.
> >
> > Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> > Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 21 ++++++++++++++++++++-
> > 1 file changed, 20 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > index c5deb8b7227c..5d894bba6430 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > @@ -753,6 +753,25 @@ void i915_ttm_bo_destroy(struct ttm_buffer_object *bo)
> > call_rcu(&obj->rcu, __i915_gem_free_object_rcu);
> > }
> >
> > +static u64 i915_gem_object_page_size(struct drm_i915_gem_object *obj)
> > +{
> > + u64 page_size;
> > + int i;
> > +
> > + if (!obj->mm.n_placements)
> > + return obj->mm.region->min_page_size;
> > +
> > + page_size = 0;
> > + for (i = 0; i < obj->mm.n_placements; i++) {
> > + struct intel_memory_region *mr = obj->mm.placements[i];
> > +
> > + page_size = max_t(u64, mr->min_page_size, page_size);
> > + }
> > +
> > + GEM_BUG_ON(!page_size);
> > + return page_size;
> > +}
> > +
> > /**
> > * __i915_gem_ttm_object_init - Initialize a ttm-backed i915 gem object
> > * @mem: The initial memory region for the object.
> > @@ -793,7 +812,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
> > obj->base.vma_node.driver_private = i915_gem_to_ttm(obj);
> > ret = ttm_bo_init(&i915->bdev, i915_gem_to_ttm(obj), size,
> > bo_type, &i915_sys_placement,
> > - mem->min_page_size >> PAGE_SHIFT,
> > + i915_gem_object_page_size(obj) >> PAGE_SHIFT,
>
> Hmm, can't we just have the buddy manager silently enforce its
> min_page_size?
Maybe, but we need some way of overriding it for all of our page-table
allocations(and some other stuff also), so being able to control the
page_alignment at the object level here seems reasonable? Could maybe
pass it through with create_lmem_with_page_size(..., page_size)? Ok,
it might be best to first type it and then see how it will all fit
together.
>
> /Thomas
>
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/ttm: consider all placements for the page alignment
2021-06-22 12:15 ` Matthew Auld
@ 2021-06-22 12:29 ` Thomas Hellström
-1 siblings, 0 replies; 12+ messages in thread
From: Thomas Hellström @ 2021-06-22 12:29 UTC (permalink / raw)
To: Matthew Auld; +Cc: Intel Graphics Development, Matthew Auld, ML dri-devel
On 6/22/21 2:15 PM, Matthew Auld wrote:
> On Tue, 22 Jun 2021 at 11:11, Thomas Hellström
> <thomas.hellstrom@linux.intel.com> wrote:
>>
>> On 6/22/21 11:58 AM, Matthew Auld wrote:
>>> Just checking the current region is not enough, if we later migrate the
>>> object somewhere else. For example if the placements are {SMEM, LMEM},
>>> then we might get this wrong. Another idea might be to make the
>>> page_alignment part of the ttm_place, instead of the BO.
>>>
>>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>>> ---
>>> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 21 ++++++++++++++++++++-
>>> 1 file changed, 20 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>> index c5deb8b7227c..5d894bba6430 100644
>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>> @@ -753,6 +753,25 @@ void i915_ttm_bo_destroy(struct ttm_buffer_object *bo)
>>> call_rcu(&obj->rcu, __i915_gem_free_object_rcu);
>>> }
>>>
>>> +static u64 i915_gem_object_page_size(struct drm_i915_gem_object *obj)
>>> +{
>>> + u64 page_size;
>>> + int i;
>>> +
>>> + if (!obj->mm.n_placements)
>>> + return obj->mm.region->min_page_size;
>>> +
>>> + page_size = 0;
>>> + for (i = 0; i < obj->mm.n_placements; i++) {
>>> + struct intel_memory_region *mr = obj->mm.placements[i];
>>> +
>>> + page_size = max_t(u64, mr->min_page_size, page_size);
>>> + }
>>> +
>>> + GEM_BUG_ON(!page_size);
>>> + return page_size;
>>> +}
>>> +
>>> /**
>>> * __i915_gem_ttm_object_init - Initialize a ttm-backed i915 gem object
>>> * @mem: The initial memory region for the object.
>>> @@ -793,7 +812,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
>>> obj->base.vma_node.driver_private = i915_gem_to_ttm(obj);
>>> ret = ttm_bo_init(&i915->bdev, i915_gem_to_ttm(obj), size,
>>> bo_type, &i915_sys_placement,
>>> - mem->min_page_size >> PAGE_SHIFT,
>>> + i915_gem_object_page_size(obj) >> PAGE_SHIFT,
>> Hmm, can't we just have the buddy manager silently enforce its
>> min_page_size?
> Maybe, but we need some way of overriding it for all of our page-table
> allocations(and some other stuff also), so being able to control the
> page_alignment at the object level here seems reasonable? Could maybe
> pass it through with create_lmem_with_page_size(..., page_size)? Ok,
> it might be best to first type it and then see how it will all fit
> together.
>
Hmm, OK, I'm not 100% sure what the various requirements are here on the
object level. But for region requirements, I think we've historically
enforced that through the manager, taking also the bo->page_alignment
into account and applying the larger of the two,
There is an example in vmw_thp_insert_aligned().
/Thomas
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/ttm: consider all placements for the page alignment
@ 2021-06-22 12:29 ` Thomas Hellström
0 siblings, 0 replies; 12+ messages in thread
From: Thomas Hellström @ 2021-06-22 12:29 UTC (permalink / raw)
To: Matthew Auld; +Cc: Intel Graphics Development, Matthew Auld, ML dri-devel
On 6/22/21 2:15 PM, Matthew Auld wrote:
> On Tue, 22 Jun 2021 at 11:11, Thomas Hellström
> <thomas.hellstrom@linux.intel.com> wrote:
>>
>> On 6/22/21 11:58 AM, Matthew Auld wrote:
>>> Just checking the current region is not enough, if we later migrate the
>>> object somewhere else. For example if the placements are {SMEM, LMEM},
>>> then we might get this wrong. Another idea might be to make the
>>> page_alignment part of the ttm_place, instead of the BO.
>>>
>>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>>> ---
>>> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 21 ++++++++++++++++++++-
>>> 1 file changed, 20 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>> index c5deb8b7227c..5d894bba6430 100644
>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>> @@ -753,6 +753,25 @@ void i915_ttm_bo_destroy(struct ttm_buffer_object *bo)
>>> call_rcu(&obj->rcu, __i915_gem_free_object_rcu);
>>> }
>>>
>>> +static u64 i915_gem_object_page_size(struct drm_i915_gem_object *obj)
>>> +{
>>> + u64 page_size;
>>> + int i;
>>> +
>>> + if (!obj->mm.n_placements)
>>> + return obj->mm.region->min_page_size;
>>> +
>>> + page_size = 0;
>>> + for (i = 0; i < obj->mm.n_placements; i++) {
>>> + struct intel_memory_region *mr = obj->mm.placements[i];
>>> +
>>> + page_size = max_t(u64, mr->min_page_size, page_size);
>>> + }
>>> +
>>> + GEM_BUG_ON(!page_size);
>>> + return page_size;
>>> +}
>>> +
>>> /**
>>> * __i915_gem_ttm_object_init - Initialize a ttm-backed i915 gem object
>>> * @mem: The initial memory region for the object.
>>> @@ -793,7 +812,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
>>> obj->base.vma_node.driver_private = i915_gem_to_ttm(obj);
>>> ret = ttm_bo_init(&i915->bdev, i915_gem_to_ttm(obj), size,
>>> bo_type, &i915_sys_placement,
>>> - mem->min_page_size >> PAGE_SHIFT,
>>> + i915_gem_object_page_size(obj) >> PAGE_SHIFT,
>> Hmm, can't we just have the buddy manager silently enforce its
>> min_page_size?
> Maybe, but we need some way of overriding it for all of our page-table
> allocations(and some other stuff also), so being able to control the
> page_alignment at the object level here seems reasonable? Could maybe
> pass it through with create_lmem_with_page_size(..., page_size)? Ok,
> it might be best to first type it and then see how it will all fit
> together.
>
Hmm, OK, I'm not 100% sure what the various requirements are here on the
object level. But for region requirements, I think we've historically
enforced that through the manager, taking also the bo->page_alignment
into account and applying the larger of the two,
There is an example in vmw_thp_insert_aligned().
/Thomas
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/ttm: consider all placements for the page alignment
2021-06-22 12:29 ` Thomas Hellström
@ 2021-06-22 12:36 ` Matthew Auld
-1 siblings, 0 replies; 12+ messages in thread
From: Matthew Auld @ 2021-06-22 12:36 UTC (permalink / raw)
To: Thomas Hellström, Matthew Auld
Cc: Intel Graphics Development, ML dri-devel
On 22/06/2021 13:29, Thomas Hellström wrote:
>
> On 6/22/21 2:15 PM, Matthew Auld wrote:
>> On Tue, 22 Jun 2021 at 11:11, Thomas Hellström
>> <thomas.hellstrom@linux.intel.com> wrote:
>>>
>>> On 6/22/21 11:58 AM, Matthew Auld wrote:
>>>> Just checking the current region is not enough, if we later migrate the
>>>> object somewhere else. For example if the placements are {SMEM, LMEM},
>>>> then we might get this wrong. Another idea might be to make the
>>>> page_alignment part of the ttm_place, instead of the BO.
>>>>
>>>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>>>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 21 ++++++++++++++++++++-
>>>> 1 file changed, 20 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>>> b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>>> index c5deb8b7227c..5d894bba6430 100644
>>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>>> @@ -753,6 +753,25 @@ void i915_ttm_bo_destroy(struct
>>>> ttm_buffer_object *bo)
>>>> call_rcu(&obj->rcu, __i915_gem_free_object_rcu);
>>>> }
>>>>
>>>> +static u64 i915_gem_object_page_size(struct drm_i915_gem_object *obj)
>>>> +{
>>>> + u64 page_size;
>>>> + int i;
>>>> +
>>>> + if (!obj->mm.n_placements)
>>>> + return obj->mm.region->min_page_size;
>>>> +
>>>> + page_size = 0;
>>>> + for (i = 0; i < obj->mm.n_placements; i++) {
>>>> + struct intel_memory_region *mr = obj->mm.placements[i];
>>>> +
>>>> + page_size = max_t(u64, mr->min_page_size, page_size);
>>>> + }
>>>> +
>>>> + GEM_BUG_ON(!page_size);
>>>> + return page_size;
>>>> +}
>>>> +
>>>> /**
>>>> * __i915_gem_ttm_object_init - Initialize a ttm-backed i915 gem
>>>> object
>>>> * @mem: The initial memory region for the object.
>>>> @@ -793,7 +812,7 @@ int __i915_gem_ttm_object_init(struct
>>>> intel_memory_region *mem,
>>>> obj->base.vma_node.driver_private = i915_gem_to_ttm(obj);
>>>> ret = ttm_bo_init(&i915->bdev, i915_gem_to_ttm(obj), size,
>>>> bo_type, &i915_sys_placement,
>>>> - mem->min_page_size >> PAGE_SHIFT,
>>>> + i915_gem_object_page_size(obj) >> PAGE_SHIFT,
>>> Hmm, can't we just have the buddy manager silently enforce its
>>> min_page_size?
>> Maybe, but we need some way of overriding it for all of our page-table
>> allocations(and some other stuff also), so being able to control the
>> page_alignment at the object level here seems reasonable? Could maybe
>> pass it through with create_lmem_with_page_size(..., page_size)? Ok,
>> it might be best to first type it and then see how it will all fit
>> together.
>>
> Hmm, OK, I'm not 100% sure what the various requirements are here on the
> object level. But for region requirements, I think we've historically
> enforced that through the manager, taking also the bo->page_alignment
> into account and applying the larger of the two,
>
> There is an example in vmw_thp_insert_aligned().
Yeah, so for our use case we need to support page_alignment <
min_page_size, for page-tables(4K). I guess pushing the min_page_size
into buddy_man, and then letting page_alignment override that, with the
added caveat that it can be smaller could work. Otherwise just using
mm.chunk_size would already fit the bill quite nicely.
>
> /Thomas
>
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/ttm: consider all placements for the page alignment
@ 2021-06-22 12:36 ` Matthew Auld
0 siblings, 0 replies; 12+ messages in thread
From: Matthew Auld @ 2021-06-22 12:36 UTC (permalink / raw)
To: Thomas Hellström, Matthew Auld
Cc: Intel Graphics Development, ML dri-devel
On 22/06/2021 13:29, Thomas Hellström wrote:
>
> On 6/22/21 2:15 PM, Matthew Auld wrote:
>> On Tue, 22 Jun 2021 at 11:11, Thomas Hellström
>> <thomas.hellstrom@linux.intel.com> wrote:
>>>
>>> On 6/22/21 11:58 AM, Matthew Auld wrote:
>>>> Just checking the current region is not enough, if we later migrate the
>>>> object somewhere else. For example if the placements are {SMEM, LMEM},
>>>> then we might get this wrong. Another idea might be to make the
>>>> page_alignment part of the ttm_place, instead of the BO.
>>>>
>>>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>>>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 21 ++++++++++++++++++++-
>>>> 1 file changed, 20 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>>> b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>>> index c5deb8b7227c..5d894bba6430 100644
>>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>>> @@ -753,6 +753,25 @@ void i915_ttm_bo_destroy(struct
>>>> ttm_buffer_object *bo)
>>>> call_rcu(&obj->rcu, __i915_gem_free_object_rcu);
>>>> }
>>>>
>>>> +static u64 i915_gem_object_page_size(struct drm_i915_gem_object *obj)
>>>> +{
>>>> + u64 page_size;
>>>> + int i;
>>>> +
>>>> + if (!obj->mm.n_placements)
>>>> + return obj->mm.region->min_page_size;
>>>> +
>>>> + page_size = 0;
>>>> + for (i = 0; i < obj->mm.n_placements; i++) {
>>>> + struct intel_memory_region *mr = obj->mm.placements[i];
>>>> +
>>>> + page_size = max_t(u64, mr->min_page_size, page_size);
>>>> + }
>>>> +
>>>> + GEM_BUG_ON(!page_size);
>>>> + return page_size;
>>>> +}
>>>> +
>>>> /**
>>>> * __i915_gem_ttm_object_init - Initialize a ttm-backed i915 gem
>>>> object
>>>> * @mem: The initial memory region for the object.
>>>> @@ -793,7 +812,7 @@ int __i915_gem_ttm_object_init(struct
>>>> intel_memory_region *mem,
>>>> obj->base.vma_node.driver_private = i915_gem_to_ttm(obj);
>>>> ret = ttm_bo_init(&i915->bdev, i915_gem_to_ttm(obj), size,
>>>> bo_type, &i915_sys_placement,
>>>> - mem->min_page_size >> PAGE_SHIFT,
>>>> + i915_gem_object_page_size(obj) >> PAGE_SHIFT,
>>> Hmm, can't we just have the buddy manager silently enforce its
>>> min_page_size?
>> Maybe, but we need some way of overriding it for all of our page-table
>> allocations(and some other stuff also), so being able to control the
>> page_alignment at the object level here seems reasonable? Could maybe
>> pass it through with create_lmem_with_page_size(..., page_size)? Ok,
>> it might be best to first type it and then see how it will all fit
>> together.
>>
> Hmm, OK, I'm not 100% sure what the various requirements are here on the
> object level. But for region requirements, I think we've historically
> enforced that through the manager, taking also the bo->page_alignment
> into account and applying the larger of the two,
>
> There is an example in vmw_thp_insert_aligned().
Yeah, so for our use case we need to support page_alignment <
min_page_size, for page-tables(4K). I guess pushing the min_page_size
into buddy_man, and then letting page_alignment override that, with the
added caveat that it can be smaller could work. Otherwise just using
mm.chunk_size would already fit the bill quite nicely.
>
> /Thomas
>
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ttm: consider all placements for the page alignment
2021-06-22 9:58 ` [Intel-gfx] " Matthew Auld
(?)
(?)
@ 2021-06-22 13:19 ` Patchwork
-1 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-06-22 13:19 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 2522 bytes --]
== Series Details ==
Series: drm/i915/ttm: consider all placements for the page alignment
URL : https://patchwork.freedesktop.org/series/91771/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10261 -> Patchwork_20428
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/index.html
Known issues
------------
Here are the changes found in Patchwork_20428 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-gfx:
- fi-skl-6700k2: NOTRUN -> [SKIP][1] ([fdo#109271]) +24 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/fi-skl-6700k2/igt@amdgpu/amd_basic@cs-gfx.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-skl-6700k2: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#533])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/fi-skl-6700k2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
#### Possible fixes ####
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-skl-6700k2: [INCOMPLETE][3] ([i915#146] / [i915#2405]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/fi-skl-6700k2/igt@kms_chamelium@common-hpd-after-suspend.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/fi-skl-6700k2/igt@kms_chamelium@common-hpd-after-suspend.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#2405]: https://gitlab.freedesktop.org/drm/intel/issues/2405
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Participating hosts (44 -> 39)
------------------------------
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_10261 -> Patchwork_20428
CI-20190529: 20190529
CI_DRM_10261: 132b189b72a94328f17fd70321bfe63e5b4208e9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6117: 3ba0a02404f243d6d8f232c6215163cc4b0fd699 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20428: 67e27a0991ed4f46ec11cfa727d7c7de543981e0 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
67e27a0991ed drm/i915/ttm: consider all placements for the page alignment
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/index.html
[-- Attachment #1.2: Type: text/html, Size: 3238 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/ttm: consider all placements for the page alignment
2021-06-22 9:58 ` [Intel-gfx] " Matthew Auld
` (2 preceding siblings ...)
(?)
@ 2021-06-22 14:27 ` Patchwork
-1 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-06-22 14:27 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 26557 bytes --]
== Series Details ==
Series: drm/i915/ttm: consider all placements for the page alignment
URL : https://patchwork.freedesktop.org/series/91771/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10261_full -> Patchwork_20428_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_20428_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@legacy-engines-queued:
- shard-snb: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1099]) +3 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-snb6/igt@gem_ctx_persistence@legacy-engines-queued.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][2] -> [TIMEOUT][3] ([i915#2369] / [i915#3063])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-tglb8/igt@gem_eio@unwedge-stress.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-tglb3/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-kbl: NOTRUN -> [FAIL][4] ([i915#2842])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl1/igt@gem_exec_fair@basic-none-rrul@rcs0.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][5] -> [FAIL][6] ([i915#2842])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-none@rcs0:
- shard-glk: [PASS][7] -> [FAIL][8] ([i915#2842])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-glk4/igt@gem_exec_fair@basic-none@rcs0.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-glk2/igt@gem_exec_fair@basic-none@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl: [PASS][9] -> [FAIL][10] ([i915#2842]) +4 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-kbl1/igt@gem_exec_fair@basic-none@vcs0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl6/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_whisper@basic-queues-forked-all:
- shard-glk: [PASS][11] -> [DMESG-WARN][12] ([i915#118] / [i915#95]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-glk3/igt@gem_exec_whisper@basic-queues-forked-all.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-glk3/igt@gem_exec_whisper@basic-queues-forked-all.html
* igt@gem_pread@exhaustion:
- shard-apl: NOTRUN -> [WARN][13] ([i915#2658])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-apl3/igt@gem_pread@exhaustion.html
- shard-kbl: NOTRUN -> [WARN][14] ([i915#2658])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl1/igt@gem_pread@exhaustion.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-apl: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#3323])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-apl1/igt@gem_userptr_blits@dmabuf-sync.html
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: NOTRUN -> [WARN][16] ([i915#2684])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rpm@modeset-pc8-residency-stress:
- shard-apl: NOTRUN -> [SKIP][17] ([fdo#109271]) +183 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-apl8/igt@i915_pm_rpm@modeset-pc8-residency-stress.html
* igt@kms_chamelium@dp-crc-fast:
- shard-iclb: NOTRUN -> [SKIP][18] ([fdo#109284] / [fdo#111827]) +1 similar issue
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb8/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_chamelium@hdmi-hpd-storm-disable:
- shard-skl: NOTRUN -> [SKIP][19] ([fdo#109271] / [fdo#111827]) +3 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-skl8/igt@kms_chamelium@hdmi-hpd-storm-disable.html
* igt@kms_chamelium@hdmi-hpd-with-enabled-mode:
- shard-snb: NOTRUN -> [SKIP][20] ([fdo#109271] / [fdo#111827]) +11 similar issues
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-snb2/igt@kms_chamelium@hdmi-hpd-with-enabled-mode.html
* igt@kms_chamelium@vga-hpd-for-each-pipe:
- shard-kbl: NOTRUN -> [SKIP][21] ([fdo#109271] / [fdo#111827]) +6 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl1/igt@kms_chamelium@vga-hpd-for-each-pipe.html
* igt@kms_color@pipe-c-ctm-red-to-blue:
- shard-skl: [PASS][22] -> [DMESG-WARN][23] ([i915#1982])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-skl5/igt@kms_color@pipe-c-ctm-red-to-blue.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-skl10/igt@kms_color@pipe-c-ctm-red-to-blue.html
* igt@kms_color_chamelium@pipe-b-ctm-0-5:
- shard-apl: NOTRUN -> [SKIP][24] ([fdo#109271] / [fdo#111827]) +19 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-apl8/igt@kms_color_chamelium@pipe-b-ctm-0-5.html
* igt@kms_content_protection@atomic-dpms:
- shard-iclb: NOTRUN -> [SKIP][25] ([fdo#109300] / [fdo#111066])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb8/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@legacy:
- shard-apl: NOTRUN -> [TIMEOUT][26] ([i915#1319])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-apl7/igt@kms_content_protection@legacy.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: NOTRUN -> [DMESG-WARN][27] ([i915#180])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_crc@pipe-b-cursor-512x170-sliding:
- shard-iclb: NOTRUN -> [SKIP][28] ([fdo#109278] / [fdo#109279])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb8/igt@kms_cursor_crc@pipe-b-cursor-512x170-sliding.html
* igt@kms_cursor_crc@pipe-d-cursor-suspend:
- shard-kbl: NOTRUN -> [SKIP][29] ([fdo#109271]) +69 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl1/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-iclb: NOTRUN -> [SKIP][30] ([fdo#109274] / [fdo#109278]) +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@pipe-d-single-bo:
- shard-apl: NOTRUN -> [SKIP][31] ([fdo#109271] / [i915#533])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-apl8/igt@kms_cursor_legacy@pipe-d-single-bo.html
* igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1:
- shard-glk: [PASS][32] -> [FAIL][33] ([i915#79])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-glk5/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-glk9/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-apl: [PASS][34] -> [DMESG-WARN][35] ([i915#180]) +2 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_flip@plain-flip-ts-check@c-edp1:
- shard-skl: [PASS][36] -> [FAIL][37] ([i915#2122])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-skl3/igt@kms_flip@plain-flip-ts-check@c-edp1.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-skl6/igt@kms_flip@plain-flip-ts-check@c-edp1.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [PASS][38] -> [DMESG-WARN][39] ([i915#180]) +1 similar issue
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff:
- shard-skl: NOTRUN -> [SKIP][40] ([fdo#109271]) +31 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-skl2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt:
- shard-iclb: NOTRUN -> [SKIP][41] ([fdo#109280]) +5 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt.html
* igt@kms_invalid_dotclock:
- shard-iclb: NOTRUN -> [SKIP][42] ([fdo#109310])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb8/igt@kms_invalid_dotclock.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-apl: NOTRUN -> [FAIL][43] ([fdo#108145] / [i915#265]) +2 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
- shard-kbl: NOTRUN -> [FAIL][44] ([fdo#108145] / [i915#265])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl1/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
- shard-skl: NOTRUN -> [FAIL][45] ([fdo#108145] / [i915#265]) +2 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html
* igt@kms_plane_alpha_blend@pipe-d-coverage-vs-premult-vs-constant:
- shard-iclb: NOTRUN -> [SKIP][46] ([fdo#109278]) +3 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb8/igt@kms_plane_alpha_blend@pipe-d-coverage-vs-premult-vs-constant.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
- shard-kbl: NOTRUN -> [SKIP][47] ([fdo#109271] / [i915#658]) +3 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl1/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5:
- shard-apl: NOTRUN -> [SKIP][48] ([fdo#109271] / [i915#658]) +3 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-apl7/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
- shard-skl: NOTRUN -> [SKIP][49] ([fdo#109271] / [i915#658]) +1 similar issue
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-skl8/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [PASS][50] -> [SKIP][51] ([fdo#109642] / [fdo#111068] / [i915#658])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-iclb2/igt@kms_psr2_su@page_flip.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb6/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_cursor_blt:
- shard-iclb: [PASS][52] -> [SKIP][53] ([fdo#109441])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb1/igt@kms_psr@psr2_cursor_blt.html
* igt@kms_vblank@pipe-d-query-forked-hang:
- shard-snb: NOTRUN -> [SKIP][54] ([fdo#109271]) +190 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-snb5/igt@kms_vblank@pipe-d-query-forked-hang.html
* igt@kms_writeback@writeback-fb-id:
- shard-apl: NOTRUN -> [SKIP][55] ([fdo#109271] / [i915#2437])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-apl8/igt@kms_writeback@writeback-fb-id.html
* igt@perf@polling-parameterized:
- shard-kbl: [PASS][56] -> [FAIL][57] ([i915#1542])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-kbl3/igt@perf@polling-parameterized.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl6/igt@perf@polling-parameterized.html
* igt@sysfs_clients@split-25:
- shard-apl: NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#2994])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-apl7/igt@sysfs_clients@split-25.html
#### Possible fixes ####
* igt@gem_ctx_isolation@preservation-s3@rcs0:
- shard-apl: [DMESG-WARN][59] ([i915#180]) -> [PASS][60] +2 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-apl6/igt@gem_ctx_isolation@preservation-s3@rcs0.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-apl1/igt@gem_ctx_isolation@preservation-s3@rcs0.html
* igt@gem_ctx_persistence@many-contexts:
- shard-tglb: [FAIL][61] ([i915#2410]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-tglb2/igt@gem_ctx_persistence@many-contexts.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-tglb7/igt@gem_ctx_persistence@many-contexts.html
* igt@gem_exec_fair@basic-deadline:
- shard-kbl: [FAIL][63] ([i915#2846]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-kbl3/igt@gem_exec_fair@basic-deadline.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl3/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][65] ([i915#2842]) -> [PASS][66] +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-glk6/igt@gem_exec_fair@basic-pace-share@rcs0.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace@bcs0:
- shard-tglb: [FAIL][67] ([i915#2842]) -> [PASS][68] +1 similar issue
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-tglb1/igt@gem_exec_fair@basic-pace@bcs0.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-tglb7/igt@gem_exec_fair@basic-pace@bcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-kbl: [FAIL][69] ([i915#2842]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-kbl7/igt@gem_exec_fair@basic-pace@vcs1.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl7/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-skl: [FAIL][71] ([i915#2521]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-skl2/igt@kms_async_flips@alternate-sync-async-flip.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-skl4/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-0:
- shard-glk: [DMESG-WARN][73] ([i915#118] / [i915#95]) -> [PASS][74] +1 similar issue
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-glk4/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-glk2/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][75] ([i915#79]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-skl: [FAIL][77] ([i915#79]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-skl3/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-kbl: [DMESG-WARN][79] ([i915#180]) -> [PASS][80] +4 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-kbl7/igt@kms_flip@flip-vs-suspend@c-dp1.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl2/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_flip@plain-flip-ts-check@a-hdmi-a2:
- shard-glk: [FAIL][81] ([i915#2122]) -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-glk5/igt@kms_flip@plain-flip-ts-check@a-hdmi-a2.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-glk9/igt@kms_flip@plain-flip-ts-check@a-hdmi-a2.html
* igt@kms_frontbuffer_tracking@psr-suspend:
- shard-skl: [INCOMPLETE][83] ([i915#123]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-skl4/igt@kms_frontbuffer_tracking@psr-suspend.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-skl8/igt@kms_frontbuffer_tracking@psr-suspend.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][85] ([fdo#109441]) -> [PASS][86] +2 similar issues
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-iclb4/igt@kms_psr@psr2_sprite_plane_move.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
- shard-skl: [INCOMPLETE][87] ([i915#198] / [i915#2828]) -> [PASS][88]
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-skl4/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-skl2/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
* igt@perf@polling-parameterized:
- shard-skl: [FAIL][89] ([i915#1542]) -> [PASS][90]
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-skl10/igt@perf@polling-parameterized.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-skl9/igt@perf@polling-parameterized.html
* igt@sysfs_timeslice_duration@timeout@vecs0:
- shard-skl: [FAIL][91] -> [PASS][92]
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-skl3/igt@sysfs_timeslice_duration@timeout@vecs0.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-skl6/igt@sysfs_timeslice_duration@timeout@vecs0.html
#### Warnings ####
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-iclb: [FAIL][93] ([i915#2842]) -> [FAIL][94] ([i915#2852])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-iclb3/igt@gem_exec_fair@basic-none-rrul@rcs0.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb7/igt@gem_exec_fair@basic-none-rrul@rcs0.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-iclb: [SKIP][95] ([i915#658]) -> [SKIP][96] ([i915#2920]) +1 similar issue
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-iclb4/igt@kms_psr2_sf@cursor-plane-update-sf.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb2/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
- shard-iclb: [SKIP][97] ([i915#2920]) -> [SKIP][98] ([i915#658]) +3 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb6/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][99], [FAIL][100], [FAIL][101], [FAIL][102], [FAIL][103], [FAIL][104]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#3363]) -> ([FAIL][105], [FAIL][106], [FAIL][107], [FAIL][108], [FAIL][109]) ([fdo#109271] / [i915#1814] / [i915#3002] / [i915#3363])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-kbl7/igt@runner@aborted.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-kbl7/igt@runner@aborted.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-kbl7/igt@runner@aborted.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-kbl4/igt@runner@aborted.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-kbl2/igt@runner@aborted.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-kbl3/igt@runner@aborted.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl7/igt@runner@aborted.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl7/igt@runner@aborted.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl7/igt@runner@aborted.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl7/igt@runner@aborted.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-kbl4/igt@runner@aborted.html
- shard-iclb: ([FAIL][110], [FAIL][111], [FAIL][112]) ([i915#1814] / [i915#3002]) -> ([FAIL][113], [FAIL][114]) ([i915#3002])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-iclb6/igt@runner@aborted.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-iclb4/igt@runner@aborted.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10261/shard-iclb1/igt@runner@aborted.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb2/igt@runner@aborted.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/shard-iclb1/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
[fdo#109310]: https://bugs.freedesktop.org/show_bug.cgi?id=109310
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111066]: https://bugs.freedesktop.org/show_bug.cgi?id=111066
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#123]: https://gitlab.freedesktop.org/drm/intel/issues/123
[i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2369]: https://gitlab.freedesktop.org/drm/intel/issues/2369
[i915#2410]: https://gitlab.freedesktop.org/drm/intel/issues/2410
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
[i915#2828]: https://gitlab.freedesktop.org/drm/intel/issues/2828
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2852]: https://gitlab.freedesktop.org/drm/intel/issues/2852
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
[i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_10261 -> Patchwork_20428
CI-20190529: 20190529
CI_DRM_10261: 132b189b72a94328f17fd70321bfe63e5b4208e9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6117: 3ba0a02404f243d6d8f232c6215163cc4b0fd699 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20428: 67e27a0991ed4f46ec11cfa727d7c7de543981e0 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20428/index.html
[-- Attachment #1.2: Type: text/html, Size: 33047 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2021-06-22 14:27 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-22 9:58 [PATCH] drm/i915/ttm: consider all placements for the page alignment Matthew Auld
2021-06-22 9:58 ` [Intel-gfx] " Matthew Auld
2021-06-22 10:11 ` Thomas Hellström
2021-06-22 10:11 ` [Intel-gfx] " Thomas Hellström
2021-06-22 12:15 ` Matthew Auld
2021-06-22 12:15 ` Matthew Auld
2021-06-22 12:29 ` Thomas Hellström
2021-06-22 12:29 ` Thomas Hellström
2021-06-22 12:36 ` Matthew Auld
2021-06-22 12:36 ` Matthew Auld
2021-06-22 13:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-06-22 14:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.