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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Bhaumik Bhatt <bbhatt@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org,
	jhugo@codeaurora.org, linux-kernel@vger.kernel.org,
	loic.poulain@linaro.org, linux-wireless@vger.kernel.org,
	kvalo@codeaurora.org, ath11k@lists.infradead.org
Subject: Re: [PATCH v4 0/6] BHI/BHIe improvements for MHI power purposes
Date: Fri, 25 Jun 2021 10:58:51 +0530	[thread overview]
Message-ID: <20210625052851.GF4974@workstation> (raw)
In-Reply-To: <1620330705-40192-1-git-send-email-bbhatt@codeaurora.org>

On Thu, May 06, 2021 at 12:51:39PM -0700, Bhaumik Bhatt wrote:
> This patch series improves the power up behavior by allowing MHI host driver to
> set BHI and/or BHIe offsets early on in the preparation phase and fail pre-power
> up if offsets are not found or not within a limited MMIO region. This also
> allows MHI host to clean up the offsets in the unprepare after power down phase.
> 
> Going forward, controllers will be required to specify a reg_len field which
> will be used to check whether the BHI/BHIe offsets are in range or not.
> 
> This series has been tested on X86_64 architecture with the PCI generic driver
> as controller and an SDX55 device.
> 

Since there is a chance to send this series for 5.14, I've applied it
now to mhi-next!

Thanks,
Mani

> v4:
> -Added reviewed-by tags
> -Updated range check patch to include BHI/e offsets in the error message
> 
> v3:
> -Added reviewed-by tags
> -Updated order of reg_len in mhi_controller structure documentation
> 
> v2:
> -Added reviewed-by tags
> -Moved reg_len entry in mhi_controller structure to allow for a packed struct
> 
> Bhaumik Bhatt (6):
>   bus: mhi: core: Set BHI/BHIe offsets on power up preparation
>   bus: mhi: core: Set BHI and BHIe pointers to NULL in clean-up
>   bus: mhi: Add MMIO region length to controller structure
>   ath11k: set register access length for MHI driver
>   bus: mhi: pci_generic: Set register access length for MHI driver
>   bus: mhi: core: Add range checks for BHI and BHIe
> 
>  drivers/bus/mhi/core/init.c           | 61 ++++++++++++++++++++++++-----------
>  drivers/bus/mhi/core/pm.c             | 28 +++-------------
>  drivers/bus/mhi/pci_generic.c         |  1 +
>  drivers/net/wireless/ath/ath11k/mhi.c |  1 +
>  include/linux/mhi.h                   |  2 ++
>  5 files changed, 50 insertions(+), 43 deletions(-)
> 
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

WARNING: multiple messages have this Message-ID
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Bhaumik Bhatt <bbhatt@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org,
	jhugo@codeaurora.org, linux-kernel@vger.kernel.org,
	loic.poulain@linaro.org, linux-wireless@vger.kernel.org,
	kvalo@codeaurora.org, ath11k@lists.infradead.org
Subject: Re: [PATCH v4 0/6] BHI/BHIe improvements for MHI power purposes
Date: Fri, 25 Jun 2021 10:58:51 +0530	[thread overview]
Message-ID: <20210625052851.GF4974@workstation> (raw)
In-Reply-To: <1620330705-40192-1-git-send-email-bbhatt@codeaurora.org>

On Thu, May 06, 2021 at 12:51:39PM -0700, Bhaumik Bhatt wrote:
> This patch series improves the power up behavior by allowing MHI host driver to
> set BHI and/or BHIe offsets early on in the preparation phase and fail pre-power
> up if offsets are not found or not within a limited MMIO region. This also
> allows MHI host to clean up the offsets in the unprepare after power down phase.
> 
> Going forward, controllers will be required to specify a reg_len field which
> will be used to check whether the BHI/BHIe offsets are in range or not.
> 
> This series has been tested on X86_64 architecture with the PCI generic driver
> as controller and an SDX55 device.
> 

Since there is a chance to send this series for 5.14, I've applied it
now to mhi-next!

Thanks,
Mani

> v4:
> -Added reviewed-by tags
> -Updated range check patch to include BHI/e offsets in the error message
> 
> v3:
> -Added reviewed-by tags
> -Updated order of reg_len in mhi_controller structure documentation
> 
> v2:
> -Added reviewed-by tags
> -Moved reg_len entry in mhi_controller structure to allow for a packed struct
> 
> Bhaumik Bhatt (6):
>   bus: mhi: core: Set BHI/BHIe offsets on power up preparation
>   bus: mhi: core: Set BHI and BHIe pointers to NULL in clean-up
>   bus: mhi: Add MMIO region length to controller structure
>   ath11k: set register access length for MHI driver
>   bus: mhi: pci_generic: Set register access length for MHI driver
>   bus: mhi: core: Add range checks for BHI and BHIe
> 
>  drivers/bus/mhi/core/init.c           | 61 ++++++++++++++++++++++++-----------
>  drivers/bus/mhi/core/pm.c             | 28 +++-------------
>  drivers/bus/mhi/pci_generic.c         |  1 +
>  drivers/net/wireless/ath/ath11k/mhi.c |  1 +
>  include/linux/mhi.h                   |  2 ++
>  5 files changed, 50 insertions(+), 43 deletions(-)
> 
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

-- 
ath11k mailing list
ath11k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath11k

  parent reply	other threads:[~2021-06-25  5:28 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-06 19:51 Bhaumik Bhatt
2021-05-06 19:51 ` Bhaumik Bhatt
2021-05-06 19:51 ` [PATCH v4 1/6] bus: mhi: core: Set BHI/BHIe offsets on power up preparation Bhaumik Bhatt
2021-05-06 19:51   ` Bhaumik Bhatt
2021-05-21 13:36   ` Manivannan Sadhasivam
2021-05-21 13:36     ` Manivannan Sadhasivam
2021-05-06 19:51 ` [PATCH v4 2/6] bus: mhi: core: Set BHI and BHIe pointers to NULL in clean-up Bhaumik Bhatt
2021-05-06 19:51   ` Bhaumik Bhatt
2021-05-21 13:37   ` Manivannan Sadhasivam
2021-05-21 13:37     ` Manivannan Sadhasivam
2021-05-06 19:51 ` [PATCH v4 3/6] bus: mhi: Add MMIO region length to controller structure Bhaumik Bhatt
2021-05-06 19:51   ` Bhaumik Bhatt
2021-05-21 13:38   ` Manivannan Sadhasivam
2021-05-21 13:38     ` Manivannan Sadhasivam
2021-05-06 19:51 ` [PATCH v4 4/6] ath11k: set register access length for MHI driver Bhaumik Bhatt
2021-05-06 19:51   ` Bhaumik Bhatt
2021-05-21 13:51   ` Manivannan Sadhasivam
2021-05-21 13:51     ` Manivannan Sadhasivam
2021-06-14 16:02     ` Kalle Valo
2021-06-14 16:02       ` Kalle Valo
2021-06-14 17:49       ` Bhaumik Bhatt
2021-06-14 17:49         ` Bhaumik Bhatt
2021-06-16 17:38         ` Bhaumik Bhatt
2021-06-16 17:38           ` Bhaumik Bhatt
2021-06-18  6:45           ` Manivannan Sadhasivam
2021-06-18  6:45             ` Manivannan Sadhasivam
2021-06-23 17:29             ` Kalle Valo
2021-06-23 17:29               ` Kalle Valo
2021-06-24  6:09               ` Manivannan Sadhasivam
2021-06-24  6:09                 ` Manivannan Sadhasivam
2021-06-23 17:34         ` Kalle Valo
2021-06-23 17:34           ` Kalle Valo
2021-06-23 21:33           ` Bhaumik Bhatt
2021-06-23 21:33             ` Bhaumik Bhatt
2021-05-06 19:51 ` [PATCH v4 5/6] bus: mhi: pci_generic: Set " Bhaumik Bhatt
2021-05-06 19:51   ` Bhaumik Bhatt
2021-05-21 13:52   ` Manivannan Sadhasivam
2021-05-21 13:52     ` Manivannan Sadhasivam
2021-05-06 19:51 ` [PATCH v4 6/6] bus: mhi: core: Add range checks for BHI and BHIe Bhaumik Bhatt
2021-05-06 19:51   ` Bhaumik Bhatt
2021-05-07  2:33   ` Hemant Kumar
2021-05-07  2:33     ` Hemant Kumar
2021-05-21 13:54   ` Manivannan Sadhasivam
2021-05-21 13:54     ` Manivannan Sadhasivam
2021-06-25  5:28 ` Manivannan Sadhasivam [this message]
2021-06-25  5:28   ` [PATCH v4 0/6] BHI/BHIe improvements for MHI power purposes Manivannan Sadhasivam
  -- strict thread matches above, loose matches on Subject: below --
2021-05-06 19:32 Bhaumik Bhatt
2021-05-06 19:32 ` Bhaumik Bhatt

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