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From: Xu Yilun <yilun.xu@intel.com>
To: "Martin Hundebøll" <martin@geanix.com>
Cc: "Wu Hao" <hao.wu@intel.com>, "Tom Rix" <trix@redhat.com>,
	"Moritz Fischer" <mdf@kernel.org>,
	"Jean Delvare" <jdelvare@suse.com>,
	"Guenter Roeck" <linux@roeck-us.net>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Mark Brown" <broonie@kernel.org>,
	"Martin Hundebøll" <mhu@silicom.dk>,
	linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-hwmon@vger.kernel.org, linux-spi@vger.kernel.org
Subject: Re: [PATCH v2 3/5] spi: spi-altera-dfl: support n5010 feature revision
Date: Mon, 28 Jun 2021 13:58:41 +0800	[thread overview]
Message-ID: <20210628055841.GC72330@yilunxu-OptiPlex-7050> (raw)
In-Reply-To: <20210625074213.654274-4-martin@geanix.com>

It is good to me.

On Fri, Jun 25, 2021 at 09:42:11AM +0200, Martin Hundebøll wrote:
> From: Martin Hundebøll <mhu@silicom.dk>
> 
> The Max10 BMC on the Silicom n5010 PAC is slightly different than the
> existing BMC's, so use a dedicated feature revision detect it.
> 
> Signed-off-by: Martin Hundebøll <mhu@silicom.dk>
> ---
> 
> Changes since v1:
>  * use feature revision from struct dfl_device instead of reading it
>    from io-mem
> 
>  drivers/spi/spi-altera-dfl.c | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/spi/spi-altera-dfl.c b/drivers/spi/spi-altera-dfl.c
> index 3e32e4fe5895..f6cf7c8d9dac 100644
> --- a/drivers/spi/spi-altera-dfl.c
> +++ b/drivers/spi/spi-altera-dfl.c
> @@ -111,6 +111,13 @@ static struct spi_board_info m10_bmc_info = {
>  	.chip_select = 0,
>  };
>  
> +static struct spi_board_info m10_n5010_bmc_info = {
> +	.modalias = "m10-n5010",
> +	.max_speed_hz = 12500000,
> +	.bus_num = 0,
> +	.chip_select = 0,
> +};
> +
>  static void config_spi_master(void __iomem *base, struct spi_master *master)
>  {
>  	u64 v;
> @@ -130,6 +137,7 @@ static void config_spi_master(void __iomem *base, struct spi_master *master)
>  
>  static int dfl_spi_altera_probe(struct dfl_device *dfl_dev)
>  {
> +	struct spi_board_info *board_info = &m10_bmc_info;
>  	struct device *dev = &dfl_dev->dev;
>  	struct spi_master *master;
>  	struct altera_spi *hw;
> @@ -172,9 +180,12 @@ static int dfl_spi_altera_probe(struct dfl_device *dfl_dev)
>  		goto exit;
>  	}
>  
> -	if (!spi_new_device(master,  &m10_bmc_info)) {
> +	if (dfl_dev->revision == FME_FEATURE_REV_MAX10_SPI_N5010)
> +		board_info = &m10_n5010_bmc_info;
> +
> +	if (!spi_new_device(master, board_info)) {
>  		dev_err(dev, "%s failed to create SPI device: %s\n",
> -			__func__, m10_bmc_info.modalias);
> +			__func__, board_info->modalias);
>  	}
>  
>  	return 0;
> -- 
> 2.31.0

  reply	other threads:[~2021-06-28  6:04 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-25  7:42 [PATCH v2 0/5] fpga/mfd/hwmon: Initial support for Silicom N5010 PAC Martin Hundebøll
2021-06-25  7:42 ` [PATCH v2 1/5] fpga: dfl: pci: add device IDs for Silicom N501x PAC cards Martin Hundebøll
2021-06-25 18:43   ` Moritz Fischer
2021-06-25  7:42 ` [PATCH v2 2/5] fpga: dfl: expose feature revision from struct dfl_device Martin Hundebøll
2021-06-25 19:26   ` Moritz Fischer
2021-06-28  3:38     ` Wu, Hao
2021-06-25  7:42 ` [PATCH v2 3/5] spi: spi-altera-dfl: support n5010 feature revision Martin Hundebøll
2021-06-28  5:58   ` Xu Yilun [this message]
2021-06-28 17:39   ` Moritz Fischer
2021-06-29 11:35     ` Mark Brown
2021-06-29 11:49     ` Martin Hundebøll
2021-06-29 14:37       ` Wu, Hao
2021-06-29 22:30         ` matthew.gerlach
2021-06-25  7:42 ` [PATCH v2 4/5] mfd: intel-m10-bmc: add n5010 variant Martin Hundebøll
2021-06-25 18:45   ` Moritz Fischer
2021-06-29  1:39     ` Xu Yilun
2021-06-28  5:59   ` Xu Yilun
2021-06-28 10:33     ` Lee Jones
2021-06-30 10:57   ` Lee Jones
2021-06-25  7:42 ` [PATCH v2 5/5] hwmon: intel-m10-bmc-hwmon: add n5010 sensors Martin Hundebøll
2021-06-28  6:00   ` Xu Yilun
2021-06-28 14:11     ` Guenter Roeck
2021-06-28 16:35   ` Guenter Roeck
2021-06-28 17:28     ` Moritz Fischer
2021-06-29  1:40       ` Xu Yilun

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