From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 793B7C11F66 for ; Tue, 29 Jun 2021 11:41:21 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E573E6121E for ; Tue, 29 Jun 2021 11:41:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E573E6121E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=rock-chips.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id BD94E83198; Tue, 29 Jun 2021 13:39:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=rock-chips.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 33F7E8313E; Tue, 29 Jun 2021 10:45:32 +0200 (CEST) Received: from lucky1.263xmail.com (lucky1.263xmail.com [211.157.147.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 8D16D83131 for ; Tue, 29 Jun 2021 10:45:29 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=rock-chips.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=jon.lin@rock-chips.com Received: from localhost (unknown [192.168.167.70]) by lucky1.263xmail.com (Postfix) with ESMTP id 5B563FAF59; Tue, 29 Jun 2021 16:45:26 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-SKE-CHECKED: 1 X-ANTISPAM-LEVEL: 2 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P13447T140124685846272S1624956323963554_; Tue, 29 Jun 2021 16:45:25 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <5dd6e73e0ef61ba2ad99421d588e6ee4> X-RL-SENDER: jon.lin@rock-chips.com X-SENDER: jon.lin@rock-chips.com X-LOGIN-NAME: jon.lin@rock-chips.com X-FST-TO: u-boot@lists.denx.de X-RCPT-COUNT: 9 X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-System-Flag: 0 From: Jon Lin To: u-boot@lists.denx.de Cc: heiko.stuebner@theobroma-systems.com, vigneshr@ti.com, jagan@amarulasolutions.com, kever.yang@rock-chips.com, philipp.tomsich@vrull.eu, sjg@chromium.org, macromorgan@hotmail.com, Jon Lin Subject: [PATCH v5 5/5] rockchip: px30: add support for SFC for Odroid Go Advance Date: Tue, 29 Jun 2021 16:45:23 +0800 Message-Id: <20210629163827.v5.5.Id7d2651c4d3564a1c72eeef29a01f6575259009d@changeid> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210629084438.4267-1-jon.lin@rock-chips.com> References: <20210629084438.4267-1-jon.lin@rock-chips.com> X-Mailman-Approved-At: Tue, 29 Jun 2021 13:39:07 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: Chris Morgan The Odroid Go Advance uses a Rockchip Serial Flash Controller with an XT25F128B SPI NOR flash chip. This adds support for both. Note that while both the controller and chip support quad mode, only two lines are connected to the chip. Changing the pinctrl to bus2 and setting tx and rx lines to 2 for this reason. Signed-off-by: Chris Morgan Signed-off-by: Jon Lin --- (no changes since v1) arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 17 +++++++++++++++++ arch/arm/dts/rk3326-odroid-go2.dts | 16 ++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi index 00767d2abd..741e8dd935 100644 --- a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi +++ b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi @@ -7,6 +7,15 @@ chosen { u-boot,spl-boot-order = &sdmmc; }; + + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdmmc; + serial1 = &uart1; + serial2 = &uart2; + spi0 = &sfc; + }; }; &cru { @@ -57,6 +66,14 @@ u-boot,spl-fifo-mode; }; +&sfc { + u-boot,dm-pre-reloc; +}; + +&spi_flash { + u-boot,dm-pre-reloc; +}; + &uart1 { clock-frequency = <24000000>; u-boot,dm-pre-reloc; diff --git a/arch/arm/dts/rk3326-odroid-go2.dts b/arch/arm/dts/rk3326-odroid-go2.dts index 8cd4688c49..6f91f5040b 100644 --- a/arch/arm/dts/rk3326-odroid-go2.dts +++ b/arch/arm/dts/rk3326-odroid-go2.dts @@ -617,6 +617,22 @@ status = "okay"; }; +&sfc { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>; + status = "okay"; + + spi_flash: xt25f128b@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <108000000>; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <2>; + }; +}; + &tsadc { status = "okay"; }; -- 2.17.1