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From: "Cédric Le Goater" <clg@kaod.org>
To: linuxppc-dev@lists.ozlabs.org
Cc: "Cédric Le Goater" <clg@kaod.org>
Subject: [PATCH v2 17/32] powerpc/xics: Rename the map handler in a check handler
Date: Thu,  1 Jul 2021 15:27:35 +0200	[thread overview]
Message-ID: <20210701132750.1475580-18-clg@kaod.org> (raw)
In-Reply-To: <20210701132750.1475580-1-clg@kaod.org>

This moves the IRQ initialization done under the different ICS backends
in the common part of XICS. The 'map' handler becomes a simple 'check'
on the HW IRQ at the FW level.

As we don't need an ICS anymore in xics_migrate_irqs_away(), the XICS
domain does not set a chip data for the IRQ.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 arch/powerpc/include/asm/xics.h        |  3 ++-
 arch/powerpc/sysdev/xics/ics-native.c  | 13 +++++-------
 arch/powerpc/sysdev/xics/ics-opal.c    | 27 +++++++++----------------
 arch/powerpc/sysdev/xics/ics-rtas.c    | 28 +++++++++-----------------
 arch/powerpc/sysdev/xics/xics-common.c | 15 ++++++++------
 5 files changed, 36 insertions(+), 50 deletions(-)

diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h
index 584dcf903590..e76d835dc03f 100644
--- a/arch/powerpc/include/asm/xics.h
+++ b/arch/powerpc/include/asm/xics.h
@@ -89,10 +89,11 @@ static inline int ics_opal_init(void) { return -ENODEV; }
 /* ICS instance, hooked up to chip_data of an irq */
 struct ics {
 	struct list_head link;
-	int (*map)(struct ics *ics, unsigned int virq);
+	int (*check)(struct ics *ics, unsigned int hwirq);
 	void (*mask_unknown)(struct ics *ics, unsigned long vec);
 	long (*get_server)(struct ics *ics, unsigned long vec);
 	int (*host_match)(struct ics *ics, struct device_node *node);
+	struct irq_chip *chip;
 	char data[];
 };
 
diff --git a/arch/powerpc/sysdev/xics/ics-native.c b/arch/powerpc/sysdev/xics/ics-native.c
index d450502f4053..dec7d93a8ba1 100644
--- a/arch/powerpc/sysdev/xics/ics-native.c
+++ b/arch/powerpc/sysdev/xics/ics-native.c
@@ -131,19 +131,15 @@ static struct irq_chip ics_native_irq_chip = {
 	.irq_retrigger		= xics_retrigger,
 };
 
-static int ics_native_map(struct ics *ics, unsigned int virq)
+static int ics_native_check(struct ics *ics, unsigned int hw_irq)
 {
-	unsigned int vec = (unsigned int)virq_to_hw(virq);
 	struct ics_native *in = to_ics_native(ics);
 
-	pr_devel("%s: vec=0x%x\n", __func__, vec);
+	pr_devel("%s: hw_irq=0x%x\n", __func__, hw_irq);
 
-	if (vec < in->ibase || vec >= (in->ibase + in->icount))
+	if (hw_irq < in->ibase || hw_irq >= (in->ibase + in->icount))
 		return -EINVAL;
 
-	irq_set_chip_and_handler(virq, &ics_native_irq_chip, handle_fasteoi_irq);
-	irq_set_chip_data(virq, ics);
-
 	return 0;
 }
 
@@ -177,10 +173,11 @@ static int ics_native_host_match(struct ics *ics, struct device_node *node)
 }
 
 static struct ics ics_native_template = {
-	.map		= ics_native_map,
+	.check		= ics_native_check,
 	.mask_unknown	= ics_native_mask_unknown,
 	.get_server	= ics_native_get_server,
 	.host_match	= ics_native_host_match,
+	.chip = &ics_native_irq_chip,
 };
 
 static int __init ics_native_add_one(struct device_node *np)
diff --git a/arch/powerpc/sysdev/xics/ics-opal.c b/arch/powerpc/sysdev/xics/ics-opal.c
index 823f6c9664cd..8c7ddcc718b6 100644
--- a/arch/powerpc/sysdev/xics/ics-opal.c
+++ b/arch/powerpc/sysdev/xics/ics-opal.c
@@ -157,26 +157,13 @@ static struct irq_chip ics_opal_irq_chip = {
 	.irq_retrigger = xics_retrigger,
 };
 
-static int ics_opal_map(struct ics *ics, unsigned int virq);
-static void ics_opal_mask_unknown(struct ics *ics, unsigned long vec);
-static long ics_opal_get_server(struct ics *ics, unsigned long vec);
-
 static int ics_opal_host_match(struct ics *ics, struct device_node *node)
 {
 	return 1;
 }
 
-/* Only one global & state struct ics */
-static struct ics ics_hal = {
-	.map		= ics_opal_map,
-	.mask_unknown	= ics_opal_mask_unknown,
-	.get_server	= ics_opal_get_server,
-	.host_match	= ics_opal_host_match,
-};
-
-static int ics_opal_map(struct ics *ics, unsigned int virq)
+static int ics_opal_check(struct ics *ics, unsigned int hw_irq)
 {
-	unsigned int hw_irq = (unsigned int)virq_to_hw(virq);
 	int64_t rc;
 	__be16 server;
 	int8_t priority;
@@ -189,9 +176,6 @@ static int ics_opal_map(struct ics *ics, unsigned int virq)
 	if (rc != OPAL_SUCCESS)
 		return -ENXIO;
 
-	irq_set_chip_and_handler(virq, &ics_opal_irq_chip, handle_fasteoi_irq);
-	irq_set_chip_data(virq, &ics_hal);
-
 	return 0;
 }
 
@@ -222,6 +206,15 @@ static long ics_opal_get_server(struct ics *ics, unsigned long vec)
 	return ics_opal_unmangle_server(be16_to_cpu(server));
 }
 
+/* Only one global & state struct ics */
+static struct ics ics_hal = {
+	.check		= ics_opal_check,
+	.mask_unknown	= ics_opal_mask_unknown,
+	.get_server	= ics_opal_get_server,
+	.host_match	= ics_opal_host_match,
+	.chip		= &ics_opal_irq_chip,
+};
+
 int __init ics_opal_init(void)
 {
 	if (!firmware_has_feature(FW_FEATURE_OPAL))
diff --git a/arch/powerpc/sysdev/xics/ics-rtas.c b/arch/powerpc/sysdev/xics/ics-rtas.c
index 4cf18000f07c..6d19d711ed35 100644
--- a/arch/powerpc/sysdev/xics/ics-rtas.c
+++ b/arch/powerpc/sysdev/xics/ics-rtas.c
@@ -24,19 +24,6 @@ static int ibm_set_xive;
 static int ibm_int_on;
 static int ibm_int_off;
 
-static int ics_rtas_map(struct ics *ics, unsigned int virq);
-static void ics_rtas_mask_unknown(struct ics *ics, unsigned long vec);
-static long ics_rtas_get_server(struct ics *ics, unsigned long vec);
-static int ics_rtas_host_match(struct ics *ics, struct device_node *node);
-
-/* Only one global & state struct ics */
-static struct ics ics_rtas = {
-	.map		= ics_rtas_map,
-	.mask_unknown	= ics_rtas_mask_unknown,
-	.get_server	= ics_rtas_get_server,
-	.host_match	= ics_rtas_host_match,
-};
-
 static void ics_rtas_unmask_irq(struct irq_data *d)
 {
 	unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
@@ -169,9 +156,8 @@ static struct irq_chip ics_rtas_irq_chip = {
 	.irq_retrigger = xics_retrigger,
 };
 
-static int ics_rtas_map(struct ics *ics, unsigned int virq)
+static int ics_rtas_check(struct ics *ics, unsigned int hw_irq)
 {
-	unsigned int hw_irq = (unsigned int)virq_to_hw(virq);
 	int status[2];
 	int rc;
 
@@ -183,9 +169,6 @@ static int ics_rtas_map(struct ics *ics, unsigned int virq)
 	if (rc)
 		return -ENXIO;
 
-	irq_set_chip_and_handler(virq, &ics_rtas_irq_chip, handle_fasteoi_irq);
-	irq_set_chip_data(virq, &ics_rtas);
-
 	return 0;
 }
 
@@ -213,6 +196,15 @@ static int ics_rtas_host_match(struct ics *ics, struct device_node *node)
 	return !of_device_is_compatible(node, "chrp,iic");
 }
 
+/* Only one global & state struct ics */
+static struct ics ics_rtas = {
+	.check		= ics_rtas_check,
+	.mask_unknown	= ics_rtas_mask_unknown,
+	.get_server	= ics_rtas_get_server,
+	.host_match	= ics_rtas_host_match,
+	.chip = &ics_rtas_irq_chip,
+};
+
 __init int ics_rtas_init(void)
 {
 	ibm_get_xive = rtas_token("ibm,get-xive");
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
index 05e5e7d84ca7..399dd5becf65 100644
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -318,10 +318,10 @@ static struct irq_chip xics_ipi_chip = {
 	.irq_unmask = xics_ipi_unmask,
 };
 
-static int xics_host_map(struct irq_domain *h, unsigned int virq,
-			 irq_hw_number_t hw)
+static int xics_host_map(struct irq_domain *domain, unsigned int virq,
+			 irq_hw_number_t hwirq)
 {
-	pr_devel("xics: map virq %d, hwirq 0x%lx\n", virq, hw);
+	pr_devel("xics: map virq %d, hwirq 0x%lx\n", virq, hwirq);
 
 	/*
 	 * Mark interrupts as edge sensitive by default so that resend
@@ -331,7 +331,7 @@ static int xics_host_map(struct irq_domain *h, unsigned int virq,
 	irq_clear_status_flags(virq, IRQ_LEVEL);
 
 	/* Don't call into ICS for IPIs */
-	if (hw == XICS_IPI) {
+	if (hwirq == XICS_IPI) {
 		irq_set_chip_and_handler(virq, &xics_ipi_chip,
 					 handle_percpu_irq);
 		return 0;
@@ -340,10 +340,13 @@ static int xics_host_map(struct irq_domain *h, unsigned int virq,
 	if (WARN_ON(!xics_ics))
 		return -EINVAL;
 
-	/* Let the ICS setup the chip data */
-	if (xics_ics->map(xics_ics, virq))
+	if (xics_ics->check(xics_ics, hwirq))
 		return -EINVAL;
 
+	/* No chip data for the XICS domain */
+	irq_domain_set_info(domain, virq, hwirq, xics_ics->chip,
+			    NULL, handle_fasteoi_irq, NULL, NULL);
+
 	return 0;
 }
 
-- 
2.31.1


  parent reply	other threads:[~2021-07-01 13:36 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-01 13:27 [PATCH v2 00/32] powerpc: Add MSI IRQ domains to PCI drivers Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 01/32] powerpc/pseries/pci: Introduce __find_pe_total_msi() Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 02/32] powerpc/pseries/pci: Introduce rtas_prepare_msi_irqs() Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 03/32] powerpc/xive: Add support for IRQ domain hierarchy Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 04/32] powerpc/xive: Ease debugging of xive_irq_set_affinity() Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 05/32] powerpc/pseries/pci: Add MSI domains Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 06/32] powerpc/xive: Drop unmask of MSIs at startup Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 07/32] powerpc/xive: Remove irqd_is_started() check when setting the affinity Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 08/32] powerpc/pseries/pci: Add a domain_free_irqs() handler Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 09/32] powerpc/pseries/pci: Add a msi_free() handler to clear XIVE data Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 10/32] powerpc/pseries/pci: Add support of MSI domains to PHB hotplug Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 11/32] powerpc/powernv/pci: Introduce __pnv_pci_ioda_msi_setup() Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 12/32] powerpc/powernv/pci: Add MSI domains Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 13/32] KVM: PPC: Book3S HV: Use the new IRQ chip to detect passthrough interrupts Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 14/32] KVM: PPC: Book3S HV: XIVE: Change interface of passthrough interrupt routines Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 15/32] KVM: PPC: Book3S HV: XIVE: Fix mapping of passthrough interrupts Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 16/32] powerpc/xics: Remove ICS list Cédric Le Goater
2021-07-01 13:27 ` Cédric Le Goater [this message]
2021-07-01 13:27 ` [PATCH v2 18/32] powerpc/xics: Give a name to the default XICS IRQ domain Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 19/32] powerpc/xics: Add debug logging to the set_irq_affinity handlers Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 20/32] powerpc/xics: Add support for IRQ domain hierarchy Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 21/32] powerpc/powernv/pci: Customize the MSI EOI handler to support PHB3 Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 22/32] powerpc/pci: Drop XIVE restriction on MSI domains Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 23/32] powerpc/xics: Drop unmask of MSIs at startup Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 24/32] powerpc/pseries/pci: Drop unused MSI code Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 25/32] powerpc/powernv/pci: " Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 26/32] powerpc/powernv/pci: Adapt is_pnv_opal_msi() to detect passthrough interrupt Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 27/32] powerpc/xics: Fix IRQ migration Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 28/32] powerpc/powernv/pci: Set the IRQ chip data for P8/CXL devices Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 29/32] powerpc/powernv/pci: Rework pnv_opal_pci_msi_eoi() Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 30/32] KVM: PPC: Book3S HV: XICS: Fix mapping of passthrough interrupts Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 31/32] powerpc/xive: Use XIVE domain under xmon and debugfs Cédric Le Goater
2021-07-01 13:27 ` [PATCH v2 32/32] genirq: Improve "hwirq" output in /proc and /sys/ Cédric Le Goater
2021-08-18 13:38 ` [PATCH v2 00/32] powerpc: Add MSI IRQ domains to PCI drivers Michael Ellerman

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