From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,LOTS_OF_MONEY,MAILING_LIST_MULTI, MONEY_NOHTML,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 730C8C07E96 for ; Tue, 6 Jul 2021 16:20:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4C36061C23 for ; Tue, 6 Jul 2021 16:20:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229975AbhGFQWw (ORCPT ); Tue, 6 Jul 2021 12:22:52 -0400 Received: from mail.kernel.org ([198.145.29.99]:36942 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229950AbhGFQWw (ORCPT ); Tue, 6 Jul 2021 12:22:52 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 7199261C1E; Tue, 6 Jul 2021 16:20:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1625588413; bh=wivfzKvO7QjbWe7xoBqum+UKLZPnnJG01B1fLnMsQ/k=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Sklfkg/yYIDoQhdk6paF/p2kHH9v0F+0J1Tup0t4ueWffY5QOBEfJ1MHkpRguw5HV 9tsIY7ndEyp39GYVNkTA2HqnYywPYXqUbrvyruuhByhkvvp4xmPvcUx3873JtWeH0Y rbtT0sMo6OTuoIE6OKJPPBELwEvS8a5a/YDKWx7VKZ7NDaicVuN5v3zpyX4Q8xX/eq vgcONB7LYDjvhgzOfBiksBF2bOh+2/eY2QXlqTpo8SWoMeoVPIT8mxTAoMt0Ud5ahb FmKKChHxJMDgTOMorrB8Hp4XOGq4y9FKLOu3ogfiCZgZnkY6cC9MYOy0INUGUM16Aq /hAkv6C6jCOiA== Date: Tue, 6 Jul 2021 17:20:08 +0100 From: Will Deacon To: Arnd Bergmann Cc: Marc Zyngier , Robin Murphy , Catalin Marinas , Yassine Oudjana , Ard Biesheuvel , Android Kernel Team , Linux ARM , Mark Rutland , Vincent Whitchurch , linux-arm-msm Subject: Re: [PATCH] arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES) Message-ID: <20210706162007.GA20541@willie-the-truck> References: <20210527124356.22367-1-will@kernel.org> <20210706102634.GB24903@arm.com> <59800d6c-364a-f4be-e341-c5b531657ba3@arm.com> <20210706133314.GB20327@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Tue, Jul 06, 2021 at 04:30:34PM +0200, Arnd Bergmann wrote: > On Tue, Jul 6, 2021 at 3:44 PM Marc Zyngier wrote: > > > > On 2021-07-06 14:33, Will Deacon wrote: > > > On Tue, Jul 06, 2021 at 02:29:07PM +0100, Robin Murphy wrote: > > > > > > I can't find much information about the original Kryo core at all... > > > > I have similar issues with my QDF2400. The UART, RTC and DMA controllers > > are all screaming at me. I'm confident that the UART doesn't do any > > DMA (it is handled by the SBSA driver), but the DMA controllers are > > probably doing what it says on the tin. > > But that's a server chip, surely the DMA controller is fully cache coherent > as required by SBSA? (please?) > > Maybe just a misannotation on the device node? > > > Do we know whether Falkor and Kryo share any part of their design? > > I'm fairly sure the Snapdragon 821 / msm8996 is not cache coherent. > > I can only speculate on how much got reused between the two, but > as Falkor was released only after they had already given up on > the full-custom Kryo core, it's plausible that it incorporates bits from > that one. In particular the cache controller is probably easy to reuse > even if the rest of it was a new design. I think the million dollar question is whether the 128-byte cache-lines live in a cache above the PoC or not. If it's just a system level cache through which all DMA is "coherent", then it doesn't matter. Digging around on the web, it's unclear whether msm8996 has an L3 or not. Will From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,LOTS_OF_MONEY,MAILING_LIST_MULTI,MONEY_NOHTML, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC4F4C07E96 for ; Tue, 6 Jul 2021 16:22:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7C34061C25 for ; Tue, 6 Jul 2021 16:22:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7C34061C25 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=gMUbkmlMbJx6/MzTbzo1puKyZKXMB/A3htuMhUZv7NM=; b=Yiy7hdBSprQ+Er lGCAaUQBdhbpCvhkz8tzME05JVYA7t1VoBrV3zazr79Nu5VcsIbv5Mah/UB0hLAk2l62FpBVz7rg7 8LH/InEjj8HJeGcIU7L35N71FP6ke00QMwkE+oXV3UlZ0D/QRY/EVWEw9E29s+WCTm1Nixg6UzOwl ORi91eXY6hp7S9ngF2vSCGRddnkIyUWq0gSgUmdNmPpyM331mTVb9Is82gWEwchFonveogGTO+ZZF xAL1lUrTDvele6yMr1E7ZAgDRcvK74caLfAgtr0aEp3AX/8+ZpIf4+aGg6cDERSxVTOSm3w4b4tSv HHo6xfa3xeAusez+Ge4A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1m0no2-00CFbL-Kv; Tue, 06 Jul 2021 16:20:18 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1m0nny-00CFan-T5 for linux-arm-kernel@lists.infradead.org; Tue, 06 Jul 2021 16:20:16 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 7199261C1E; Tue, 6 Jul 2021 16:20:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1625588413; bh=wivfzKvO7QjbWe7xoBqum+UKLZPnnJG01B1fLnMsQ/k=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Sklfkg/yYIDoQhdk6paF/p2kHH9v0F+0J1Tup0t4ueWffY5QOBEfJ1MHkpRguw5HV 9tsIY7ndEyp39GYVNkTA2HqnYywPYXqUbrvyruuhByhkvvp4xmPvcUx3873JtWeH0Y rbtT0sMo6OTuoIE6OKJPPBELwEvS8a5a/YDKWx7VKZ7NDaicVuN5v3zpyX4Q8xX/eq vgcONB7LYDjvhgzOfBiksBF2bOh+2/eY2QXlqTpo8SWoMeoVPIT8mxTAoMt0Ud5ahb FmKKChHxJMDgTOMorrB8Hp4XOGq4y9FKLOu3ogfiCZgZnkY6cC9MYOy0INUGUM16Aq /hAkv6C6jCOiA== Date: Tue, 6 Jul 2021 17:20:08 +0100 From: Will Deacon To: Arnd Bergmann Cc: Marc Zyngier , Robin Murphy , Catalin Marinas , Yassine Oudjana , Ard Biesheuvel , Android Kernel Team , Linux ARM , Mark Rutland , Vincent Whitchurch , linux-arm-msm Subject: Re: [PATCH] arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES) Message-ID: <20210706162007.GA20541@willie-the-truck> References: <20210527124356.22367-1-will@kernel.org> <20210706102634.GB24903@arm.com> <59800d6c-364a-f4be-e341-c5b531657ba3@arm.com> <20210706133314.GB20327@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210706_092015_000753_B9AE16DB X-CRM114-Status: GOOD ( 22.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jul 06, 2021 at 04:30:34PM +0200, Arnd Bergmann wrote: > On Tue, Jul 6, 2021 at 3:44 PM Marc Zyngier wrote: > > > > On 2021-07-06 14:33, Will Deacon wrote: > > > On Tue, Jul 06, 2021 at 02:29:07PM +0100, Robin Murphy wrote: > > > > > > I can't find much information about the original Kryo core at all... > > > > I have similar issues with my QDF2400. The UART, RTC and DMA controllers > > are all screaming at me. I'm confident that the UART doesn't do any > > DMA (it is handled by the SBSA driver), but the DMA controllers are > > probably doing what it says on the tin. > > But that's a server chip, surely the DMA controller is fully cache coherent > as required by SBSA? (please?) > > Maybe just a misannotation on the device node? > > > Do we know whether Falkor and Kryo share any part of their design? > > I'm fairly sure the Snapdragon 821 / msm8996 is not cache coherent. > > I can only speculate on how much got reused between the two, but > as Falkor was released only after they had already given up on > the full-custom Kryo core, it's plausible that it incorporates bits from > that one. In particular the cache controller is probably easy to reuse > even if the rest of it was a new design. I think the million dollar question is whether the 128-byte cache-lines live in a cache above the PoC or not. If it's just a system level cache through which all DMA is "coherent", then it doesn't matter. Digging around on the web, it's unclear whether msm8996 has an L3 or not. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel