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Tue, 06 Jul 2021 16:49:44 -0700 (PDT) Received: from localhost.localdomain ([71.212.149.176]) by smtp.gmail.com with ESMTPSA id b3sm18058114pfi.179.2021.07.06.16.49.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jul 2021 16:49:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 16/36] linux-user/arm: Add vdso and use it for rt_sigreturn Date: Tue, 6 Jul 2021 16:49:12 -0700 Message-Id: <20210706234932.356913-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210706234932.356913-1-richard.henderson@linaro.org> References: <20210706234932.356913-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Building of the vdsos are not actually wired up to anything, since we require a cross-compiler. Just check in the files for now. The thumb vdso will only be used for m-profile, as all of our a-profile cpus support arm mode. Cc: qemu-arm@nongnu.org Signed-off-by: Richard Henderson --- linux-user/arm/signal.c | 83 +++----------- linux-user/elfload.c | 24 ++++ linux-user/arm/Makefile.vdso | 17 +++ linux-user/arm/meson.build | 18 +++ linux-user/arm/vdso-arm-be.so | Bin 0 -> 5648 bytes linux-user/arm/vdso-arm-le.so | Bin 0 -> 5648 bytes linux-user/arm/vdso-thm-be.so | Bin 0 -> 5620 bytes linux-user/arm/vdso-thm-le.so | Bin 0 -> 5620 bytes linux-user/arm/vdso.S | 209 ++++++++++++++++++++++++++++++++++ linux-user/arm/vdso.ld | 74 ++++++++++++ 10 files changed, 359 insertions(+), 66 deletions(-) create mode 100644 linux-user/arm/Makefile.vdso create mode 100755 linux-user/arm/vdso-arm-be.so create mode 100755 linux-user/arm/vdso-arm-le.so create mode 100755 linux-user/arm/vdso-thm-be.so create mode 100755 linux-user/arm/vdso-thm-le.so create mode 100644 linux-user/arm/vdso.S create mode 100644 linux-user/arm/vdso.ld diff --git a/linux-user/arm/signal.c b/linux-user/arm/signal.c index 565a355fc4..8edc1b1373 100644 --- a/linux-user/arm/signal.c +++ b/linux-user/arm/signal.c @@ -102,40 +102,6 @@ struct rt_sigframe abi_ulong retcode[4]; }; -/* - * For ARM syscalls, we encode the syscall number into the instruction. - */ -#define SWI_SYS_SIGRETURN (0xef000000|(TARGET_NR_sigreturn + ARM_SYSCALL_BASE)) -#define SWI_SYS_RT_SIGRETURN (0xef000000|(TARGET_NR_rt_sigreturn + ARM_SYSCALL_BASE)) - -/* - * For Thumb syscalls, we pass the syscall number via r7. We therefore - * need two 16-bit instructions. - */ -#define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (TARGET_NR_sigreturn)) -#define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (TARGET_NR_rt_sigreturn)) - -static const abi_ulong retcodes[4] = { - SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN, - SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN -}; - -/* - * Stub needed to make sure the FD register (r9) contains the right - * value. - */ -static const unsigned long sigreturn_fdpic_codes[3] = { - 0xe59fc004, /* ldr r12, [pc, #4] to read function descriptor */ - 0xe59c9004, /* ldr r9, [r12, #4] to setup GOT */ - 0xe59cf000 /* ldr pc, [r12] to jump into restorer */ -}; - -static const unsigned long sigreturn_fdpic_thumb_codes[3] = { - 0xc008f8df, /* ldr r12, [pc, #8] to read function descriptor */ - 0x9004f8dc, /* ldr r9, [r12, #4] to setup GOT */ - 0xf000f8dc /* ldr pc, [r12] to jump into restorer */ -}; - static inline int valid_user_regs(CPUARMState *regs) { return 1; @@ -188,9 +154,10 @@ setup_return(CPUARMState *env, struct target_sigaction *ka, abi_ulong handler = 0; abi_ulong handler_fdpic_GOT = 0; abi_ulong retcode; - - int thumb; - int is_fdpic = info_is_fdpic(((TaskState *)thread_cpu->opaque)->info); + bool thumb; + bool is_fdpic = info_is_fdpic(((TaskState *)thread_cpu->opaque)->info); + uint32_t cpsr; + int idx; if (is_fdpic) { /* In FDPIC mode, ka->_sa_handler points to a function @@ -208,7 +175,7 @@ setup_return(CPUARMState *env, struct target_sigaction *ka, thumb = handler & 1; - uint32_t cpsr = cpsr_read(env); + cpsr = cpsr_read(env); cpsr &= ~CPSR_IT; if (thumb) { @@ -222,39 +189,23 @@ setup_return(CPUARMState *env, struct target_sigaction *ka, cpsr &= ~CPSR_E; } + /* Our vdso default_sigreturn label is a table of entry points. */ + idx = is_fdpic * 2 + ((ka->sa_flags & TARGET_SA_SIGINFO) != 0); + retcode = default_sigreturn + idx * 16; + + /* + * Put the sigreturn code on the stack no matter which return + * mechanism we use in order to remain ABI compliant. + */ + memcpy(rc, g2h_untagged(retcode & ~1), 16); + if (ka->sa_flags & TARGET_SA_RESTORER) { if (is_fdpic) { - /* For FDPIC we ensure that the restorer is called with a - * correct r9 value. For that we need to write code on - * the stack that sets r9 and jumps back to restorer - * value. - */ - if (thumb) { - __put_user(sigreturn_fdpic_thumb_codes[0], rc); - __put_user(sigreturn_fdpic_thumb_codes[1], rc + 1); - __put_user(sigreturn_fdpic_thumb_codes[2], rc + 2); - __put_user((abi_ulong)ka->sa_restorer, rc + 3); - } else { - __put_user(sigreturn_fdpic_codes[0], rc); - __put_user(sigreturn_fdpic_codes[1], rc + 1); - __put_user(sigreturn_fdpic_codes[2], rc + 2); - __put_user((abi_ulong)ka->sa_restorer, rc + 3); - } - - retcode = rc_addr + thumb; + /* Place the function descriptor in slot 3. */ + __put_user((abi_ulong)ka->sa_restorer, rc + 3); } else { retcode = ka->sa_restorer; } - } else { - unsigned int idx = thumb; - - if (ka->sa_flags & TARGET_SA_SIGINFO) { - idx += 2; - } - - __put_user(retcodes[idx], rc); - - retcode = rc_addr + thumb; } env->regs[0] = usig; diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 8088828f5f..40cc79b129 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -517,6 +517,30 @@ static const char *get_elf_platform(void) #undef END } +#ifdef TARGET_WORDS_BIGENDIAN +# include "vdso-arm-be.c.inc" +# include "vdso-thm-be.c.inc" +#else +# include "vdso-arm-le.c.inc" +# include "vdso-thm-le.c.inc" +#endif + +static const VdsoImageInfo *vdso_image_info(void) +{ + ARMCPU *cpu = ARM_CPU(thread_cpu); + + /* + * The only cpus we support that do *not* have arm mode are m-profile. + * It's not really possible to run Linux on these, but this config is + * useful for testing gcc. In any case, choose the vdso image that + * will work for the target cpu. + */ + return (cpu_isar_feature(aa32_a32, cpu) + ? &vdso_arm_image_info + : &vdso_thm_image_info); +} +#define vdso_image_info vdso_image_info + #else /* 64 bit ARM definitions */ #define ELF_START_MMAP 0x80000000 diff --git a/linux-user/arm/Makefile.vdso b/linux-user/arm/Makefile.vdso new file mode 100644 index 0000000000..89da6f91ae --- /dev/null +++ b/linux-user/arm/Makefile.vdso @@ -0,0 +1,17 @@ +CROSS_CC ?= arm-linux-gnueabihf-gcc +LDFLAGS := -nostdlib -shared -Wl,-T,vdso.ld \ + -Wl,-h,linux-vdso.so.1 -Wl,--hash-style=sysv -Wl,--build-id=sha1 + +all: vdso-arm-le.so vdso-arm-be.so vdso-thm-le.so vdso-thm-be.so + +vdso-arm-le.so: vdso.S vdso.ld Makefile.vdso + $(CROSS_CC) $(LDFLAGS) -mlittle-endian -marm vdso.S -o $@ + +vdso-arm-be.so: vdso.S vdso.ld Makefile.vdso + $(CROSS_CC) $(LDFLAGS) -mbig-endian -marm vdso.S -o $@ + +vdso-thm-le.so: vdso.S vdso.ld Makefile.vdso + $(CROSS_CC) $(LDFLAGS) -mlittle-endian -mthumb vdso.S -o $@ + +vdso-thm-be.so: vdso.S vdso.ld Makefile.vdso + $(CROSS_CC) $(LDFLAGS) -mbig-endian -mthumb vdso.S -o $@ diff --git a/linux-user/arm/meson.build b/linux-user/arm/meson.build index 5a93c925cf..66072411d6 100644 --- a/linux-user/arm/meson.build +++ b/linux-user/arm/meson.build @@ -5,3 +5,21 @@ syscall_nr_generators += { arguments: [ meson.current_source_dir() / 'syscallhdr.sh', '@INPUT@', '@OUTPUT@', '@EXTRA_ARGS@' ], output: '@BASENAME@_nr.h') } + +# ??? There does not seem to be a way to do +# when: ['TARGET_ARM', !'TARGET_WORDS_BIGENDIAN'] +# so we'd need to add TARGET_WORDS_LITTLEENDIAN. +# In the meantime, build both files for arm and armeb. + +gen = [ + gen_vdso.process('vdso-arm-be.so', + extra_args: ['-s', 'sigreturn_codes', '-p', 'vdso_arm']), + gen_vdso.process('vdso-arm-le.so', + extra_args: ['-s', 'sigreturn_codes', '-p', 'vdso_arm']), + gen_vdso.process('vdso-thm-be.so', + extra_args: ['-s', 'sigreturn_codes', '-p', 'vdso_thm']), + gen_vdso.process('vdso-thm-le.so', + extra_args: ['-s', 'sigreturn_codes', '-p', 'vdso_thm']), +] + +linux_user_ss.add(when: 'TARGET_ARM', if_true: gen) diff --git a/linux-user/arm/vdso-arm-be.so b/linux-user/arm/vdso-arm-be.so new file mode 100755 index 0000000000000000000000000000000000000000..197a8cc1b5303c0b5844272f2279eb79f9ddb724 GIT binary patch literal 5648 zcmeHL%}*Ow5T9LRV+a^0p-m+?xGD!!g{37ZiqtB?1PqZ3iTIF`(_(A~y9FEBOMr+d z?k8!Irbrx`OC?fq=q0^2Qd=d59{NZ0kSdClR#iVF)Ke<@`@Mb7n3PM^QzZ`>&-=~H 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__NR_OABI_SYSCALL_BASE) +.endm + +.macro fdpic_thunk ofs + ldr r3, [sp, #\ofs] + ldmia r3, {r3, r9} + bx r3 +.endm + +#endif + +.macro FUNC name + .globl \name + .type \name, %function +#ifdef __thumb__ + .thumb_func +#endif +\name: +.endm + +.macro ENDF name + .size \name, . - \name +.endm + +/* + * We must save/restore r7 for the EABI syscall number. + * While we're doing that, we might as well save LR to get a free return, + * and a branch that is interworking back to ARMv5. + */ + +.macro syscall n + .cfi_startproc + push {r7, lr} + .cfi_adjust_cfa_offset 8 + .cfi_offset r7, -8 + .cfi_offset lr, -4 + raw_syscall \n + pop {r7, pc} + .cfi_endproc +.endm + +FUNC __vdso_clock_gettime + syscall __NR_clock_gettime +ENDF __vdso_clock_gettime + +FUNC __vdso_clock_gettime64 + syscall __NR_clock_gettime64 +ENDF __vdso_clock_gettime64 + +FUNC __vdso_clock_getres + syscall __NR_clock_getres +ENDF __vdso_clock_getres + +FUNC __vdso_gettimeofday + syscall __NR_gettimeofday +ENDF __vdso_gettimeofday + + +/* + * We, like the real kernel, use a table of sigreturn trampolines. + * Unlike the real kernel, we do not attempt to pack this into as + * few bytes as possible -- simply use 16 bytes per slot. + * + * Within each slot, use the exact same code sequence as the kernel, + * lest we trip up someone doing code inspection. + */ + +/* offsetof(struct sigframe, retcode[3]) */ +#define SIGFRAME_RC3_OFFSET 756 +#define RT_SIGFRAME_RC3_OFFSET 884 + +.macro slot n + .balign 16 + .org sigreturn_codes + 16 * \n +.endm + +/* + * Start the unwind info at least one instruction before the signal + * trampoline, because the unwinder will assume we are returning + * after a call site. + */ + .cfi_startproc simple + .cfi_signal_frame + .cfi_return_column 15 + + .cfi_def_cfa sp, 32 + 64 + .cfi_offset r0, -16 * 4 + .cfi_offset r1, -15 * 4 + .cfi_offset r2, -14 * 4 + .cfi_offset r3, -13 * 4 + .cfi_offset r4, -12 * 4 + .cfi_offset r5, -11 * 4 + .cfi_offset r6, -10 * 4 + .cfi_offset r7, -9 * 4 + .cfi_offset r8, -8 * 4 + .cfi_offset r9, -7 * 4 + .cfi_offset r10, -6 * 4 + .cfi_offset r11, -5 * 4 + .cfi_offset r12, -4 * 4 + .cfi_offset r13, -3 * 4 + .cfi_offset r14, -2 * 4 + .cfi_offset r15, -1 * 4 + + nop + + .balign 16 +FUNC sigreturn_codes + /* [EO]ABI sigreturn */ + slot 0 + raw_syscall __NR_sigreturn + + .cfi_def_cfa_offset 160 + 64 + + /* [EO]ABI rt_sigreturn */ + slot 1 + raw_syscall __NR_rt_sigreturn + + .cfi_endproc + + .macro cfi_fdpic_pc ofs + /* + * fd = *(r13 + ofs) + * pc = *fd + * + * DW_CFA_expression lr (14), length (5), + * DW_OP_breg13, ofs, DW_OP_deref, DW_OP_deref + */ + .cfi_escape 0x10, 14, 5, 0x7d, (\ofs & 0x7f) + 0x80, (\ofs >> 7), 0x06, 0x06 + .endm + + .macro cfi_fdpic_r9 ofs + /* + * fd = *(r13 + ofs) + * r9 = *(fd + 4) + * + * DW_CFA_expression r9, length (7), + * DW_OP_breg13, ofs, DW_OP_deref, + * DW_OP_plus_uconst, 4, DW_OP_deref + */ + .cfi_escape 0x10, 9, 7, 0x7d, (\ofs & 0x7f) + 0x80, (\ofs >> 7), 0x06, 0x23, 4, 0x06 + .endm + + /* FDPIC sigreturn */ + .cfi_startproc + cfi_fdpic_pc SIGFRAME_RC3_OFFSET + cfi_fdpic_r9 SIGFRAME_RC3_OFFSET + + slot 2 + fdpic_thunk SIGFRAME_RC3_OFFSET + .cfi_endproc + + /* FDPIC rt_sigreturn */ + .cfi_startproc + cfi_fdpic_pc RT_SIGFRAME_RC3_OFFSET + cfi_fdpic_r9 RT_SIGFRAME_RC3_OFFSET + + slot 3 + fdpic_thunk RT_SIGFRAME_RC3_OFFSET + .cfi_endproc + + .balign 16 +ENDF sigreturn_codes diff --git a/linux-user/arm/vdso.ld b/linux-user/arm/vdso.ld new file mode 100644 index 0000000000..3bddef97a5 --- /dev/null +++ b/linux-user/arm/vdso.ld @@ -0,0 +1,74 @@ +/* + * Linker script for linux arm replacement vdso. + * + * Copyright 2021 Linaro, Ltd. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +VERSION { + LINUX_2.6 { + global: + __vdso_clock_gettime; + __vdso_gettimeofday; + __vdso_clock_getres; + __vdso_clock_gettime64; + + local: *; + }; +} + + +PHDRS { + phdr PT_PHDR FLAGS(4) PHDRS; + data PT_LOAD FLAGS(6) FILEHDR PHDRS; + text PT_LOAD FLAGS(5); + dynamic PT_DYNAMIC FLAGS(4); + eh_frame_hdr PT_GNU_EH_FRAME; + note PT_NOTE FLAGS(4); +} + +SECTIONS { + /* + * We can't prelink to any address without knowing something about + * the virtual memory space of the host, since that leaks over into + * the available memory space of the guest. + */ + . = SIZEOF_HEADERS; + + /* + * The following, including the FILEHDRS and PHDRS, are modified + * when we relocate the binary. We want them to be initially + * writable for the relocation; we'll force them read-only after. + */ + .note : { *(.note*) } :data :note + .dynamic : { *(.dynamic) } :data :dynamic + .dynsym : { *(.dynsym) } :data + /* + * There ought not be any real read-write data. + * But since we manipulated the segment layout, + * we have to put these sections somewhere. + */ + .data : { + *(.data*) + *(.sdata*) + *(.got.plt) *(.got) + *(.gnu.linkonce.d.*) + *(.bss*) + *(.dynbss*) + *(.gnu.linkonce.b.*) + } + + .rodata : { *(.rodata*) } + .hash : { *(.hash) } + .gnu.hash : { *(.gnu.hash) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .eh_frame_hdr : { *(.eh_frame_hdr) } :data :eh_frame_hdr + .eh_frame : { *(.eh_frame) } :data + + . = ALIGN(4096); + .text : { *(.text*) } :text +} -- 2.25.1