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Clarke" To: Nicholas Piggin Subject: Re: [PATCH] powerpc/perf: Fix cycles/instructions as PM_CYC/PM_INST_CMPL in power10 Message-ID: <20210708154352.GA11710@li-24c3614c-2adc-11b2-a85c-85f334518bdb.ibm.com> References: <1625639981-1424-1-git-send-email-atrajeev@linux.vnet.ibm.com> <1625748771.problnjoqz.astroid@bobo.none> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1625748771.problnjoqz.astroid@bobo.none> User-Agent: Mutt/1.10.1 (2018-07-13) X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: A8T8VvUKGTIgHthO4aVrymu5SwGX3wN9 X-Proofpoint-GUID: QADGXKondkQ88VrBtQhlIS4_EKKZpwHn X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-08_06:2021-07-08, 2021-07-08 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 mlxlogscore=999 malwarescore=0 phishscore=0 priorityscore=1501 clxscore=1015 adultscore=0 impostorscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2107080083 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Athira Rajeev , linuxppc-dev@lists.ozlabs.org, maddy@linux.ibm.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, Jul 08, 2021 at 10:56:57PM +1000, Nicholas Piggin wrote: > Excerpts from Athira Rajeev's message of July 7, 2021 4:39 pm: > > From: Athira Rajeev > > > > Power10 performance monitoring unit (PMU) driver uses performance > > monitor counter 5 (PMC5) and performance monitor counter 6 (PMC6) > > for counting instructions and cycles. Event used for cycles is > > PM_RUN_CYC and instructions is PM_RUN_INST_CMPL. But counting of these > > events in wait state is controlled by the CC56RUN bit setting in > > Monitor Mode Control Register0 (MMCR0). If the CC56RUN bit is not > > set, PMC5/6 will not count when CTRL[RUN] is zero. > > What's the acutal bug here, can you explain a bit more? I thought > PM_RUN_CYC is supposed to be gated by the runlatch. Would this renaming break compatibility with existing tools that presume PM_RUN_CYC and PM_RUN_INST_CMPL exist generically? PC