[PATCHv2 1/4] coresight: tmc-etr: Use handle->head from perf_output_handle directly.

From: Daniel Kiss <daniel.kiss@arm.com>
To: coresight@lists.linaro.org
Cc: denik@google.com, leo.yan@linaro.org,
	linux-arm-kernel@lists.infradead.org, mathieu.poirier@linaro.org,
	mike.leach@linaro.org, suzuki.poulose@arm.com,
	Daniel Kiss <daniel.kiss@arm.com>
Subject: [PATCHv2 1/4] coresight: tmc-etr: Use handle->head from perf_output_handle directly.
Date: Tue, 13 Jul 2021 14:15:29 +0200	[thread overview]
Message-ID: <20210713121532.836244-2-daniel.kiss@arm.com> (raw)
In-Reply-To: <20210713121532.836244-1-daniel.kiss@arm.com>

Polling might call update multiple times and the cached buffer head will
be out of sync without advancing it. Using the head directly from the
perf_output_handle solves this problem.

Signed-off-by: Daniel Kiss <daniel.kiss@arm.com>
---
 drivers/hwtracing/coresight/coresight-tmc-etr.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index acdb59e0e6614..589bb2d56e802 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -32,7 +32,6 @@ struct etr_flat_buf {
  * @etr_buf		- Actual buffer used by the ETR
  * @pid			- The PID this etr_perf_buffer belongs to.
  * @snaphost		- Perf session mode
- * @head		- handle->head at the beginning of the session.
  * @nr_pages		- Number of pages in the ring buffer.
  * @pages		- Array of Pages in the ring buffer.
  */
@@ -41,7 +40,6 @@ struct etr_perf_buffer {
 	struct etr_buf		*etr_buf;
 	pid_t			pid;
 	bool			snapshot;
-	unsigned long		head;
 	int			nr_pages;
 	void			**pages;
 };
@@ -1436,17 +1434,18 @@ static void tmc_free_etr_buffer(void *config)
  * tmc_etr_sync_perf_buffer: Copy the actual trace data from the hardware
  * buffer to the perf ring buffer.
  */
-static void tmc_etr_sync_perf_buffer(struct etr_perf_buffer *etr_perf,
+static void tmc_etr_sync_perf_buffer(struct perf_output_handle *handle,
+				     struct etr_perf_buffer *etr_perf,
 				     unsigned long src_offset,
 				     unsigned long to_copy)
 {
 	long bytes;
 	long pg_idx, pg_offset;
-	unsigned long head = etr_perf->head;
+	unsigned long head;
 	char **dst_pages, *src_buf;
 	struct etr_buf *etr_buf = etr_perf->etr_buf;
 
-	head = etr_perf->head;
+	head = PERF_IDX2OFF(handle->head, etr_perf);
 	pg_idx = head >> PAGE_SHIFT;
 	pg_offset = head & (PAGE_SIZE - 1);
 	dst_pages = (char **)etr_perf->pages;
@@ -1553,7 +1552,7 @@ tmc_update_etr_buffer(struct coresight_device *csdev,
 	/* Insert barrier packets at the beginning, if there was an overflow */
 	if (lost)
 		tmc_etr_buf_insert_barrier_packet(etr_buf, offset);
-	tmc_etr_sync_perf_buffer(etr_perf, offset, size);
+	tmc_etr_sync_perf_buffer(handle, etr_perf, offset, size);
 
 	/*
 	 * In snapshot mode we simply increment the head by the number of byte
@@ -1605,8 +1604,6 @@ static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *data)
 		goto unlock_out;
 	}
 
-	etr_perf->head = PERF_IDX2OFF(handle->head, etr_perf);
-
 	/*
 	 * No HW configuration is needed if the sink is already in
 	 * use for this session.
-- 
2.25.1


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