From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 784A7C636C9 for ; Thu, 15 Jul 2021 17:12:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 61AEF613C3 for ; Thu, 15 Jul 2021 17:12:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232590AbhGORPV (ORCPT ); Thu, 15 Jul 2021 13:15:21 -0400 Received: from mail-io1-f41.google.com ([209.85.166.41]:34425 "EHLO mail-io1-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231896AbhGORPU (ORCPT ); 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Thu, 15 Jul 2021 10:12:25 -0700 (PDT) Received: from robh.at.kernel.org ([64.188.179.248]) by smtp.gmail.com with ESMTPSA id i14sm3047235ilu.71.2021.07.15.10.12.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jul 2021 10:12:24 -0700 (PDT) Received: (nullmailer pid 1260573 invoked by uid 1000); Thu, 15 Jul 2021 17:12:20 -0000 Date: Thu, 15 Jul 2021 11:12:20 -0600 From: Rob Herring To: Drew Fustini Cc: Leyfoon Tan , Palmer Dabbelt , Rob Herring , linux-riscv@lists.infradead.org, Emil Renner Berthing , linux-kernel@vger.kernel.org, Jack Zhu , Geert Uytterhoeven , Paul Walmsley , Michael Zhu , devicetree@vger.kernel.org, Wei Fu Subject: Re: [PATCH v4] dt-bindings: riscv: add starfive jh7100 bindings Message-ID: <20210715171220.GA1259840@robh.at.kernel.org> References: <20210713063018.3000459-1-drew@beagleboard.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210713063018.3000459-1-drew@beagleboard.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 12 Jul 2021 23:30:18 -0700, Drew Fustini wrote: > Add DT binding documentation for the StarFive JH7100 Soc [1] and the > BeagleV Starlight JH7100 board [2]. > > [1] https://github.com/starfive-tech/beaglev_doc > [2] https://github.com/beagleboard/beaglev-starlight > > Signed-off-by: Drew Fustini > --- > v4 changes: > - removed JH7100 SoC revision number after discussion with Geert > > v3 changes: > - added revision number for the board and soc after question from Palmer > > v2 changes: > - removed "items:" entry that only had "const: starfive,jh7100" > - correct typo in Description: > > Results of running checks: > $ make -j8 ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu- dt_binding_check \ > DT_SCHEMA_FILES=Documentation/devicetree/bindings/riscv/starfive.yaml > CHKDT Documentation/devicetree/bindings/processed-schema-examples.json > DTEX Documentation/devicetree/bindings/riscv/starfive.example.dts > SCHEMA Documentation/devicetree/bindings/processed-schema-examples.json > DTC Documentation/devicetree/bindings/riscv/starfive.example.dt.yaml > CHECK Documentation/devicetree/bindings/riscv/starfive.example.dt.yaml > $ make -j8 ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu- dtbs_check \ > DT_SCHEMA_FILES=Documentation/devicetree/bindings/riscv/starfive.yaml > SYNC include/config/auto.conf.cmd > UPD include/config/kernel.release > SCHEMA Documentation/devicetree/bindings/processed-schema.json > DTC arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dtb > DTC arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dt.yaml > DTC arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dt.yaml > DTC arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml > CHECK arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dt.yaml > CHECK arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml > CHECK arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dt.yaml > > The dts file is from vendor repo and is being cleaned up right now in > preperation for submitting to the mailing list: > https://github.com/starfive-tech/linux/tree/beaglev/arch/riscv/boot/dts/starfive > > .../devicetree/bindings/riscv/starfive.yaml | 27 +++++++++++++++++++ > 1 file changed, 27 insertions(+) > create mode 100644 Documentation/devicetree/bindings/riscv/starfive.yaml > Reviewed-by: Rob Herring (I'm expecting the RiscV maintainers to take this.) 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Thu, 15 Jul 2021 10:12:25 -0700 (PDT) Received: from robh.at.kernel.org ([64.188.179.248]) by smtp.gmail.com with ESMTPSA id i14sm3047235ilu.71.2021.07.15.10.12.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jul 2021 10:12:24 -0700 (PDT) Received: (nullmailer pid 1260573 invoked by uid 1000); Thu, 15 Jul 2021 17:12:20 -0000 Date: Thu, 15 Jul 2021 11:12:20 -0600 From: Rob Herring To: Drew Fustini Cc: Leyfoon Tan , Palmer Dabbelt , Rob Herring , linux-riscv@lists.infradead.org, Emil Renner Berthing , linux-kernel@vger.kernel.org, Jack Zhu , Geert Uytterhoeven , Paul Walmsley , Michael Zhu , devicetree@vger.kernel.org, Wei Fu Subject: Re: [PATCH v4] dt-bindings: riscv: add starfive jh7100 bindings Message-ID: <20210715171220.GA1259840@robh.at.kernel.org> References: <20210713063018.3000459-1-drew@beagleboard.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210713063018.3000459-1-drew@beagleboard.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210715_101228_668416_8EAD042E X-CRM114-Status: GOOD ( 14.40 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, 12 Jul 2021 23:30:18 -0700, Drew Fustini wrote: > Add DT binding documentation for the StarFive JH7100 Soc [1] and the > BeagleV Starlight JH7100 board [2]. > > [1] https://github.com/starfive-tech/beaglev_doc > [2] https://github.com/beagleboard/beaglev-starlight > > Signed-off-by: Drew Fustini > --- > v4 changes: > - removed JH7100 SoC revision number after discussion with Geert > > v3 changes: > - added revision number for the board and soc after question from Palmer > > v2 changes: > - removed "items:" entry that only had "const: starfive,jh7100" > - correct typo in Description: > > Results of running checks: > $ make -j8 ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu- dt_binding_check \ > DT_SCHEMA_FILES=Documentation/devicetree/bindings/riscv/starfive.yaml > CHKDT Documentation/devicetree/bindings/processed-schema-examples.json > DTEX Documentation/devicetree/bindings/riscv/starfive.example.dts > SCHEMA Documentation/devicetree/bindings/processed-schema-examples.json > DTC Documentation/devicetree/bindings/riscv/starfive.example.dt.yaml > CHECK Documentation/devicetree/bindings/riscv/starfive.example.dt.yaml > $ make -j8 ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu- dtbs_check \ > DT_SCHEMA_FILES=Documentation/devicetree/bindings/riscv/starfive.yaml > SYNC include/config/auto.conf.cmd > UPD include/config/kernel.release > SCHEMA Documentation/devicetree/bindings/processed-schema.json > DTC arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dtb > DTC arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dt.yaml > DTC arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dt.yaml > DTC arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml > CHECK arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dt.yaml > CHECK arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml > CHECK arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dt.yaml > > The dts file is from vendor repo and is being cleaned up right now in > preperation for submitting to the mailing list: > https://github.com/starfive-tech/linux/tree/beaglev/arch/riscv/boot/dts/starfive > > .../devicetree/bindings/riscv/starfive.yaml | 27 +++++++++++++++++++ > 1 file changed, 27 insertions(+) > create mode 100644 Documentation/devicetree/bindings/riscv/starfive.yaml > Reviewed-by: Rob Herring (I'm expecting the RiscV maintainers to take this.) _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv